|Re: [hatari-devel] test needed on a 4MB STF|
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Le 26/12/2016 à 18:47, Christian Zietz a écrit :
Nicolas Pomarède schrieb:
Good news, this might be useful too for other project like MIST or
similar which try to re-build a complete STF/STE with VHDL and require a
low level description of each chip.
Here are the results of my reverse-engineering work of the MMU's bank
selection logic. This is for the non-IMP/Ricoh STF MMU. Note: It was
pointed out to me that while MMU chips labeled C025912-38 were made by
Ricoh, the manufacturer of the older MMU chips C025912-20 is not known.
The -20 version is found in the very first 520STs, afaik. I don't know
if the versions -38 and -20 differ on a functional level. The IMP MMU
C100109 will probably have a much simpler circuitry for bank selection
as it doesn't support different bank sizes. However, I have yet to have
a look at this part of the IMP MMU.
when you say "reverse-engineering", do you mean by using some of the old
asic documents you retrieved some time ago (and following the different
connections/combinations of each signal to determine the "pseudo" code),
or by working on a decapped chip ?
I hope that at least someone found this very technical text interesting.
I do :)