Re: [hatari-devel] test needed on a 4MB STF

[Nicolas Pomarède <npomarede@xxxxxxxxxxxx>]

Le 22/12/2016 à 17:56, Christian Zietz a écrit :
> Christian Zietz schrieb:
>
> > I think this can be fully explained by the mapping that I posted earlier
> > and that you then confirmed for the non-IMP MMU -- which is made by
> > Ricoh, BTW.
>
> To further support my last post, I repeated the test you described on my
> 4 MiB STF with Ricoh MMU. So, bank 0 is set to 128k, the address is set
> to $20000. This ends up on bank 1 as: offset $80000 (bank 1 = 128k),
> offset $40000 (bank 1 = 512k), offset $20000 (bank 1 = 2M). You can see
> how A17 is mapped to CAS8, CAS7 and CAS6, respectively. In case of a
> bank that in reality has 2 MiB, this corresponds to offsets $80000,
> $40000 and $20000 -- the same I observed.
>
> Then I did the test with bank 0 set to 512k and the address set to
> $80000, i.e. A19=1. This accesses bank 1 as: offset 0 (bank 1 = 128k),
> offset $100000 (bank 1 = 512k) and offset $80000 (bank 1 = 2M). This is
> again consistent with my explanation: In the case of a 128k setting for
> bank 1, A19 is simply not considered. For the 512k setting it maps to
> CAS9, which explains the observed offset $100000. For the 2M setting A19
> maps to CAS8, i.e. offset $80000.
>
> I think it shouldn't be to hard to express that behaviour in code.

Yes, I confirm this works :) So this gives a complete model of the MMU 
translation on STF.

basically, I did this before

if ( addr < mmu_size0 )
{
  bank=0;
  offset=0
}
else
{
  bank=1
  addr -= mmu_size0;
  offset= xxxx  (depends on bank0/bank1 combination)
}

Now I just do :

if ( addr < mmu_size0 )
{
  bank=0;
}
else
{
  bank=1
}

And I keep all input bits in addr to apply the and/shift needed to build 
CAS/RAS as before. In the end, I just mask with the physical RAM size of 
bank 0 or 1 to keep the location "inside" the ram mobules.

The results under Hatari are the same as my STF for the 9 bank0/bank1 
combinations.


But there's one last special mapping I didn't mention yet :)

We know that if we access an address > mmu_size0 + mmu_size1 then we get 
an "empty" region up to 4MB where the STF will return the last word seen 
on the bus (STE is a little different and involves the data read by the 
shifter too, butthat's basically the bus activity).

Well, if I set my STF to bank0=128 and bank1=2048, then I have these 
translations :

0 -> 20000 : mapped to bank0 0 -> 40000

20000 -> 40000 : mapped to bank1 90000 -> a0000

40000 -> 80000 : mapped to "empty" bus region  <-- ????

80000 -> a0000 : mapped to bank1 c0000 -> d0000

a0000 -> 100000 : mapped to bank1 d0000 -> 100000

100000 -> 200000 : mapped to 80000 -> 100000

200000 -> 220000 : mapped to 80000 -> 90000

220000 -> 400000 : "empty" bus region

Do you see this "hole" too on your STFs between 40000 and 80000 ? We 
should see data from a0000 to c0000, but on my ricoh MMU I only see the 
bus region (press F1 , F6 and 3 to go to address 40000 in my test prg)


Nicolas