|Re: [hatari-devel] ST bus error results|
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Nicolas Pomarède schrieb:
> Using IMP (=STE MMU mode) for megaSTF should not be a problem, I will
> submit a change for that later.
Note that the STE MMU -- as integrated into GSTMCU -- and the IMP MMU
used in some STF/MegaST are also different, i.e. they are not
functionally identical. Yes, they both only take into account the
setting for bank 0. But the way how they distribute CPU address lines to
memory (RAS and CAS) address lines differs.
> But as Troed wrote, that's indeed a very interesting finding to be able
> to detect the chip based on some HW register giving a bus error or not
> (maybe this should be confirmed on more cases for several models)
I only have the two machines that I tested. Hence, now other
participants on this list need to come forward. Particularly if they
have an ST with IMP chipset or a MegaST with Ricoh chipset.
Christian Zietz - CHZ-Soft - czietz@xxxxxxx
PGP/GnuPG-Key-ID: 0x52CB97F66DA025CA / 0x6DA025CA