Re: [hatari-devel] ST bus error results

[Nicolas Pomarède <npomarede@xxxxxxxxxxxx>]

Le 28/04/2018 à 12:34, Thomas Huth a écrit :

> > PS: Note that the IMP chipset not only differs in terms of bus error
> > generation but e.g. also in terms of handling of memory banks by the
> > MMU.
>
> Right, Nicolas already implemented some stuff in stMemory.c for this. I
> think we should then just switch the Mega-ST over to IMP behavior. Does
> that sound ok for you, Nicolas?

Hi

yes, this sounds OK for me. For now it was mainly a "broad" approach in 
the MMU code, sthg like "STE/megaSTE have IMP chipset for MMU" (ie only 
setting for bank 0 is taken into account) and "STF/megaSTF have the non 
IMP chipset" (ie much more "complex" rules to split a memory address 
into some physical address pins and banks can be of different size).

Using IMP (=STE MMU mode) for megaSTF should not be a problem, I will 
submit a change for that later.

But as Troed wrote, that's indeed a very interesting finding to be able 
to detect the chip based on some HW register giving a bus error or not 
(maybe this should be confirmed on more cases for several models)

Nicolas