|Re: [hatari-devel] FPU update|
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Am 27.01.2017 um 19:59 schrieb Toni Wilen <twilen@xxxxxxxxxx>:
>> It looks like first few errors have same reason: INEX2 bit should be set
>> but it isn't.
> Oops. I had missed few updates. INEX2 seems to work just fine and all
> other flags too. That was unexpected :)
> But same FSGLMUL/DIV errors still remaining. Attached is image that
> shows 4 of them, hopefully this helps to find out how it actually rounds
> or truncates. Or something.
This is quite strange! There seems to be an issue with normalization. For example first error:
Expected exponent is 0x53e, fraction is 0x3875460000000. If you shift the expected fraction to the left by 3 bits and lower the exponent by 3 the result will be the calculated value (integer bit is shifted out). I'll have a closer look tomorrow.
The fact that the input and output is double adds an extra layer of complexity. Maybe in the meantime you can do a test with just the operands from the first test (input as double) but print the result as extended (hexadecimal).