Hi,
Here is an intermediate update to the fpu tester from last night, incorporating some of the suggestions:
specifically:
- opcode sequence is printed for failures
- operands are printed, for those cases where operands are not limited to immediate data (which can be found in the opcode sequence)
- prints a maximum of 64 errors per test before moving onto the next (otherwise it can spam for several minutes on one test)
- waits for a key after each unit test failure (but not each individual failure)
Caveat: since some tests - such as fadd/fsub - accumulate changes in one operand register, recording those operands before an instruction involves writing the register back to memory as a double. This might produce misleading results since conversion is involved when writing floats to memory. I didn't really want to complicate things further by adding extended/packed decimal code. so this is the best I can do for now! Best intercept the test at runtime to get the true state for any test operands which don't seem to make sense in the report....
I have not incorporated the FPSR testing yet but have done some work on it. I can't really do this without affecting the expectation data. When I make this change I'll also update the tests themselves to remove some issues I noticed (specifically the fadd/fsub test seems to saturate on some values and gets stuck for long periods outputting the same result). For now, the expectation data remains as it was before. Due to this, the expectations recording program (fpudrec.tos) hasn't even been reassembled, even if the source has changed....
D.