Re: [hatari-devel] 68030 MMU emulation, TEMPLMON

[Uwe Seimet <Uwe.Seimet@xxxxxxxxx>]

Hi,

> Maybe i didn't clarify this: the debugging output does not reflect the actual assembler instruction. It just tells that something has been read from or written to TT0 and writes the values that has been read or written. It does not tell anything about the actual addressing mode.
> Maybe this needs some improvement, but for my purpose it was just enough. I'm not aware of programming with assembler language, so i'd need some help with the syntax.

Ah, now I see. I don't know whether there is a need to improve this
because I don't think there are only a handful of people asking the
question we are asking. And those people are probably all reading this
list, so everybody knows now how to interpret the output :-).

> I am using M68000PRM.pdf from:
> http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MC68030&fpsp=1&tab=Documentation_Tab
> 
> In the manual i'm using the field for FC is only 4 bit wide (very strange that it is 6 in yours) and the register field is also 4 bit wide. I think the correct values are 3 bit for register (for A0 - A7) and 5 bit for the FC field. In the manual i'm using the PTEST opcode for 68030 is described on page 520 (6-66). On the next page the possible values for the FC field are described ... they are 5 bit wide (same as PLOAD and PFLUSH). I'm near 100 % sure that the datasheet is wrong and 5 bit are correct.

I completely agree with you that any other values would not make sense.
Anyway, because I have the same manual as you I added a screenshot with
the section that confuses me. Looks as if I do not correctly interpret
the instruction format table. Doesn't it say 6 bits (0-5) for the MC68030
FC field? I think I make a systematical mistake when interpreting the
diagrams.

Do I really have to search for my written copy? It's somewhere in a box
in my cellar ;-). Maybe it's newer, like Roger's.

Cheers

Uwe

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