Re: [hatari-devel] Blitter bug in STe mode

[Toni Wilen <twilen@xxxxxxxxxx>]

> shouldn't be the case when using TAS as the bus is still owned by the cpu.
> For now, there's no cpu/bus specific code when TAS is used, guess I will 
> have to add code for this as this is one the case where the cpu and 
> blitter will both try to access the bus at the same time.

Actual locked cycle is not implemented in UAE core because on Amiga TAS 
special rmw cycle is completely ignored when accessing chip ram and 
write part of cycle can conflict with DMA access. In this situation DMA 
cycle wins and CPU write access goes nowhere. (There are latches between 
CPU and chip bus that separates CPU side and chipset side data bus)

I guess best option is to call some platform specific function from TAS 
that can do whatever it wants instead of hacking any platform specific 
code in TAS CPU core functions? (It currently has UAE specific TAS hack)

Does this also mean 68020+ CAS/CAS2 need similar special handling in 
Hatari? (If there are some software that assumes locked 
read-modify-write cycle will affect blitter)