Re: [hatari-devel] Hatari Falcon 060 emulation observations

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Hi,

I've managed to boot the CT60 TOS to the desktop with very few changes to hatari (That's only a proof of concept for now).

To make it run to the GEM :

modify 1 line in hatari code in memory.c


#define TTmem_end    0xffffffff     /* Max value for end of TT ram, which gives 2047 MB */ //#define TTmem_end    0x80000000            /* Max value for end of TT ram, which gives 2047 MB */


Then, add 2 conditional CPU breakpoints:
   1:    pc = $e9adb2
   2:    pc = $e9d658


At the first breakpoint,
> r pc=$e9ae6c
> c

At the second breakpoint,
> r pc=$e00798
> c

That's all ;)


OK, booting like is not suffisant (SDRam IO registers contains only 64 Mb of ram, it doesn't take into accopunt the user settings). I've tried to run the demo F22 by lamers and the program stop at the inits complaining about the lake of FPU (but I've addded the internal CPU) and it says this program doesn't run on this machine or something like that).


At least, it boots and we can implement it.

Regards

Laurent




Le 11/11/2018 à 15:50, Laurent Sallafranque a écrit :
I just forgot to mention that I added a bad hack just to simplify the first researches : in memory.c (hatari code), I change

#define TTmem_end    0x80000000     /* Max value for end of TT ram, which gives 2047 MB */

replaced by :

#define TTmem_end    0xffffffff     /* Max value for end of TT ram, which gives 2047 MB */


Like this, I give access in TT_RAM to the CT60 I/O memory.
This area should be correctly mapped later when the CT60 TOS boots.

Regards
Laurent




Le 11/11/2018 à 15:28, Laurent Sallafranque a écrit :
Hi all,

After a few investigations on the CT60 TOS, I manage to go further easily :

Booting hatari in 060 mode with CT60 TOS without changing anything always stops with the message "no SDRAM"

If I add a Breakpoint here (in the ct60_configure_sdram function)

00e9adb2 : 6a00 00b8                          bpl       $e9ae6c

and I change PC like this :

r pc=$e9ae6c

Hatari goes much much far :

SDRAM 64 MB detected          (((which is the default value when all I/O registers $F2xx0000 are set to 0)))

Boot V1.03c 2005 July

keyboard OK
wait 30 seconds for the floppy A
SCSI 0.1 ... no answer
SCSI 1.1 ... no answer
SCSI 2.1 ... no answer
SCSI 3.1 ... no answer
SCSI 4.1 ... no answer
SCSI 5.1 ... no answer
SCSI 6.1 ... no answer
SCSI 7.1 ... no answer

IDE 0.0
And here I got : EXCEPTION PROCESSING 2: Access Fault and a debugger message appears with the registers.


To bypass the SDram I2C protocol detection without patching the TOS itself, it seems we can just patch one instruction directly in hatari's rom by changing the instruction "bpl $e9ae6c"  to "bra $e9ae6c".

If we want to get the correct memory size, we'll have to feed the correct values to $f2xx0000 adresses (memory size, memory bank organisation, ...). We can set these values when hatari boots in 060 mode and TTram is > 0.

I continue to have a look at it and see if I can understand the Exception.

Regards
Laurent





Le 10/11/2018 à 10:46, Nicolas Pomarède a écrit :
Le 09/11/2018 à 23:45, Eero Tamminen a écrit :
"Somebody" would first need to add necessary emulation additions
(or TOS patches) to get CT60 TOS working first, so that there's
a TOS version that emulates the FPU opcodes missing from 060...

Are you planning on looking into that?

for thoses interested in patching tos ct60 (to change sdram check for example), note that the sources are here : https://github.com/mikrosk/ct60tos this can give better insigth on which tests are done instead of just disassembking the ct60 tos.

Nicolas













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