Hi all,
After a few investigations on the CT60 TOS, I manage to go further
easily :
Booting hatari in 060 mode with CT60 TOS without changing anything
always stops with the message "no SDRAM"
If I add a Breakpoint here (in the ct60_configure_sdram function)
00e9adb2 : 6a00 00b8 bpl $e9ae6c
and I change PC like this :
r pc=$e9ae6c
Hatari goes much much far :
SDRAM 64 MB detected (((which is the default value when all
I/O registers $F2xx0000 are set to 0)))
Boot V1.03c 2005 July
keyboard OK
wait 30 seconds for the floppy A
SCSI 0.1 ... no answer
SCSI 1.1 ... no answer
SCSI 2.1 ... no answer
SCSI 3.1 ... no answer
SCSI 4.1 ... no answer
SCSI 5.1 ... no answer
SCSI 6.1 ... no answer
SCSI 7.1 ... no answer
IDE 0.0
And here I got : EXCEPTION PROCESSING 2: Access Fault and a debugger
message appears with the registers.
To bypass the SDram I2C protocol detection without patching the TOS
itself, it seems we can just patch one instruction directly in
hatari's rom by changing the instruction "bpl $e9ae6c" to "bra
$e9ae6c".
If we want to get the correct memory size, we'll have to feed the
correct values to $f2xx0000 adresses (memory size, memory bank
organisation, ...). We can set these values when hatari boots in 060
mode and TTram is > 0.
I continue to have a look at it and see if I can understand the
Exception.
Regards
Laurent
Le 10/11/2018 à 10:46, Nicolas Pomarède a écrit :
Le 09/11/2018 à 23:45, Eero Tamminen a écrit :
"Somebody" would first need to add necessary emulation additions
(or TOS patches) to get CT60 TOS working first, so that there's
a TOS version that emulates the FPU opcodes missing from 060...
Are you planning on looking into that?
for thoses interested in patching tos ct60 (to change sdram check for
example), note that the sources are here :
https://github.com/mikrosk/ct60tos
this can give better insigth on which tests are done instead of just
disassembking the ct60 tos.
Nicolas