This would be big help for implementing arithmetic exception emulation.
I also had a quick look at FPU exceptions and there seem to be 6 (or maybe more) different kinds of stack frame depending on the coprocessor (or fpu-integrated-cpu) model and whether or not the device was busy during the fault. That definitely adds to the 'fun'. However the part I really have doubts about is making sure the many different exception-raising cases are properly covered/tested for. While it is possible the current test prg raises some NaN and other exceptions there are definitely plenty of cases which will never occur in the current set of tests. I think supporting & properly verifying all of those cases would be painful.
However adding diagnostics for FPU exceptions generally isn't too bad so it could be added as a first step.