>dynamic bus sizing is indeed when the addressed peripheral "tells" the
>cpu how many bytes remain to be transferred when accessing a specific
>addresse.
>
>It requires specific SIZ0 and SIZ1 signals, which is not used in Hatari
>machine (neither in Amiga ones as far as I know, otherwise it would
>certainly be emulated in WinUAE)
In UAE this is meant to be done in device side if needed by specific device(s). It would unnecessarily slow down all accesses if CPU emulator would need to check this for each access.
Device "memory bank" (addrbank) gets the original width of access (byte, word or long, lget()/lput()/wget()/wput()/bget()/bput() functions) which can be used to do byte swapping or bus sizing. For example if device has 8-bit data bus, long and word handlers need to convert single long or word access to 4x or 2x byte accesses (optionally check CPU model and do it differently if 68040+) or if device is 32-bit but is little-endian, data needs to be endian-swapped before forwarding it to the device. Also optionally add wait states for each split access if in timing accurate emulation mode.