Re: [hatari-devel] Dynamic Bus Sizing and I/O Register Access

[ Thread Index | Date Index | More lists.tuxfamily.org/hatari-devel Archives ]


Le 14/01/2024 à 20:25, Thomas Huth a écrit :

I’not sure this is specific to NeXT. There is a chapter about dynamic bus sizing in the user manual of the 68030 and this does not seem to be implemented in Hatari.

Maybe this happens on other m68k machines, too, but on the Atari computers,
the "Glue" chip (I think) makes sure that such things don't happen. At
least we've never seen this on real Atari hardware so far, so I think
Hatari is not affected by this.


Hi

dynamic bus sizing is indeed when the addressed peripheral "tells" the cpu how many bytes remain to be transferred when accessing a specific addresse.

It requires specific SIZ0 and SIZ1 signals, which is not used in Hatari machine (neither in Amiga ones as far as I know, otherwise it would certainly be emulated in WinUAE)

What iomem.c does by accessing byte, word or long word is not the same thing, it's just "normal" memory access that can read/write 1, 2 or 4 bytes, except those bytes are related to HW registers.

Nicolas



Mail converted by MHonArc 2.6.19+ http://listengine.tuxfamily.org/