Re: [hatari-devel] Suspicious instruction & data cache hit/miss accounting

[Nicolas Pomarède <npomarede@xxxxxxxxxxxx>]

Le 02/02/2018 à 21:54, Eero Tamminen a écrit :
> Hi,
>
> Here's example disassembly from EmuTOS 0.9.9.1 on Falcon emu.
>
> Instructions which have either zero instruction cache hits & misses,
> or zero data cache hits & misses, are marked with '*':
> $00e4cf4e: d1ee fff6      adda.l  $fff6(a6),a0   (185, 2640, 185, 190)
> $00e4cf52: 2d48 fff6      move.l  a0,$fff6(a6) * (185, 2685, 185, 0)
> $00e4cf56: 4444           neg.w   d4           * (185, 0, 0, 0)
> $00e4cf58: 3d44 fff0      move.w  d4,$fff0(a6) * (185, 1665, 185, 0)
> $00e4cf5c: 3c00           move.w  d0,d6        * (185, 1110, 185, 0)
> $00e4cf5e: 0246 000f      andi.w  #$f,d6       * (185, 1128, 188, 0)
> $00e4cf62: 3d46 ffe6      move.w  d6,$ffe6(a6) * (185, 2036, 185, 0)
> $00e4cf66: 5349           subq.w  #1,a1        * (185, 0, 0, 0)
> $00e4cf68: 3239 0000 22a0 move.w  $22a0,d1       (185, 3330, 370, 0)
> $00e4cf6e: 0240 fff0      andi.w  #$fff0,d0    * (185, 1110, 185, 0)
> $00e4cf72: 45f9 00e0 b9be lea     $e0b9be,a2   * (185, 1110, 185, 0)
> $00e4cf78: 1432 2800      move.b  (a2,d2.l),d2   (185, 2590, 185, 0)
> $00e4cf7c: 4882           ext.w   d2           * (185, 1110, 185, 0)
> $00e4cf7e: e468           lsr.w   d2,d0        * (185, 0, 0, 0)
> $00e4cf80: 0280 0000 ffff andi.l  #$ffff,d0    * (185, 2220, 370, 0)
> $00e4cf86: d0b9 0000 044e add.l   $44e,d0        (185, 4062, 185, 1)
> $00e4cf8c: 3409           move.w  a1,d2        * (185, 1110, 185, 0)
> $00e4cf8e: c4c1           mulu.w  d1,d2        * (185, 3885, 0, 0)
> $00e4cf90: 2240           movea.l d0,a1        * (185, 1110, 185, 0)
> $00e4cf92: d3c2           adda.l  d2,a1        * (185, 0, 0, 0)
> $00e4cf94: 2d49 fff2      move.l  a1,$fff2(a6)   (184, 2760, 184, 0)
>
> As you can see, they're the majority (as indicated by
> the profiler cache hit/miss histogram).
>
> If you want more output, I pushed commit that shows the info
> after you set "DEBUG" to 1 in profilecpu.c, re-build Hatari,
> start Falcon or TT emulation, and enable profiling:
> https://hg.tuxfamily.org/mercurialroot/hatari/hatari/rev/822222b90afb
>
> It's common enough that you see it immediately, regardless
> of what you run and on what 030 TOS version.

Hi

regarding data cache, most instructions in these lines are writing data, 
not reading them. So this seems normal that there's no hit/miss when 
writing, only when reading.

As for instructions cache, do you have another example where some small 
piece of code would be repeated in a loop but there would be no hit/miss 
for instr cache ? Such case would be indeed strange as instr are likely 
to go into cache during a small loop.

Nicolas