[hatari-devel] Falcon STE bus compatibility setup code?

[Eero Tamminen <oak@xxxxxxxxxxxxxx>]

Hi,

I was looking at the Falcon STE bus compatibility setup code,
and noticed something redundant looking:
--------------------------------------------
static void IoMem_SetVoidRegion(Uint32 startaddr, Uint32 endaddr)
{
        Uint32 addr;

        for (addr = startaddr; addr <= endaddr; addr++)
        {
                pInterceptReadTable[addr - 0xff8000] = IoMem_VoidRead;
                pInterceptWriteTable[addr - 0xff8000] = IoMem_VoidWrite;
        }
}
....
static void IoMem_FixVoidAccessForCompatibleFalcon(void)
{
        int i;
        Uint32 no_be_regions[][2] =
        {
                { 0xff8002, 0xff8005 },
                { 0xff8008, 0xff800b },
                { 0xff800e, 0xff805f },
                { 0xff8064, 0xff81ff },
                { 0xff82c4, 0xff83ff },
                { 0xff8804, 0xff88ff },
                { 0xff8964, 0xff896f },
                { 0xff8c00, 0xff8c7f },
                { 0xff8c88, 0xff8cff },
                { 0xff9000, 0xff91ff },
                { 0xff9204, 0xff920f },
                { 0xff9218, 0xff921f },
                { 0xff9224, 0xff97ff },
                { 0xff9c00, 0xff9fff },
                { 0xffa200, 0xffa207 },
                { 0, 0 }
        };

        for (i = 0; no_be_regions[i][0] != 0; i++)
        {
                IoMem_SetVoidRegion(no_be_regions[i][0], 
no_be_regions[i][1]);
        }
}
....
void IoMem_Init(void)
{
....
         case MACHINE_FALCON:
                if (falconBusMode == STE_BUS_COMPATIBLE)
                        IoMem_FixVoidAccessForCompatibleFalcon();
                pInterceptAccessFuncs = IoMemTable_Falcon;
                break;
         default:
                abort(); /* bug */
        }

        /* Now set the correct handlers */
        for (addr=0xff8000; addr <= 0xffffff; addr++)
        {
....
        }
....
        /* Initialize PSG shadow registers for ST, STe, TT machines */
        if (!Config_IsMachineFalcon())
        {
                for (addr = 0xff8804; addr < 0xff8900; addr++)
                {
                        pInterceptReadTable[addr - 0xff8000] = 
pInterceptReadTable[(addr & 0xfff803) - 0xff8000];
                        pInterceptWriteTable[addr - 0xff8000] = 
pInterceptWriteTable[(addr & 0xfff803) - 0xff8000];
                }
        }
        else {
                /* Initialize PSG shadow registers for Falcon machine 
when in STe bus compatibility mode */
                if (falconBusMode == STE_BUS_COMPATIBLE) {
                        for (addr = 0xff8804; addr < 0xff8900; addr++)
                        {
                                pInterceptReadTable[addr - 0xff8000] = 
IoMem_VoidRead;     /* For 'read' */
                                pInterceptWriteTable[addr - 0xff8000] = 
IoMem_VoidWrite;   /* and 'write' */
                        }

                }
        }
}
--------------------------------------------

That is:
1. If BUS_COMPATIBLE, set relevant register ranges to void handlers
2. Could overwrite those ranges (but doesn't, I checked)
3. If BUS_COMPATIBLE, set again PSG register range to void handlers

Why not do something like in the attached patch?


	- Eero

diff -r b20cd4678e7b src/ioMem.c
--- a/src/ioMem.c	Fri Dec 01 15:18:46 2017 +0100
+++ b/src/ioMem.c	Sat Dec 02 00:41:35 2017 +0200
@@ -260,8 +260,6 @@
 		pInterceptAccessFuncs = IoMemTable_TT;
 		break;
 	 case MACHINE_FALCON:
-		if (falconBusMode == STE_BUS_COMPATIBLE)
-			IoMem_FixVoidAccessForCompatibleFalcon();
 		pInterceptAccessFuncs = IoMemTable_Falcon;
 		break;
 	 default:
@@ -329,26 +327,21 @@
 		}
 	}
 
-	/* Initialize PSG shadow registers for ST, STe, TT machines */
-	if (!Config_IsMachineFalcon())
+	if (Config_IsMachineFalcon())
 	{
+		/* Void PSG shadows register and other register ranges for STE compatible bus mode? */
+		if (falconBusMode == STE_BUS_COMPATIBLE)
+			IoMem_FixVoidAccessForCompatibleFalcon();
+	}
+	else
+	{
+		/* Initialize PSG shadow registers for ST, STe, TT machines */
 		for (addr = 0xff8804; addr < 0xff8900; addr++)
 		{
 			pInterceptReadTable[addr - 0xff8000] = pInterceptReadTable[(addr & 0xfff803) - 0xff8000];
 			pInterceptWriteTable[addr - 0xff8000] = pInterceptWriteTable[(addr & 0xfff803) - 0xff8000];
 		}
 	}
-	else {
-		/* Initialize PSG shadow registers for Falcon machine when in STe bus compatibility mode */
-		if (falconBusMode == STE_BUS_COMPATIBLE) {
-			for (addr = 0xff8804; addr < 0xff8900; addr++)
-			{
-				pInterceptReadTable[addr - 0xff8000] = IoMem_VoidRead;     /* For 'read' */
-				pInterceptWriteTable[addr - 0xff8000] = IoMem_VoidWrite;   /* and 'write' */
-			}
-
-		}
-	}
 }
 
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