Re: [hatari-devel] DSP performance |
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Hi Nicolas,
That's where I don't agree.
I've recomputed the whole table according to Mikro's explanation, and my
static table contained ATARI 68030 cycles (16 bit bus) (and not AMIGA
ones with 32 bit bus).
The NOP is given into the documentation like this :
/*903 */ {0, 0, 2,0,0,0, 2,0,1,0}, // NOP.L
So, in instruction cache mode, NOP is 0 head, 0 tail and 2 cycles)
But in non cached mode, there's one access to the bus, so the cycles
taken by the instruction is 4 cycles, not 2 (I'll try to find again the
rule behing this).
That's why I recomputed the whole table by hand to have the Falcon 16
bit bus values and not the 68030 default 32 bit bus ones
Regards
Laurent
Le 29/06/2015 00:03, Nicolas Pomarède a écrit :
Also, I have the feeling the table was based on 68020, not 68030 ? For
example, NOP took 2 cycles in cache and 4 cycles with no cache, but
68030 doc says it's always 2 cycles (same for EXG dx,dy, timings are
different between cache and no cache, but it should not be the case).