Re: [hatari-devel] Wrong bus error stack frame with 68000 and JSR

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Christian Zietz schrieb:

I.e., for branches, jumps and returns, the stacked PC is "near" the PC
of the branch/jump/return instruction, and not the target of this
instruction. Sadly, the exact offset is not documented, and probably
depends on instruction and addressing mode.

Today, I did some more testing on a real 68000. The stacked PC has the
following offset to the offending JSR:

JSR xxx.L	6 bytes
JSR xxx.W	4 bytes
JSR (Ax)	2 bytes
JSR n(Ax)	4 bytes
JSR n(Ax,Dx)	4 bytes
JSR n(PC,Dx)	4 bytes

The offsets correspond to the length of the instruction; in other words,
the stacked PC in the exception frame points to the start of the
instruction after the JSR. I could not test "JSR n(PC)" because I cannot
easily get a bus error with my tester there. My expectation would be a 4
byte offset.

I'd like to leave it to Toni to repeat these tests for JMP, Bcc, BSR,
RTS etc. Or maybe the answer can be found in the 68000 microcode,
without testing.

Regards
Christian
--
Christian Zietz  -  CHZ-Soft  -  czietz@xxxxxxx
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