Re: [hatari-devel] PSG_WaitState() inaccuracy |
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Christian Zietz schrieb:
But this is not a difference in *memory* timing but an inaccurate emulation of the *PSG* access timing. It just becomes more easily observable if code is run from outside of ST RAM.
To underpin this point consider the attached program that can be run from ST-RAM in a stock ST (or STE) and will still show the inaccuracy: Hatari 680 ticks, real hardware 554 ticks. The sequence "CLR.L Dx; MOVE.B Dx,(A1)" where A1 is 0xFFFF8800 takes 16 cycles on real hardware: 6 for the CLR.L, 10 for the MOVE: 8 + 1 waitstate during PSG access + 1 waitstate for re-synchronization of the next (prefetch) access to ST-RAM. Regards Christian -- Christian Zietz - CHZ-Soft - czietz@xxxxxxx WWW: https://www.chzsoft.de/ PGP/GnuPG-Key-ID: 0x52CB97F66DA025CA / 0x6DA025CA
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