Re: [hatari-devel] hatari tt scc emulation

[Eero Tamminen <oak@xxxxxxxxxxxxxx>]

Hi,

On 07/17/2017 09:43 AM, Christian Zietz wrote:
> Uwe Seimet schrieb:
>
> > In your case MiNT probably should check whether the SCC hardware is
> > present, and not do anything SCC-related if there is a bus error.
>
> As I had already written, MiNT does not directly access the registers in
> this case.

MiNT SCC device driver does access them directly, as does MiNT HW
detection code in:
https://github.com/freemint/freemint/blob/master/sys/arch/detect.S#L99

(In my earlier debugging, SCC ControlRegB access was the one crashing.)


> It uses TOS 3.06 XBIOS functions, in particular Rsconf, to
> access all serial ports that are made available by TOS. Of course you
> can argue that *TOS* should check if the SCC is there, but -- well -- it
> doesn't.
>
> Also, I don't think adding wrappers in the MiNT kernel around
> XBIOS functions in order to catch bus errors is the way to go.
>
> I'm quite confident that -- if required -- I could provide a test case
> that does not need MiNT and that will crash at the same instruction
> inside TOS 3.06.

That would be useful!


Michael, attached is (untested) patch to disable SCC write bus errors.



	- Eero

diff -r 7af354da1f2a src/ioMemTabTT.c
--- a/src/ioMemTabTT.c	Thu Jul 13 01:12:18 2017 +0300
+++ b/src/ioMemTabTT.c	Mon Jul 17 15:52:20 2017 +0300
@@ -133,7 +133,7 @@
 
 	/* Note: The TT does not have a blitter (0xff8a00 - 0xff8a3e) */
 
-	//{ 0xff8c80, 8, IoMem_VoidRead, IoMem_WriteWithoutInterception },         /* SCC */
+	{ 0xff8c80, 8, IoMem_VoidRead, IoMem_WriteWithoutInterception },         /* SCC */
 
 	{ 0xff8e01, 1, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception },         /* SCU system interrupt mask */
 	{ 0xff8e03, 1, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception },         /* SCU system interrupt state */