|Re: [hatari-devel] TT hardware memory information|
[ Thread Index |
| More lists.tuxfamily.org/hatari-devel Archives
- To: hatari-devel@xxxxxxxxxxxxxxxxxxx
- Subject: Re: [hatari-devel] TT hardware memory information
- From: David Savinkoff <dsavnkff@xxxxxxxxx>
- Date: Wed, 16 Mar 2016 17:25:16 -0600 (MDT)
- Dkim-signature: v=1; a=rsa-sha256; c=relaxed/simple; d=telus.net; s=neo; t=1458170716; bh=AP7Fd1e3TC9k9KY0Ezr5UgAlu6sDKOCiKl0GYX3AvLc=; h=Date:From:To:Message-ID:In-Reply-To:References:Subject: MIME-Version:Content-Type:Content-Transfer-Encoding; b=oAI4sYzU1sOgnY1g1j0FjSCtnQII8diugBpYc6Kw5hzOodBy5GhEsO7SCsJfPWuXQ U8mMChGmu9a42KcENbk8+4UVZrCwexmrvMeEuQE13KUtYbXCLQ8Y4PJX0Z3KUfcmeV oCfug+2P+0X9bc1ST4JPl4QA3zajQulhbyWUMF6YJ50joHas1Fn1EHfr4KgDUoBYPt I8EL4UNayqJOGitxoIRa9emU4fkZCd62rZDxEysLB6cONnMgjontMgbaOGRKczNBH9 Qz1PmnyU2KEDn/BztIZqcV3agX+eNlDgiafOZlDrybkUIZfNtdN3eqOKMYHdnlQ37i Q/2od2m51FC6Q==
- Thread-index: MiVgX1AIXIVgtWC+B1aDRYVS0z0fjg==
- Thread-topic: TT hardware memory information
----- Thomas Huth wrote:
> On 16.03.2016 02:10, Roger Burrows wrote:
> > The TT has a sync mode register at the same address as the ST (0xff820a).
> > However, it's not set up the same way. TOS3 initialises it to 0x01 very early
> > in initialisation, and it is not updated elsewhere. While getting EmuTOS
> > working on my TT, I discovered that, if this is set to 0x00 or 0x02 (like it
> > would be on an ST), there is NO output to the screen: my LCD monitor remains
> > blank, although it does detect the correct screen size and refresh rate.
I think the TT is doing exactly what you said:
The TT puts out a black picture (blanked) with hsync an vsync running as usual.
Thus, if you want a black screen you zero the bit.
Now the question is whether the shifter keeps shifting pixels with the blanked
screen, or whether it stops.
This should be tested because I'm sure a demo will be made, if it isn't already.
> > In the "Atari TT030 Hardware Reference Manual", June 1990, there is a note that
> > bit 0 of this register is 'set to 1'. There is no further explanation.
> IIRC, I once read somewhere that bit 0 of this register has been
> inverted on the TT, i.e. when it is set to 0, that means the sync
> signals are taken from external source, and 1 means that they are
> generated from the shifter.
I looked at the schematics and could find no means to accept hsync or
vsync or any video signal from an external source. Can it be done?
> Hatari currently ignores that external sync bit - no matter whether it's
> ST or TT mode. So far I also haven't seen any program where this would
> be useful, I think.