|Re: [hatari-devel] TT hardware memory information|
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On 16.03.2016 02:10, Roger Burrows wrote:
> The TT has a sync mode register at the same address as the ST (0xff820a).
> However, it's not set up the same way. TOS3 initialises it to 0x01 very early
> in initialisation, and it is not updated elsewhere. While getting EmuTOS
> working on my TT, I discovered that, if this is set to 0x00 or 0x02 (like it
> would be on an ST), there is NO output to the screen: my LCD monitor remains
> blank, although it does detect the correct screen size and refresh rate.
> In the "Atari TT030 Hardware Reference Manual", June 1990, there is a note that
> bit 0 of this register is 'set to 1'. There is no further explanation.
IIRC, I once read somewhere that bit 0 of this register has been
inverted on the TT, i.e. when it is set to 0, that means the sync
signals are taken from external source, and 1 means that they are
generated from the shifter.
Hatari currently ignores that external sync bit - no matter whether it's
ST or TT mode. So far I also haven't seen any program where this would
be useful, I think.