|Re: [hatari-devel] DSP and HREQ|
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I check this.
I've found this, it may be of interrest
HI Interrupts Host Request (HREQ)
The host processor interrupts are external and use the HREQ pin. HREQ is
nected to the host processor maskable interrupt (IPL0 or IPL1 or IPL2 in
input. The host processor acknowledges host interrupts by executing an
routine. The most significant bit (HREQ) of the ISR may be tested by the
to determine if the DSP is the interrupting device and the two least
significant bits (RXDF
and TXDE) may be tested to determine the interrupt source (see Figure
10-17). The host
processor interrupt service routine must read or write the appropriate
HI register to clear
the interrupt. HREQ is deasserted when1) the enabled request is cleared
or masked, 2)
DMA HACK is asserted, or 3) the DSP is reset.
Le 26/01/2015 23:12, Nicolas Pomarède a écrit :
Le 26/01/2015 23:02, Laurent Sallafranque a écrit :
For the DSP side, I propose :
HSR equ $ffe9 ;Host Status Register
HTX equ $ffeb ;Host Transmit Register
; General code to initialise port B
movep #>3,x:<<$ffe8 ; enable interrupts
I think I have to set %11 to $ffe8 to enable interrupts.
I'll test this under hatari first.
shouldn't it be %11 to ffe9 (HCR) instead ?