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- To: hatari-devel@xxxxxxxxxxxxxxxxxxx
- Subject: [hatari-devel] DSP question
- From: Douglas Little <doug694@xxxxxxxxxxxxxx>
- Date: Tue, 26 Feb 2013 15:47:32 +0000
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I have a Hatari DSP question now. Perhaps one for Laurent but I'd be interested if anyone knows the answer to this one.
I've been looking at concurrency behaviour in my program relating to DSP host port events - points where CPU and DSP synchronize briefly and make some data exchanges.
It appears the DSP isn't being held up (blocking/spinning) at the exchange points I expected - rather 2 exchanges farther on than expected. It behaves exactly as I'd expect if the host port was decoupled via a 2-deep FIFO in at least one direction - probably both directions. (i.e. the DSP can write 2 values to the host port without the CPU doing anything, but the 3rd would block until the 1st is retrieved).
Is this actually how the host port is implemented in Hatari? And if so, is it the same situation on real hardware? It's interesting because it has (good) implications for performance if used properly. But I'd like to confirm it before relying on anything like that.
(It wouldn't be surprising to me if there is a FIFO present - but knowing for sure and the actual depth is very interesting).
D.