Fwd: Re: [hatari-devel] Hatari profiler updates and DSP cycle questions

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Hi,

I forward here an exchange with Doug about the DSP X and Y timings.
It may be interesting to keep a trace of this for later.

Laurent



-------- Message original --------
Sujet: Re: [hatari-devel] Hatari profiler updates and DSP cycle questions
Date : Sat, 02 Feb 2013 14:51:00 +0100
De : Laurent Sallafranque <laurent.sallafranque@xxxxxxx>
Pour : Douglas Little <doug694@xxxxxxxxxxxxxx>


Hi Doug,

I've taken 5 minutes before leaving to upload the patch.
I've retested it with your DSP benchmark V2 program and it always gives 100% now.

I think some more tests with L:XY would be nice too, as I still have a doubt on this special case.
And probably a general tester would be great too (at least for non regression testing).
Regards

Thanks again for the help and good luck for Bad Mood (a lot of remembers for me ;) )

Laurent



Le 02/02/2013 11:29, Douglas Little a écrit :
Hi Laurent,

Ok this makes sense. It's probably quite hard to do everything straight from the manual - it repeats the same info in different ways all over the place. It helps to conduct tests on real HW for confirmation.

I may expand the tests to cover other things soon but it seems like DSP emulation is settling towards perfection and perhaps I won't find anything else.

D.

On 2 February 2013 00:02, Laurent Sallafranque <laurent.sallafranque@xxxxxxx> wrote:
Hi,

I see where this comes from.
I can easily remove it.

But, I've looked at the motorola DSP doc, and it reads :


MOVE  2 + mv

mv :

[...]
X:Y: XY Memory Move ea + axy
[...]

Maybe this confused me :
axy table :

L: XY: Ext Ext — — — — — — 2 + wx + wy


Maybe they should have written in the doc :  X:Y: XY Memory Move ea + ax + ay

If you're OK (a ""bug"" in the DSP doc), I can upload a simple patch

The patch will be : in dsp_cpu.c in the function static void dsp_pm_8(void), there's just to comment 3 lines as described below

    /* 2 more cycles are needed if X:address1 and Y:address2 are both in external memory */
//    if ((x_addr>=0x200) && (y_addr>=0x200)) {
//        dsp_core.instr_cycle += 2;
//    }


Regards
Laurent


Le 01/02/2013 22:56, Douglas Little a écrit :
Yes here it is...

I began to wonder if it is actually an EA calculation complicating matters because the opcode used for all the work has circular buffers configured for X: and Y: (the DSP 'm' registers)

However even if this is the case the timings don't match a real machine so it's worth a look anyway.

I'll try a simpler addressing mode later.

D.

On 1 February 2013 21:48, Laurent Sallafranque <laurent.sallafranque@xxxxxxx> wrote:
Very interresting, I look at it immediatly.

Could you send me your benchmark program, so I can launch it and have a look at  the instructions in detail ?

Regards

Laurent










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