Hi,
On maanantai 25 helmikuu 2013, Nicolas Pomarède wrote:
Le 25/02/2013 18:16, Eero Tamminen a écrit :
Do they cause PC for the next instruction to be something else than
the next address in memory?
Yes, it's like a trap or an exception, the PC will be set to the vector
defined in the lower ram for each exception.
...
No, you can't detect when the code is inside an exception handler. The
exception handler is free to change SR, stack pointer, ... in any way it
likes (for example, change A7 and SR in a way where RTS will be used
instead of RTE).
Ok, thanks!
Commit adding this info to profile callers is here:
http://hg.tuxfamily.org/mercurialroot/hatari/hatari/rev/49416318c2ac