Re: [AD] Optimization flags?

[Chris <chris.kcat@xxxxxxxxxx>]

On Mon, 25 Oct 2004 13:49:52 -0700, Robert Ohannessian
<rohannessian@xxxxxxxxxx> wrote:
> > -frename-registers
> >     Attempt to avoid false dependencies in scheduled code by making
> > use of registers left over after register allocation. This
> > optimization will most benefit processors with lots of registers. It
> > can, however, make debugging impossible, since variables will no
> > longer stay in a "home register".
> 
> 
> This likely won't help the x86. 7 does not count as "lots of registers".

No, but the way I understand it, it helps more with the more registers
you have.. so even if you're kinda limited on registers, you could
still get some benefit. And what about the PPC?

> > -finline-functions
> >     Integrate all simple functions into their callers. The compiler
> > heuristically decides which functions are simple enough to be worth
> > integrating in this way.
> 
> 
> Allegro was benchmarked a while ago with this option. It turned out
> slower and bigger than without it.

Of course it'd be bigger (though I wouldn't imagine by mutch?), but
I'm surprised it's slower. Any particular reason?

> > -funswitch-loops
> >     Move branches with loop invariant conditions out of the loop, with
> > duplicates of the loop on both branches (modified according to result
> > of the condition).
> 
> This isn't a default option, implied by -O2?

Not according to:
http://gcc.gnu.org/onlinedocs/gcc-3.4.2/gcc/Optimize-Options.html#Optimize-Options

> > -fbranch-target-load-optimize
> >     Perform branch target register load optimization before prologue /
> > epilogue threading. The use of target registers can typically be
> > exposed only during reload, thus hoisting loads out of loops and doing
> > inter-block scheduling needs a separate optimization pass.
> >
> > -fbranch-target-load-optimize2
> >     Perform branch target register load optimization after prologue /
> > epilogue threading.
> 
> Those won't help the x86: Branch targets are inlined.

What about the PPC/Macs?

> > -fweb
> >     Constructs webs as commonly used for register allocation purposes
> > and assign each web individual pseudo register. This allows the
> > register allocation pass to operate on pseudos directly, but also
> > strengthens several other optimization passes, such as CSE, loop
> > optimizer and trivial dead code remover. It can, however, make
> > debugging impossible, since variables will no longer stay in a "home
> > register".
> 
> This one is new to me. Dunno if it'll help to turn it on.

Couldn't hurt to try, but unfortunately I don't have GCC 3.4 and I'm a
little reluctant to try it (from what I hear it has some problems with
older code).

- Kitty Cat