Re: [AD] Allegro & SPARC

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Evert Glebbeek wrote:

Do you mean asm optimizations ? I'd say, if they can somehow be reused on
"modern" Sparc machines, maybe. Otherwise, let this dinosaur die
peacefully :-)


I don't think they are: for one thing branch delay slots are different. For another, instructions have very different timings and latency. This would be very much like writting 386-optimized code and expecting good performence out of the PPro (which isn't likely to happen).


And of course I know absolutely nothing about the Sparc assembly language, so I'm not sure if I can improve on gcc's output - but I'll see.


gcc's output is pretty tight, IME.




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