[ Thread Index |
Date Index
| More lists.liballeg.org/allegro-developers Archives
]
Jose Antonio Luque wrote:
[snip]
What are the differences? in all documents that i found in the net, they are
'equivalents'
SSE contians instructions for doing SIMD on floating point numbers. MMX+ is
simply an extention of MMX to add useful stuff for integer arithmetic.
Athlons pre-XP have MMX+ but not SSE.
[snip]
Durons don't have the same family-model-stepping that TB.
Ok. Then how come your duron gets a higher score with MMX+ while Javier's
gets a significantly lower one? Unless I can differentiate the two, then
there's no point in adding the extra layer of cpu detection.
[snip]
Bit0: FPU
Right. I forgot about that one :)
and we can add other variables. char *cpu_name
This would be good. It'll fix the Pentium 4 problem.
dword cpu_l1cache (hiword(code cache) and loword(data cache))
dword cpu_l2cache (loword(unified cache))
Useless IMO. If we have the stepping and CPU name, it's enough to know the
cache sizes. Plus, the cache sizes aren'te very useful information.
--
- Robert J Ohannessian
"Microsoft code is probably O(n^20)" (my CS prof)
http://pages.infinit.net/voidstar/