Re: [AD] Allegro 16-bit graphics clears

[Peter Wang <tjaden@xxxxxxxxxx>]

Esaelon@xxxxxxxxxx <Esaelon@xxxxxxxxxx> wrote:
> Just finished with optimizing 8-bit blitters and clears, started on 16-bit 
> and noticed that if the clear has an odd destination address for a line, the 
> clear will be done with incorrect pixel alignment (high and low bytes will be 
> swapped), because of the alignment code? Is it possible for it to receive an 
> odd destination address (I'd assume it is)? Is this a bug?

I think it's a requirement to be correctly aligned, otherwise things
would be horribly slow, right?  You would have to deal with
misalignment only in the 24-bit code, I think.

> I found another bug in 8 and 16-bit MMX clears using segment registers, 
> already fixed that one in my code, was in post-alignment size fixup when 
> destination was misaligned - add had source and destination swapped.

Are you using CVS?  Something like this was already fixed, and might
be the same bug.

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