Re: [hatari-devel] undefined behaviour fixes

[Andreas Grabher <andreas_g86@xxxxxxxxxx>]

> Am 31.12.2024 um 18:24 schrieb Andreas Grabher <andreas_g86@xxxxxxxxxx>:
> 
> Hello Toni,
> 
> here is a little patch that should fix some undefined behaviour (getting these from runtime checking). Please review before applying the patch.
> 
> There are many more warnings from cpuemu_XX files. But I don’t know how to fix those.
> 
> Kind regards,
> Andreas
> 
> <cpu_warnings.txt>

I found some more. An updated patch is appended.

diff -ru a/src/cpu/cpummu030.c b/src/cpu/cpummu030.c
--- a/src/cpu/cpummu030.c	2024-10-27 15:30:07
+++ b/src/cpu/cpummu030.c	2025-01-04 18:02:56
@@ -910,7 +910,7 @@
         mmu030.translation.table[i].shift = shift;
         /* Build the mask */
         for (j = 0; j < TI_bits[i]; j++) {
-            mmu030.translation.table[i].mask |= (1<<(mmu030.translation.table[i].shift + j));
+            mmu030.translation.table[i].mask |= (1UL<<(mmu030.translation.table[i].shift + j));
         }
         /* Update until reaching the last table */
         mmu030.translation.last_table = i;
@@ -1799,10 +1799,10 @@
 	if (!data)
 		return;
 	int reg = data & 7;
-	int adj = (data & (1 << 5)) ? -1 : 1;
+	uae_s32 adj = (data & (1 << 5)) ? -1 : 1;
 	if (dir)
 		adj = -adj;
-	adj <<= (data >> 3) & 3;
+	adj = (uae_s32)((uae_u32)adj << ((data >> 3) & 3));
 	m68k_areg(regs, reg) += adj;
 	if (idx >= 0) {
 		struct mmufixup *m = &mmufixup[idx];
@@ -3139,7 +3139,7 @@
 	uae_s32 regd = regs.regs[reg];
 	if ((dp & 0x800) == 0)
 		regd = (uae_s32)(uae_s16)regd;
-	regd <<= (dp >> 9) & 3;
+	regd = (uae_s32)((uae_u32)regd << ((dp >> 9) & 3));
 	if (dp & 0x100) {
 		uae_s32 outer = 0;
 		if (dp & 0x80)
diff -ru a/src/cpu/fpp_softfloat.c b/src/cpu/fpp_softfloat.c
--- a/src/cpu/fpp_softfloat.c	2022-12-29 16:51:59
+++ b/src/cpu/fpp_softfloat.c	2024-12-31 13:52:10
@@ -229,7 +229,7 @@
 static void from_exten(fpdata *fpd, uae_u32 *wrd1, uae_u32 *wrd2, uae_u32 *wrd3)
 {
 	floatx80 f = floatx80_to_floatx80(fpd->fpx, &fs);
-	*wrd1 = (uae_u32)(f.high << 16);
+	*wrd1 = (uae_u32)f.high << 16;
 	*wrd2 = f.low >> 32;
 	*wrd3 = (uae_u32)f.low;
 }
@@ -241,7 +241,7 @@
 }
 static void from_exten_fmovem(fpdata *fpd, uae_u32 *wrd1, uae_u32 *wrd2, uae_u32 *wrd3)
  {
-	*wrd1 = (uae_u32)(fpd->fpx.high << 16);
+	*wrd1 = (uae_u32)fpd->fpx.high << 16;
 	*wrd2 = fpd->fpx.low >> 32;
 	*wrd3 = (uae_u32)fpd->fpx.low;
  }
diff -ru a/src/cpu/memory.c b/src/cpu/memory.c
--- a/src/cpu/memory.c	2025-01-01 11:38:55
+++ b/src/cpu/memory.c	2025-01-04 17:56:10
@@ -599,28 +599,28 @@
 			for (i=0; i<(size*4); i++) {
 				a=old>>(i*2)&3;
 				b=new>>(i*2)&3;
-				v|=mwf0[a][b]<<(i*2);
+				v|=(uae_u32)mwf0[a][b]<<(i*2);
 			}
 			return v;
 		case 1:
 			for (i=0; i<(size*4); i++) {
 				a=old>>(i*2)&3;
 				b=new>>(i*2)&3;
-				v|=mwf1[a][b]<<(i*2);
+				v|=(uae_u32)mwf1[a][b]<<(i*2);
 			}
 			return v;
 		case 2:
 			for (i=0; i<(size*4); i++) {
 				a=old>>(i*2)&3;
 				b=new>>(i*2)&3;
-				v|=mwf2[a][b]<<(i*2);
+				v|=(uae_u32)mwf2[a][b]<<(i*2);
 			}
 			return v;
 		case 3:
 			for (i=0; i<(size*4); i++) {
 				a=old>>(i*2)&3;
 				b=new>>(i*2)&3;
-				v|=mwf3[a][b]<<(i*2);
+				v|=(uae_u32)mwf3[a][b]<<(i*2);
 			}
 			return v;
 			
diff -ru a/src/cpu/newcpu_common.c b/src/cpu/newcpu_common.c
--- a/src/cpu/newcpu_common.c	2024-05-04 20:10:03
+++ b/src/cpu/newcpu_common.c	2025-01-01 14:31:05
@@ -459,7 +459,7 @@
 	uae_s32 regd = regs.regs[reg];
 	if ((dp & 0x800) == 0)
 		regd = (uae_s32)(uae_s16)regd;
-	regd <<= (dp >> 9) & 3;
+	regd = (uae_s32)((uae_u32)regd << ((dp >> 9) & 3));
 	if (dp & 0x100) {
 
 		uae_s32 outer = 0;
@@ -1266,7 +1266,7 @@
 
 		if (extra & 0x400) {
 			a &= 0xffffffffu;
-			a |= (uae_s64)m68k_dreg (regs, extra & 7) << 32;
+			a |= (uae_u64)m68k_dreg (regs, extra & 7) << 32;
 		}
 
 		if (src == 0) {
@@ -1556,7 +1556,7 @@
 			ps |= ((regs.pipeline_pos & 15) << 16);
 			ps |= ((regs.pipeline_stop & 15) << 20);
 			if (mmu030_opcode == -1)
-				ps |= 1 << 31;
+				ps |= 1UL << 31;
 			m68k_areg(regs, 7) -= 4;
 			x_put_long(m68k_areg(regs, 7), ps);
 		}