[hatari-devel] undefined behaviour fixes |
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- To: Toni Wilen <twilen@xxxxxxxxxx>, Hatari devel list <hatari-devel@xxxxxxxxxxxxxxxxxxx>
- Subject: [hatari-devel] undefined behaviour fixes
- From: Andreas Grabher <andreas_g86@xxxxxxxxxx>
- Date: Tue, 31 Dec 2024 18:24:15 +0100
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Hello Toni,
here is a little patch that should fix some undefined behaviour (getting these from runtime checking). Please review before applying the patch.
There are many more warnings from cpuemu_XX files. But I don’t know how to fix those.
Kind regards,
Andreas
diff -ru a/src/cpu/cpummu030.c b/src/cpu/cpummu030.c
--- a/src/cpu/cpummu030.c 2024-10-27 15:30:07
+++ b/src/cpu/cpummu030.c 2024-12-31 13:44:16
@@ -910,7 +910,7 @@
mmu030.translation.table[i].shift = shift;
/* Build the mask */
for (j = 0; j < TI_bits[i]; j++) {
- mmu030.translation.table[i].mask |= (1<<(mmu030.translation.table[i].shift + j));
+ mmu030.translation.table[i].mask |= (1UL<<(mmu030.translation.table[i].shift + j));
}
/* Update until reaching the last table */
mmu030.translation.last_table = i;
diff -ru a/src/cpu/fpp_softfloat.c b/src/cpu/fpp_softfloat.c
--- a/src/cpu/fpp_softfloat.c 2022-12-29 16:51:59
+++ b/src/cpu/fpp_softfloat.c 2024-12-31 13:52:10
@@ -229,7 +229,7 @@
static void from_exten(fpdata *fpd, uae_u32 *wrd1, uae_u32 *wrd2, uae_u32 *wrd3)
{
floatx80 f = floatx80_to_floatx80(fpd->fpx, &fs);
- *wrd1 = (uae_u32)(f.high << 16);
+ *wrd1 = (uae_u32)f.high << 16;
*wrd2 = f.low >> 32;
*wrd3 = (uae_u32)f.low;
}
@@ -241,7 +241,7 @@
}
static void from_exten_fmovem(fpdata *fpd, uae_u32 *wrd1, uae_u32 *wrd2, uae_u32 *wrd3)
{
- *wrd1 = (uae_u32)(fpd->fpx.high << 16);
+ *wrd1 = (uae_u32)fpd->fpx.high << 16;
*wrd2 = fpd->fpx.low >> 32;
*wrd3 = (uae_u32)fpd->fpx.low;
}
diff -ru a/src/cpu/newcpu_common.c b/src/cpu/newcpu_common.c
--- a/src/cpu/newcpu_common.c 2024-05-04 20:10:03
+++ b/src/cpu/newcpu_common.c 2024-12-31 16:22:34
@@ -459,7 +459,7 @@
uae_s32 regd = regs.regs[reg];
if ((dp & 0x800) == 0)
regd = (uae_s32)(uae_s16)regd;
- regd <<= (dp >> 9) & 3;
+ regd = (uae_s32)((uae_u32)regd << ((dp >> 9) & 3));
if (dp & 0x100) {
uae_s32 outer = 0;
@@ -1556,7 +1556,7 @@
ps |= ((regs.pipeline_pos & 15) << 16);
ps |= ((regs.pipeline_stop & 15) << 20);
if (mmu030_opcode == -1)
- ps |= 1 << 31;
+ ps |= 1UL << 31;
m68k_areg(regs, 7) -= 4;
x_put_long(m68k_areg(regs, 7), ps);
}