Re: [hatari-devel] Adding cache support for the MegaSTE

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Le 12/07/2024 à 16:09, Christian Zietz a écrit :
Nicolas Pomarède schrieb:

No problem, run the program in high res (it won't change the value of
ff8260). And when I will compare results with Hatari I will run in high
res too.
As long as we compare similar resolution it will be ok.

Results from my MegaSTE in high-res are attached. I ran the program five times, the results were 100% identical. Hope that helps.


Yes, that will help a lot :)

5th test is filling memory with 16384 "move.b #$ff,(a0)+" and then reading same memory with 8192 "move.w (a0)+,d0"

from the result it means that we have cache hit when reading (total=$df). This is slower than 3rd test ($a7) but that's because we have 16384 writes instead of 8192 writes.

Is that correct ? I think that's what we see on schematic for the megaSTE where cache RAM U004 and U005 have a their own WE signal, which is provided by the U012 PAL (just below on schema). And this PAL (we don't have its internal programming) might use LDS/UDS to drive WE on RAM1 and/or RAM2 depending on the kind of write made by the cpu, thus allowing to fill the cache with bytes or words.

Nicolas



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