Re: [hatari-devel] Dynamic Bus Sizing and I/O Register Access

[Mariusz Buras <mariusz.buras@xxxxxxxxx>]

Not sure I've understood everything correctly, but dynamic bus sizing is used on Falcon to access DSP host port which is 8 bit physically but can be accessed as 32 bit in one CPU read. This is the reason why we can't use blitter for DSP access btw.

Best

 Mariusz

On Sun, 14 Jan 2024 at 19:25, Thomas Huth <th.huth@xxxxxxxxx> wrote:

Am Sun, 14 Jan 2024 08:40:33 +0100
schrieb Andreas Grabher <andreas_g86@xxxxxxxxxx>:

> > Am 12.01.2024 um 20:14 schrieb Thomas Huth <th.huth@xxxxxxxxx>:
> >
> > Am Fri, 12 Jan 2024 19:58:00 +0100
> > schrieb Andreas Grabher <andreas_g86@xxxxxxxxxx>:
> >   
> >>> Am 12.01.2024 um 19:41 schrieb Thomas Huth <th.huth@xxxxxxxxx>:
> >>>
> >>> Yes, right. This basically depends on what your I/O hardware (like the
> >>> "glue" on the ST) is doing with the accesses on the bus.
> >>>
> >>> Do you know what's supposed to happen if the bootloader write a 32-bit word
> >>> to 0x02010000 ? For example, if it wrote 0x12345678 to that address, which
> >>> byte is supposed to end up in the brightness register?
> >>>
> >>> Thomas   
> >>
> >> In this example on real hardware (68030) it would write 0x78. 
> >
> > Ok, that's quite different compared to the I/O registers on the Atari (but
> > perfectly possible if the NeXT hardware has been designed that way). I think
> > in that case you have to read the value from
> >
> > IoMem[(IoAccessCurrentAddress + nIoMemAccessSize - 1) & IO_SEG_MASK]
> >
> > instead.
> >
> > HTH,
> >  Thomas
> >   
>
> I’not sure this is specific to NeXT. There is a chapter about dynamic bus sizing in the user manual of the 68030 and this does not seem to be implemented in Hatari.

Maybe this happens on other m68k machines, too, but on the Atari computers,
the "Glue" chip (I think) makes sure that such things don't happen. At
least we've never seen this on real Atari hardware so far, so I think
Hatari is not affected by this.

 Thomas