Re: [hatari-devel] Dynamic Bus Sizing and I/O Register Access

[Andreas Grabher <andreas_g86@xxxxxxxxxx>]

> Am 14.01.2024 um 08:40 schrieb Andreas Grabher <andreas_g86@xxxxxxxxxx>:
> 
> 
> 
>> Am 12.01.2024 um 20:14 schrieb Thomas Huth <th.huth@xxxxxxxxx>:
>> 
>> Am Fri, 12 Jan 2024 19:58:00 +0100
>> schrieb Andreas Grabher <andreas_g86@xxxxxxxxxx>:
>> 
>>>> Am 12.01.2024 um 19:41 schrieb Thomas Huth <th.huth@xxxxxxxxx>:
>>>> 
>>>> Yes, right. This basically depends on what your I/O hardware (like the
>>>> "glue" on the ST) is doing with the accesses on the bus.
>>>> 
>>>> Do you know what's supposed to happen if the bootloader write a 32-bit word
>>>> to 0x02010000 ? For example, if it wrote 0x12345678 to that address, which
>>>> byte is supposed to end up in the brightness register?
>>>> 
>>>> Thomas  
>>> 
>>> In this example on real hardware (68030) it would write 0x78.
>> 
>> Ok, that's quite different compared to the I/O registers on the Atari (but
>> perfectly possible if the NeXT hardware has been designed that way). I think
>> in that case you have to read the value from 
>> 
>> IoMem[(IoAccessCurrentAddress + nIoMemAccessSize - 1) & IO_SEG_MASK]
>> 
>> instead.
>> 
>> HTH,
>> Thomas
>> 
> 
> I’not sure this is specific to NeXT. There is a chapter about dynamic bus sizing in the user manual of the 68030 and this does not seem to be implemented in Hatari.
> 
> Regards,
> Andreas 
> 
This commend from a NeXTstep header file indicates, that there behaviour when reading or writing devices depends on processor model (68040 does not have dynamic bus sizing):

 *	Made dd_csr in struct dma_dev an int (and changed the corresponding
 *	register #defines) because this register responds as a 32-bit device
 *	and therefore needs to be accessed this way to work on the 68040.

Old versions of NeXTstep (from when the 68040 didn’t exist) access this register with byte access, later versions access the register with long access even if running on 68030 NeXTs. I think something is missing here.