Re: [hatari-devel] NVRAM register handling, Hatari vs. Aranym

[Thorsten Otto <admin@xxxxxxxxxxx>]

On Sonntag, 31. März 2019 12:26:04 CEST Eero Tamminen wrote:

> Neither EmuTOS nor real TOS read registers 6 & 11.

 

Maybe not TOS, but the 12h/24h flag is set by the general.cpx

 

> Any idea what that bit is for?

 

According to the MC146818 Manual:

 

Register B:

+-------+-------+-------------------------------+

| Bit 7 | SET | 0=Update cycle normally |

| | | 1=Abort update cycle |

+-------+-------+-------------------------------+

| Bit 6 | PIE | Periodic Interrupt enable |

+-------+-------+-------------------------------+

| Bit 5 | AIE | Alarm Interrupt enable |

+-------+-------+-------------------------------+

| Bit 4 | UIE | Update ended Interrupt enable |

+-------+-------+-------------------------------+

| Bit 3 | SQWE | Square-Wave enable |

+-------+-------+-------------------------------+

| Bit 2 | DM | Data Mode 1=Binary 0=BCD |

+-------+-------+-------------------------------+

| Bit 1 | 24/12 | 1=24hr 0=12hr mode |

+-------+-------+-------------------------------+

| Bit 0 | DSE | Daylight savings enable |

+-------+-------+-------------------------------+

 

>Aranym handled register 10 earlier like Hatari did, but Thorsten

>changed it in at the same time he implemented register 11 support.

>There was no comment why reg 10 was also changed.

 

Because the real hardware would also return the whole register, not just the UIP in progress bit. However, the other bits in that register (Rate selector and divider) are not emulated yet.