Re: [hatari-devel] NVRAM register handling, Hatari vs. Aranym

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Le 31/03/2019 à 12:26, Eero Tamminen a écrit :

Because I got into debug log warnings about unimplemented NVRAM
registers 6 and 11 when booting Linux, I looked at Aranym's
register handling.

Aranym has following differences to Hatari NVRAM register reads...

- 6: weekday
- 10: returns whole register value, not just UIP bit
- 11: clock mode bits (12/24h, BIN/BCD, clock set/freeze)
- 13: returns whole register value, not just 0x80

Do you see any problem if I would change things to behave like
with Aranym?

(i.e. adding reg 11 mode bits and toggling/returning the NVRAM
registers 10 & 13 directly instead just the relevant bit?)


Neither EmuTOS nor real TOS read registers 6 & 11.

XCONTROL.ACC doesn't use registers 6 & 13.
It uses 11 though, setting it to 0x80, 0x8e and 0x8e.

In Aranym code, 0x80 is the clock set/freeze bit, 0x4 is BCD bit,
0x2 is 12/24h bit, but it doesn't implement 0x8 bit.  Any idea
what that bit is for?

Aranym handled register 10 earlier like Hatari did, but Thorsten
changed it in at the same time he implemented register 11 support.
There was no comment why reg 10 was also changed.

Returning just 0x80 (valid RAM/time bit) from reg 13 is Hatari
specific, Aranym has never done that.


The spec for MC146818 can be found here and all the 4 A/B/C/D registers as well as calendar bytes are described. If Aranym added more emulation code to match the spec the I don't see any reason why the code could not be merged to Hatari


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