Re: [hatari-devel] Hatari and OUTSIDE (virtual memory manager) |
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Le 02/10/2018 à 17:43, Uwe Seimet a écrit :
I only tried OUTSIDE with the fix, not ROMSPEED. But from what you wrote
the result of the (now valid) instruction was not correct, because A0 should
have contained a valid page descriptor after execution, but it contained 0
instead.
Yes, in that case ptest returns 0.
This is the debug I get :
cpu video_cyc=183619 739@ 90 : 0001A794 f030 9f12 0161 0008
MMUOP030 (A0, A1.L*8+0)+353 == $b34033e1,#$0008
DEBUG: CPU Root Pointer: 8000000200000700
DEBUG: Table A at 00000700: index = 0,
DEBUG: Next descriptor: 0000074A
DEBUG: Table B at 00000740: index = 0,
DEBUG: Next descriptor: 000007CA
DEBUG: Table C at 000007C0: index = 14,
DEBUG: Next descriptor: 00E00009
DEBUG: Early termination page descriptor!
DEBUG: Logical address unused bits: 00000000 (mask = 000F8000)
DEBUG: Page at 00E00000
DEBUG: ATC is full. Replacing entry 1
DEBUG: ATC create entry(1): logical = 00E00000, physical = 00E00000, FC = 5
DEBUG: ATC create entry(1): B = 0, CI = 1, WP = 0, M = 0
DEBUG: ATC match(1): page addr = 00E00000, index = 00000008
DEBUG: PTESTR: addr = 00E00000, fc = 2, level = 7, PC=0001a79c,
DEBUG: return descriptor to register A0
mmu030_match_ttr tt0=2
mmu030_match_ttr tt1=2
DEBUG: PTEST status: 0000, B = 0, L = 0, S = 0, W = 0, I = 0, M = 0, T =
0, N = 0
mmu_op30_ptest will call "mmu030_ptest_table_search(extra, fc, write,
level)" which does this :
uae_u32 mmu030_ptest_table_search(uaecptr logical_addr, uae_u32 fc, bool
write, int level) {
if (mmu030_match_ttr(logical_addr, fc, write)&TT_OK_MATCH) {
return 0;
} else {
return mmu030_table_search(logical_addr, fc, write, level);
}
}
I added printf for mmu030_match_ttr (see above tt0=2 tt1=2), so
mmu030_match_ttr will return true and mmu030_ptest_table_search will
return 0, which explain why "a0=0" after ptest is complete.
If I modify mmu030_ptest_table_search to force a call of
mmu030_table_search, then program doesn't crash anymore and A0 contains
a valid address.
Toni, I read the 68000 family's PRM for PTEST and I don't see a mention
for checking TTR regs when ptest's level is > 0.
In the MMU status register, bit "transparent" is only updated for a
level=0 operation.
Could there be an error in this part of the emulation ?
Nicolas