Re: [hatari-devel] Re: [Emutos-devel] Aranym blitter |
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Nicolas Pomarède schrieb: > BTW christian, in the different tests you made, we saw that sometimes > nothing is written in dest. Could you add the number of words > read/written to the output of your test program ? (by subtracting start > source/dest address to end source/dest address). Maybe sometimes nothing > is written to dest but words are still read anyway ? The new test program and its result on my "Blitterized" STFm are attached. Note that NR (number *read*) and NW (number *written*) are -- like you suggested -- just the difference between addresses before and after using the Blitter, divided by 2, i.e. expressed in 16-bit words. Hence, NR=20 doesn't neccessarily mean that 20 words were read, most likely every 2nd word was skipped. (One would have to use a logic analyzer on the bus to see the actual bus cycles.) Also, there are no separate 68000 and 68030 of the test program anymore. It now disables the cache on a 68030, but still runs on a plain 68000 without crashing with invalid instruction. Regards Christian -- Christian Zietz - CHZ-Soft - czietz@xxxxxxx WWW: http://www.chzsoft.de/ PGP/GnuPG-Key-ID: 0x52CB97F66DA025CA / 0x6DA025CA
Attachment:
BLITEMU.TOS
Description: Binary data
>>>>> OP = 1 <<<<< SRC_INC = DST_INC = +2, FXSR = 0, NFSR = 0 0 1 2 3 4 5 6 7 8 9 -1 -1 -1 -1 -1 -1 RD=10 WR=10 SRC_INC = DST_INC = +2, FXSR = 0, NFSR = 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 RD=10 WR=10 SRC_INC = DST_INC = +2, FXSR = 1, NFSR = 0 1 3 5 7 9 11 13 15 17 19 -1 -1 -1 -1 -1 -1 RD=20 WR=10 SRC_INC = DST_INC = +2, FXSR = 1, NFSR = 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 RD=20 WR=10 SRC_INC = DST_INC = -2, FXSR = 0, NFSR = 0 -1 -1 -1 -1 -1 -1 55 56 57 58 59 60 61 62 63 -1 RD=10 WR=10 SRC_INC = DST_INC = -2, FXSR = 0, NFSR = 1 -1 -1 -1 -1 -1 -1 54 55 56 57 58 59 60 61 62 63 RD=10 WR=10 SRC_INC = DST_INC = -2, FXSR = 1, NFSR = 0 -1 -1 -1 -1 -1 -1 45 47 49 51 53 55 57 59 61 63 RD=20 WR=10 SRC_INC = DST_INC = -2, FXSR = 1, NFSR = 1 -1 -1 -1 -1 -1 -1 44 46 48 50 52 54 56 58 60 62 RD=20 WR=10 >>>>> OP = 3 <<<<< SRC_INC = DST_INC = +2, FXSR = 0, NFSR = 0 0 1 2 3 4 5 6 7 8 9 -1 -1 -1 -1 -1 -1 RD=10 WR=10 SRC_INC = DST_INC = +2, FXSR = 0, NFSR = 1 0 1 2 3 4 5 6 7 8 9 -1 -1 -1 -1 -1 -1 RD=10 WR=10 SRC_INC = DST_INC = +2, FXSR = 1, NFSR = 0 1 3 5 7 9 11 13 15 17 19 -1 -1 -1 -1 -1 -1 RD=20 WR=10 SRC_INC = DST_INC = +2, FXSR = 1, NFSR = 1 1 3 5 7 9 11 13 15 17 19 -1 -1 -1 -1 -1 -1 RD=20 WR=10 SRC_INC = DST_INC = -2, FXSR = 0, NFSR = 0 -1 -1 -1 -1 -1 -1 55 56 57 58 59 60 61 62 63 19 RD=10 WR=10 SRC_INC = DST_INC = -2, FXSR = 0, NFSR = 1 -1 -1 -1 -1 -1 -1 54 55 56 57 58 59 60 61 62 63 RD=10 WR=10 SRC_INC = DST_INC = -2, FXSR = 1, NFSR = 0 -1 -1 -1 -1 -1 -1 45 47 49 51 53 55 57 59 61 63 RD=20 WR=10 SRC_INC = DST_INC = -2, FXSR = 1, NFSR = 1 -1 -1 -1 -1 -1 -1 44 46 48 50 52 54 56 58 60 62 RD=20 WR=10 Total Blitter iterations: 16
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