| Re: [hatari-devel] TT palette issue |
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Hi,
Attached is a fix patch that re-uses ST color register
wrappers also for TT, like suggested by Nicolas. Accesses to
TT's 256 color registers it handles like suggested by Thomas.
Roger, could you do couple more palette tests on your TT?
According to Hatari code:
--------------------------
* Write to video shifter palette registers (0xff8240-0xff825e)
*
* When writing only to the upper byte of the color reg
* (instead of writing 16 bits at once with .W/.L).
* In that case, the byte written to address x is automatically written
* to address x+1 too (but we shouldn't copy x in x+1 after masking x ;
* we apply the mask at the end)
* Similarly, when writing a byte to address x+1, it's also written
* to address x
* So : move.w #0,$ff8240 -> color 0 is now $000
* move.b #7,$ff8240 -> color 0 is now $707 !
* move.b #$55,$ff8241 -> color 0 is now $555 !
* move.b #$71,$ff8240 -> color 0 is now $171
* (bytes are first copied, then masked)
--------------------------
I'd like to know whether this register byte access behavior
is ST/STE specific or whether it happens also on TT. My
current patch assumes that it happens also for TT, but
I'd like that verified before commiting the patch.
If somebody could do similar test also on Falcon, that
would be appreciated too. Current Videl emulation code
has that functionality commented out, with a TODO...
Nicolas, should shifter accesses on TT (and Falcon) be on
4 cycle boundary like they're on ST/STE?
- Eero
On 02/11/2016 09:27 AM, Thomas Huth wrote:
On 11.02.2016 00:31, Nicolas Pomarède wrote:
Le 11/02/2016 00:08, Nicolas Pomarède a écrit :
Le 09/02/2016 21:24, Eero Tamminen a écrit :
As this problem is there also with oldUAE CPU, I think it uses
long handler.
This is what the program itself does:
$00020db0 : movem.l (a1),d0-d7
$00020db4 : movem.l d0-d7,$ffff8240.w
It sets the whole palette with single .l instruction...
Hi
when setting io traces, could you tell what you get for these movem ?
(I don't have much time to run the demo myself at the moment)
forget above, back to your previous mail :
Additionally, my fix to the TT palette sync issue Roger reported,
breaks 4getful palette handling. The reason is similar to color
register writes on ST, IO register code doesn't support splitting
long access to 2 word accesses, so current code misses every other
color register change when they're written with longs.
Nicolas, should I add separate function for each ST color
register on TT, similarly to ST/e code, or change the ST/e color
register handling functions to do the work also for TT case?
The problem is indeed that ff8240 is defined as 32 bytes for TT with
only one handler, which will not automatically split each long into 2
words.
Instead of adding separate functions names in ioMemTT.c, I think you can
use the same block for ff8240-ff8260 and in video.c do for example :
void Video_Color15_WriteWord(void)
{
if ( machine == TT )
Video_TTColorSTRegs_WriteWord();
else
Video_ColorReg_WriteWord();
}
for each 16 registers.
When writing to ff8400 on the opposite, you would need 256 different
lines in ioMemTT.c, which is not very clean and maintanable. Better
leave it as it is now and fix it in a better way later (I don't think
there're many non working programs relying on this at the moment ?)
Alternative idea: Use one handler, and in that handler check for
nIoMemAccessSize == 4 ... in that case you have to handle a write to the
register after the current one, too.
Thomas
diff -r 9ddd8d4f9d56 src/includes/video.h
--- a/src/includes/video.h Mon Feb 08 23:46:14 2016 +0200
+++ b/src/includes/video.h Fri Feb 12 00:04:17 2016 +0200
@@ -224,7 +224,6 @@
extern void Video_HorScroll_Write(void);
extern void Video_TTShiftMode_WriteWord(void);
extern void Video_TTColorRegs_WriteWord(void);
-extern void Video_TTColorSTRegs_WriteWord(void);
extern void Video_Info(FILE *fp, Uint32 dummy);
diff -r 9ddd8d4f9d56 src/ioMemTabTT.c
--- a/src/ioMemTabTT.c Mon Feb 08 23:46:14 2016 +0200
+++ b/src/ioMemTabTT.c Fri Feb 12 00:04:17 2016 +0200
@@ -61,7 +61,22 @@
{ 0xff820d, SIZE_BYTE, Video_BaseLow_ReadByte, Video_ScreenBaseSTE_WriteByte },
{ 0xff820e, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
{ 0xff820f, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
- { 0xff8240, 32, IoMem_ReadWithoutInterception, Video_TTColorSTRegs_WriteWord }, /* 16 TT ST-palette entries */
+ { 0xff8240, SIZE_WORD, Video_Color0_ReadWord, Video_Color0_WriteWord }, /* ST palette color 0 */
+ { 0xff8242, SIZE_WORD, Video_Color1_ReadWord, Video_Color1_WriteWord }, /* ST palette color 1 */
+ { 0xff8244, SIZE_WORD, Video_Color2_ReadWord, Video_Color2_WriteWord }, /* ST palette color 2 */
+ { 0xff8246, SIZE_WORD, Video_Color3_ReadWord, Video_Color3_WriteWord }, /* ST palette color 3 */
+ { 0xff8248, SIZE_WORD, Video_Color4_ReadWord, Video_Color4_WriteWord }, /* ST palette color 4 */
+ { 0xff824a, SIZE_WORD, Video_Color5_ReadWord, Video_Color5_WriteWord }, /* ST palette color 5 */
+ { 0xff824c, SIZE_WORD, Video_Color6_ReadWord, Video_Color6_WriteWord }, /* ST palette color 6 */
+ { 0xff824e, SIZE_WORD, Video_Color7_ReadWord, Video_Color7_WriteWord }, /* ST palette color 7 */
+ { 0xff8250, SIZE_WORD, Video_Color8_ReadWord, Video_Color8_WriteWord }, /* ST palette color 8 */
+ { 0xff8252, SIZE_WORD, Video_Color9_ReadWord, Video_Color9_WriteWord }, /* ST palette color 9 */
+ { 0xff8254, SIZE_WORD, Video_Color10_ReadWord, Video_Color10_WriteWord }, /* ST palette color 10 */
+ { 0xff8256, SIZE_WORD, Video_Color11_ReadWord, Video_Color11_WriteWord }, /* ST palette color 11 */
+ { 0xff8258, SIZE_WORD, Video_Color12_ReadWord, Video_Color12_WriteWord }, /* ST palette color 12 */
+ { 0xff825a, SIZE_WORD, Video_Color13_ReadWord, Video_Color13_WriteWord }, /* ST palette color 13 */
+ { 0xff825c, SIZE_WORD, Video_Color14_ReadWord, Video_Color14_WriteWord }, /* ST palette color 14 */
+ { 0xff825e, SIZE_WORD, Video_Color15_ReadWord, Video_Color15_WriteWord }, /* ST palette color 15 */
{ 0xff8260, SIZE_BYTE, Video_ShifterMode_ReadByte, Video_ShifterMode_WriteByte },
{ 0xff8261, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus errors here : return 0 not ff */
{ 0xff8262, SIZE_WORD, IoMem_ReadWithoutInterception, Video_TTShiftMode_WriteWord }, /* TT screen mode */
diff -r 9ddd8d4f9d56 src/video.c
--- a/src/video.c Mon Feb 08 23:46:14 2016 +0200
+++ b/src/video.c Fri Feb 12 00:04:17 2016 +0200
@@ -591,6 +591,8 @@
static void Video_ColorReg_WriteWord(void);
static void Video_ColorReg_ReadWord(void);
+static void Video_TTColorSTReg_WriteWord(Uint32 addr, Uint16 stcolor);
+
/*-----------------------------------------------------------------------*/
/**
@@ -3571,15 +3573,13 @@
*/
static void Video_ColorReg_WriteWord(void)
{
+ const int machine = ConfigureParams.System.nMachineType;
Uint32 addr;
Uint16 col;
int idx;
addr = IoAccessCurrentAddress;
- /* Access to shifter regs are on a 4 cycle boundary */
- M68000_SyncCpuBus_OnWriteAccess();
-
/* Handle special case when writing only to the upper byte of the color reg */
if (nIoMemAccessSize == SIZE_BYTE && (IoAccessCurrentAddress & 1) == 0)
col = (IoMem_ReadByte(addr) << 8) + IoMem_ReadByte(addr); /* copy upper byte into lower byte */
@@ -3590,7 +3590,7 @@
else
col = IoMem_ReadWord(addr);
- if (ConfigureParams.System.nMachineType == MACHINE_ST)
+ if (machine == MACHINE_ST || machine == MACHINE_TT)
col &= 0x777; /* Mask off to ST 512 palette */
else
col &= 0xfff; /* Mask off to STe 4096 palette */
@@ -3598,6 +3598,15 @@
addr &= 0xfffffffe; /* Ensure addr is even to store the 16 bit color */
IoMem_WriteWord(addr, col); /* (some games write 0xFFFF and read back to see if STe) */
+ if (machine == MACHINE_TT)
+ {
+ Video_TTColorSTReg_WriteWord(addr, col);
+ return;
+ }
+
+ /* Access to shifter regs are on a 4 cycle boundary */
+ M68000_SyncCpuBus_OnWriteAccess();
+
idx = (addr - 0xff8240) / 2; /* words */
if (bUseHighRes || (bUseVDIRes && VDIPlanes == 1))
@@ -4079,20 +4088,27 @@
const Uint32 stpalette = 0xff8240;
const Uint32 ttpalette = 0xff8400;
Uint16 stcolor, ttcolor;
- int page, offset;
+ int page, offset, i;
+ Uint32 addr;
page = (IoMem_ReadWord(0xff8262) & 0x0f);
- offset = IoAccessCurrentAddress - (ttpalette + page * 16*SIZE_WORD);
- if (offset >= 0 && offset < 16*SIZE_WORD)
+
+ addr = IoAccessCurrentAddress & 0xfffffffe; /* ensure even address */
+ offset = addr - (ttpalette + page * 16*SIZE_WORD);
+
+ for (i = 0; i < nIoMemAccessSize; i += 2)
{
- ttcolor = IoMem_ReadWord(IoAccessCurrentAddress);
+ if (offset < 0 || offset >= 16*SIZE_WORD)
+ return;
+ ttcolor = IoMem_ReadWord(addr);
stcolor = ((ttcolor >> 1) & 0x777) | ((ttcolor >> 3) & 0x888);
IoMem_WriteWord(stpalette + offset, stcolor);
#if 0
- fprintf(stderr, "0x%x: 0x%x (TT) -> 0x%x: 0x%x (ST)\n",
- IoAccessCurrentAddress, ttcolor,
- stpalette + offset, stcolor);
+ fprintf(stderr, "0x%x: 0x%03x (TT) -> 0x%x: 0x%03x (ST)\n",
+ addr, ttcolor, stpalette + offset, stcolor);
#endif
+ offset += 2;
+ addr += 2;
}
bTTColorsSync = false;
}
@@ -4103,25 +4119,23 @@
*
* Sync ST to TT color register
*/
-void Video_TTColorSTRegs_WriteWord(void)
+static void Video_TTColorSTReg_WriteWord(Uint32 addr, Uint16 stcolor)
{
const Uint32 stpalette = 0xff8240;
const Uint32 ttpalette = 0xff8400;
- Uint16 stcolor, ttcolor;
int page, offset;
+ Uint16 ttcolor;
page = (IoMem_ReadWord(0xff8262) & 0x0f);
- offset = IoAccessCurrentAddress - stpalette;
+ offset = addr - stpalette;
assert(offset > 0 && offset < 16*SIZE_WORD);
offset += page * 16*SIZE_WORD;
- stcolor = IoMem_ReadWord(IoAccessCurrentAddress);
ttcolor = ((stcolor&0x777) << 1) | ((stcolor&0x888) >> 3);
IoMem_WriteWord(ttpalette + offset, ttcolor);
#if 0
- fprintf(stderr, "0x%x: 0x%x (ST) -> 0x%x: 0x%x (TT)\n",
- IoAccessCurrentAddress, stcolor,
- ttpalette + offset, ttcolor);
+ fprintf(stderr, "0x%x: 0x%03x (ST) -> 0x%x: 0x%03x (TT)\n",
+ addr, stcolor, ttpalette + offset, ttcolor);
#endif
bTTColorsSync = false;
}