|Re: [hatari-devel] Floppy emulation in fdc.c|
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Le 15/12/2014 04:27, Roger Burrows a écrit :
I was trying to figure out the hardware register at $860f on a Falcon, so I
looked in Hatari's fdc.c. I saw the comments around line 4600, which helps a
bit. I have an extra piece of info for you Hatari folks (you may know this
already): during a write sector or write track sequence, TOS4 sends a large
sector count to the DMA sector count register, then loops waiting for bit 3 of
$860f to become zero before it selects the FDC command register and sends the
FDC write track command. So bit 3 seems to act as a sort of "DMA/FDC busy"
indicator. But it must be a bit more complex than that, because it isn't
tested during a read sector sequence.
I don't think falcon's specific FDC bits were tested a lot. So far, this
register is not really emulated. Maybe if wa had example of non working
programs this could help to understand better its behaviour.
While looking through fdc.c, I noticed the following in
FDC_Get_Statusbar_Text(), around line 692:
else if ( ( Command & 0xe0 ) == 0x50 ) strcpy ( CommandText , "SO" ); /* Step
Shouldn't that be 0x60 instead of 0x50? Not very important, of course, since
it only affects the status bar display.
You're right, I made an error while reading the doc, I will change this.