Re: [hatari-devel] DSP bug: need more explanations

[Laurent Sallafranque <laurent.sallafranque@xxxxxxx>]

Hi,

I really need some explanations here ;)
I think my patch is working (and solves some case), but the DSP doesn't 
behave as described in the documentation.

An example :

test2:    ; start the test
    move    #$0,n4
    move    #8,r5
    move    #3,n5
    move    r5,x:0
    nop
    nop
    lua    (r5)-n5,n4
    move     n4,x:0

    wait_transmit
    move    n4,x:HTX

    wait_transmit
    move    x:0,a
    move    a,x:HTX


The lua gets the value of (r5)-n5 and store it into n4.
Then n4 is immediatly stored into memory x:0
I then read and display the values of n4 and x:0 (68030 side)

According to motorola doc (see below), there's a one instruction delay 
before using the modified register, so x:0 should contain the previous 
value of N4 (ie 0).
N4 has got t he time to set to its final value (ie: 5) because of the 
wait_transmit.


On the real falcon, I get :

N4 = 5
x:0 = 5  (this goes against what the motorola doc says I think)


On hatari unpatched, I get :

N4 = 5
x:0 = 5  (this goes against what the motorola doc says I think)


On hatari patched, I get
N4 = 5
x:0 = 0 (should be as the motorola doc says)


The motorola doc says (for LUA instruction)

LUA   Load Updated Address
Operation:
ea➞d
Assembler Syntax:
LUA ea,D
Description: Load the updated address into the destination address 
register D. The source
address register and the update mode used to compute the updated address 
are speci-
fied by the effective address (ea). Note that the source address 
register specified in
the effective address is not updated. All update addressing modes may be 
used.
Note: This instruction is considered to be a move-type instruction. Due 
to pipelining, the
new contents of the destination address register (R0–R7 or N0–N7) will 
not be available
for use during the following instruction (i.e., there is a single 
instruction cycle pipeline
delay).

The last sentence (the note:) is the one I don't understand.


So, if I delay the register setting by one instruction (Rx or Nx), as 
described in the doc, sometimes it solves a bug, sometimes it creates one.

Is there someone that has a better explanation of this ? (Doug, Mikro, 
other ?)

Best regards

Laurent