----- Nicolas Pomarède wrote:
Le 03/06/2014 20:21, David Savinkoff a écrit :
I looked at the LMC1992 data sheet, here is what I surmise:
1) The mask must be at least eleven consecutive bits long, or the
LMC1992 is left in an intermediate state, and restarts the sequence
when there is a break in the mask. Think of the Mask as an enable
signal.
(Six usable 11 bit Masks. eg. 0011111111111000, 0000011111111111)
(Five usable 12 bit Masks)
(Zero usable Masks less than 11 bits long)
Note that it may be possible to send two (or more) 16 bit Masks that
act as a single 32 bit Mask.
( 0000000000011111, 1111110000000000 )
Someone should test this 32 bit mask on a real STe because it
probably works. If it doesn't work, it should be determined what
happens.
2) The first two Mask bits are a device address. The last nine bits
are register bits. Any bits between the first two and last nine are
lost when the Mask is longer than eleven bits.
This is what I implemented, except I didn't handle the fact that you
could have a mask like 1100 0111 1111 1111 where you should ignore the 5
first bits and check again the 11 other bits. Hopefully, no one used a
mask like this, else I could fix it if needed.
I see you noted this in the source code for future reference.
(I would expect the mask to be shifted 16 bits, not rotated.)
Nicolas