Re: [hatari-devel] Code execution discontinuities and detecting them?

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Hi Eero,

Sorry for the late answer, I had very little time for me these days.

The maximum instruction length for the DSP is 2 words (all instructions decode in 1 word and some of them need a second word for an address or a data).

Interrupts are quite easy to detect in the DSP, as the first $40 locations of DSP56001 on-chip P:memory are used for interrupt vectors. (These adresses work 2 by 2)

P:$0000 3  Hardware RESET (External)
P:$0002 3 Stack Error
P:$0004 3 Trace
P:$0006 3 SWI (Software Interrupt)
P:$0008 0-2 IRQA (External)
P:$000A 0-2 IRQB (External)
P:$000C 0-2 SSI Receive Data
P:$000E 0-2 SSI Receive Data with Exception Status
P:$0010 0-2 SSI Transmit Data
P:$0012 0-2 SSI Transmit Data with Exception Status
P:$0014 0-2 SCI Receive Data
P:$0016 0-2 SCI Receive Data with Exception Status
P:$0018 0-2 SCI Transmit Data
P:$001A 0-2 SCI Idle Line
P:$001C 0-2 SCI Timer
P:$001E 3 P:$0020 0-2 Host Receive Data
P:$0022 0-2 Host Transmit Data
P:$0024 0-2 Host Command (Default)
P:$0026 0-2 Available for Host Command
P:$0028 0-2 Available for Host Command
P:$002A 0-2 Available for Host Command
P:$002C 0-2 Available for Host Command
P:$002E 0-2 Available for Host Command
P:$0030 0-2 Available for Host Command
P:$0032 0-2 Available for Host Command
P:$0034 0-2 Available for Host Command
P:$0036 0-2 Available for Host Command
P:$0038 0-2 Available for Host Command
P:$003A 0-2 Available for Host Command
P:$003C 0-2 Available for Host Command
P:$003E P:$0000 or P:$E000 0-2 Illegal Instruction


When a program interrupts, the PC goes to one of these location (eg :$002E and P:$002F), does execute the 1 or 2 instructions there and then returns to the original code. Careful, if the first instruction is a jump, the PC may not go to the second vector address

If you need more infos on this point, just ask.


There's only one RTE : in the DSP, it's called RTI

It's opcode is 0000000 0000000 00000100



For the branches and jump instructions, there are many instructions (like for the JSR ones).

JMP

00001100 0000aaaa aaaaaaaa
00001010 11MMMRRR 10000000

JCC

00001110 CCCCaaaa aaaaaaaa
00001010 11MMMRRR 1010CCCC


JCLR
00001010 10pppppp 1S0bbbbb
00001010 01MMMRRR 1S0bbbbb
00001010 00aaaaaa 1S0bbbbb
00001010 11dddddd 000bbbbb

JSET

00001010 10pppppp 1S1bbbbb
00001010 01MMMRRR 1S1bbbbb
00001010 00aaaaaa 1S1bbbbb
00001010 11dddddd 001bbbbb




DO/ENDO : Does an hardware loop
00000110 iiiiiiii 1000hhhh
00000110 11DDDDDD 00000000
00000110 01MMMRRR 0S000000
00000110 00aaaaaa 0S0000000



REP / Repeat the next instruction (hardware repeat uninterruptible)
00000110 iiiiiiii 1010hhhh
00000110 11dddddd 00100000
00000110 01MMMRRR 0s100000
00000110 00aaaaaa 0s100000


Best regards Eero, and just ask more if needed.

Laurent


Le 18/03/2013 15:11, Eero Tamminen a écrit :
Hi,

On lauantai 16 maaliskuu 2013, Eero Tamminen wrote:
Btw. I've thought of counting cycles, i-cache misses etc for a subset
of the tracked calls.  It can be done for subroutine calls, by saving
the values when the call is done, and storing difference to current
values when the call returns.

For this to work also for DSP, I need to know what are DSP subroutine
call instructions, subroutine call return instruction(s) and their
opcodes.
I still need at least the maximum instruction lenght and opcodes for
instructions for returning from exception handlers (like RTE on m68k)....


What about branch and jump instructions,
are there several of those also?
And these are nice to have to understand the graph better
(now that different "call" types are shown in graphs with
different arrow types).


	- Eero







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