|Re: [hatari-devel] 68030 MMU work|
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> Now that could mean two things ... either the Falcon custom chip that
> is responsible for dispatching the memory accesses (the Combel chip, I
> think) still takes care of that supervisor logic ... or the low memory
> is now protected via the MMU.
> I guess we need to decode the MMU tables of TOS to find out...
Unfortunately I can hardly remember how the PMMU works, and when I look
at some of my old programs using the PMMU I also don't know anymore how they
Anyway, I don't think the PMMU protects the adresses below $1000. The
standard page size is 32K and as far as I remember the transparent
translation registers are not used by TOS 4.0. The memory above $1000 is
not protected, so it cannot be the PMMU.
And I cannot remember doing anything special in OUTSIDE when a smaller page
size was configured by the user. All in all I don't think there are special
rules for the low memory.