[eigen] Altivec port status, bugs fixed

[Konstantinos Margaritis <markos@xxxxxxxxxxx>]

Hi all,

It's been a long time since I've tested either the Altivec or NEON
port, though I understand the latter is being tested quite
extensively, but not the former. As all my powerpc boxes are now kaput
-well, they work but are unreliable- so I am going to be (ab)using one
of the Debian porterboxes which is a Power7 (much faster than my
previous G4 anyway), which will help me track the port and if
allowed it even run nightlies as well.

So I just cloned a recent master branch of eigen and tried
running the tests with Altivec enabled. Both good and bad news, it
branch still compiles, almost all tests pass, but 2 fail, one of them
being vectorization_logic. I guess it will be something easy to fix. I
will look into this and will commit a fix when I fix it, and will try
to add VSX support while I'm at it, as I'm testing on a Power7.

If the fix only affects the altivec part I will commit the fix,
otherwise I'll do a pull request.

Regards

Konstantinos

PS. FTR, I did both ports a few years back but due to real life and job
changes I had to shift my focus elsewhere, but I'm trying to slowly get
back to my favourite field, SIMD, one way is writing a SIMD comparative
reference guide between all SIMD engines. Eigen implementations has been
greatly helpful in understanding some parts of SSE and AVX, which I
was not that familiar with, and I'm definitely going to mention this in
my book:

http://www.freevec.org/node/96

(campaign has just ended, but I'm going to release an update soon as
I've done quite a lot of work since the last update).

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