On Tue, Oct 21, 2025 at 03:39:58PM +0200, Enguerrand de Ribaucourt wrote:
The FPGA will be able to communicate the timestamps through some reserved
memory connected with the Linux CPU cores. My idea is to reuse the existing
SHM support of chrony. It does pretty much what I want: read a timestamp
binary structure from a memory mapping.
That sounds like a very specific use case.
However, the current SHM refclok implementation is specific to SHM devices,
wherehas my FPGA's registers will appear within raw memory devices like
/dev/mem, or /dev/uio.
I see two options for passing the raw memory structure to chrony:
1. Write an additional middleware that maps the raw memory device and
copies it regularly into an SHM device
2. Add support for raw memory mappings to chrony, with lots of resemblance
to the current refclock_shm.c implementation
My suggestion would be 1, but use the SOCK refclock instead of SHM as
that is considered deprecated due to some security issues. I don't
like the idea of adding another driver like that.