Re: [pok-devel] [Discussion] IRQ handling: chaining && pending IRQs

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Hi,

the error code handler mustn't have the subl $4, esp.
Here is why: The asm code builds up the interrupt frame, which includes
4 byte for the error code. If it's a normal interrupt or a syscall these
4bytes are unused and must be padded, otherwise the interrupt frame is
invalid.
And that's the subl $4, %esp.

Cheers,
Philipp



On 08/08/2013 02:49 PM, Julien Delange wrote:
> Obviously, this would require to read the x86 manual again ... Laurent,
> Julian or Jeremy may have a direct answer because they work more on the
> lower-level aspects ... Anyway, if you think some changes are needed,
> feel free to do it as long as you do not break the existing code ! :)
> 
> 
> On Thu, Aug 8, 2013 at 6:10 AM, Philipp Eppelt
> <philipp.eppelt@xxxxxxxxxxxxxxxxxxxxx
> <mailto:philipp.eppelt@xxxxxxxxxxxxxxxxxxxxx>> wrote:
> 
>     Hi,
> 
>     I have a question about the interrupt handling code.
> 
>     In the x86 interrupt.h file [0], there is a "subl $4, %esp" in line 61
>     and 116 so in the interrupt handler code and in the syscall handler
>     code.
>     But this instruction is missing in the errorcode handler code.
> 
>     Shouldn't "subl $4, %esp" after "cli" in line 88? Because there is an
>     addl $4, %esp" right before "sti" in line 102.
> 
>     Cheers,
>     Philipp
> 
> 
>     [0]
>     https://github.com/phipse/pok/blob/master/kernel/include/arch/x86/interrupt.h
> 
> 
>     On 08/01/2013 11:41 AM, Philipp Eppelt wrote:
>     > Hi,
>     >
>     > currently the interrupt handling does not support two features,
>     > necessary for my GSoC project: interrupt chaining and delivering
>     pending
>     > interrupts.
>     >
>     > If one partition registers a handler for IRQ 0, then no other
>     partition
>     > is able to register a handler for the same interrupt line.
>     > As I want to run several RTEMS instances in different partitions
>     on POK
>     > one day, I need to be able to pass the clock IRQ on to every partition
>     > needing it.
>     >
>     > I come from the L4 microkernel world and are used to stuff like that,
>     > but it might introduce an overhead you are not willing to pay for
>     in the
>     > embedded world. I appreciate a lively discussion about this change.
>     >
>     > I have put together a blog post, with a little bit of source code.
>     > http://phipse.github.io/rtems/blog/2013/07/09/how-late-is-it/
>     >
>     > Here is a summary of the post.
>     >
>     > I propose a meta handler, registering the IRQ with POK. One meta
>     handler
>     > per IRQ vector. The meta handler is intercepting the current
>     > registration process and stores the received handler in a array
>     indexed
>     > by the current partition number. If several partition want to acquire
>     > the same IRQ vector, their handlers are stored in the array and get
>     > invoked when the IRQ fires and they are currently running.
>     > If they are not running the IRQ is stored in the pending array, also
>     > indexed by the partition number. When the scheduler changes
>     partition it
>     > needs to check for pending interrupts for the selected partition on
>     > every meta handler and deliver them.
>     >
>     > Open questions: Where to store the meta-handler table.
>     >
>     >
>     > Cheers,
>     > Philipp
>     >
>     >
> 
> 
> 
> 




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