Gesendet: Mittwoch, 2. Juli 2025 um 16:05
Von: "Nicolas Pomarède" <npomarede@xxxxxxxxxxxx>
An: hatari-devel@xxxxxxxxxxxxxxxxxxx
Betreff: Re: [hatari-devel] MegaSTE cache emulation issues
but in fact, address error are not taken into account too, so a word
read/write to ram that would fail at odd address would still update part
of the cache, which would be wrong (I don't have megaSTE HW to test, but
I guess the internal cache logic prevents update in case of address
error during a read/write ?)
Address errors are detected internally in the CPU and immediately trapped to the respective exception handler. There is no bus access to an odd address; the cache logic (exterior to the CPU in the MegaSTE) does not even see it, and therefore no cache update happens. This is different from the bus error, which is signalled externally to the CPU. This is why the cache logic observes the bus error signal. (In theory, you would not need to flush the entire cache because of a bus error, but Atari implemented it this way.)