Re: [hatari-devel] MegaSTE 16Mhz / 16KB cache cycle accuracy? |
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- To: Nicolas Pomarède <npomarede@xxxxxxxxxxxx>, hatari-devel@xxxxxxxxxxxxxxxxxxx
- Subject: Re: [hatari-devel] MegaSTE 16Mhz / 16KB cache cycle accuracy?
- From: Eero Tamminen <oak@xxxxxxxxxxxxxx>
- Date: Tue, 24 Jun 2025 12:32:41 +0300
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Hi Nicolas,
On 24.6.2025 11.37, Nicolas Pomarède wrote:
Le 24/06/2025 à 10:26, Eero Tamminen a écrit :
I would like to update profiler / emulation cycle accuracy documentation:
https://www.hatari-emu.org/doc/debugger.html#Profile_data_accuracy
Do you have some idea about how cycle accurate the MegaSTE 16Mhz /
16KB cache emulation is?
I think the MegaSTE 16Mhz or 16 MHz with cache enabled should be cycle
accurate.
I compared it with some benchmarks made on real MegaSTE using a small
program I wrote that did several combinations of read / write with bytes
or words at addresses that triggered cache hits or misses on purposes
and in all cases the timing was the same between real MegaSTE and Hatari
(see mails "Adding cache support for the MegaSTE" from july / september
2024)
And I guess TT-RAM impact is not emulated yet either?
Not really. but it would also depends on the CPU / machine type because
the shifter/mmu will still own the bus on a regular basis on a megaste.
So TT RAM would apply only to 68030 falcon/tt and cycle accuracy will be
complex because the cpu itself has his own cache.
Thanks, I pushed doc update.
Btw. 040/060 is not that relevant for profiling, but do you have some
idea about the 040/060 emulation cycle accuracy (cache etc)? Is it
supposed to be nowadays no par with 030 emulation?
- Eero