| [hatari-devel] Hatari goes big game hunting! |
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- To: Hatari Development <hatari-devel@xxxxxxxxxxxxxxxxxxx>
- Subject: [hatari-devel] Hatari goes big game hunting!
- From: Thomas Huth <th.huth@xxxxxxxxx>
- Date: Tue, 1 Apr 2025 10:39:14 +0000
- Dkim-signature: v=1; a=rsa-sha256; c=relaxed/simple; d=posteo.de; s=2017; t=1743503959; bh=tkblmEVPW2u/oNErMNrQCk+IwiQfdNr0laFzi6MyAxA=; h=Date:From:To:Subject:Message-ID:MIME-Version:Content-Type:From; b=D1Re9rEHbiwcMTOETjkqowH47TzTpo+qidloU5W4I9m9oNdI5pexdqgyPjvgFm5AU cM3DZSRdKO5uC8ewSRaPOTBzJD4ChRo616lWvf/rSyBH0wZ2+2mnzbw1yTNdN6/HEW 0LLT7OqIDq5f14N4idh6YAoiJtkNl8uzHNiD0pqkikXa9ms6rBqnCmvCw4LSM8KMa5 dZ108kMV1k5hnl/mPLa4M3cWd3Wfqr6Dx5rrcjPmMvQAh5MirzxixoqCmbhFjNFnTG LrIGuKeRgoNL99rYWIboKQiAlk67aWQzwBEPDxUssmk/6SMLYzqnReX/yrqN/CKZFV U+B5pb8Bmm6Sg==
Now that we moved the Hatari project to a new location, we should
be ready to tackle the next big change: A lot of people rather
think of big game hunting than of ST computers when they hear
the term "Hatari". That means an emulator with this name should
rather take care of emulating machines like the Jaguar instead of
handling machines like the ST/STE/TT.
So let's turn Hatari into a Jaguar emulator TODAY! Fortunately,
we don't have to start from scratch: Hatari already has a very
good 68000 CPU emulation code (thanks to WinUAE). And for the
code that is required for emulating the remaining chips of the
Jaguar, we can leverage an older version of the "Virtual Jaguar"
emulator which was still licensed under the GPLv2 (current version
is GPLv3).
In fact, I started hacking on that code after I wanted to try
some Jaguar stuff, but had to discover that Virtual Jaguar does not
compile out of the box on modern Linux distros anymore and needs
some tweaking first. Unfortunately, the development of this emulator
seems to have ceased - there are some forks, but none of them worked
really well for me. Now while looking at the code, I realized that
Virtual Jaguar is indeed using the UAE CPU core from an older
version of Hatari, so I thought: "Hey, if they can borrow the CPU
code from Hatari, maybe we could also do it the other way round
and borrow the Jaguar custom chips emulation from Virtual Jaguar and
use it with the CPU emulation in Hatari!". And with some hacking,
this was possible indeed, so here it is now, Jaguar emulation in
Hatari!
I haven't fully polished the patches yet (still need to tackle some
compiler warnings for example), so they are not checked into the
main branch of Hatari yet. Thus if you want to have a try, please
apply the attached patches with "git am *.patch". Alternatively, you
could also check out the "jaguar" branch from:
https://framagit.org/huth/hatari.git
To use it, run "configure" with --enable-jaguar, compile the code
and then start Hatari with an unpacked .j64 cartridge file as
command line argument, e.g. "AvP" seems to work fine. Joypad is
emulated via the cursor keys, buttons are currently mapped to the
keys A, S and D. Please note that the integration into the Hatari
code base is far from being complete, i.e. there is no proper GUI
yet, the usual Hatari configuration settings are not taken into
account yet, and the only way to quit the emulated Jaguar is to
press the escape key right now.
But once those minor problems have been tackled, we can also
certainly remove the ST/STE/TT/Falcon emulation from Hatari.
In case someone is still interested in that, we should maybe
move it into a separate new project instead? For this, we need
a good new name ... does anybody have a good suggestion? Maybe
something like "LinSTon" (since Hatari was originally based on
the "WinSTon" sources), or "HaSTE", or "Just an Old and Kind
STE emulatoR" (a.k.a. jokSTEr) ? Please let me know your
favourite new name!
Now enjoy the new Jaguar emulation!
Cheers,
Thomas
From 3175416c8ce5de7b13d8e2e139eb5e55b1ac7910 Mon Sep 17 00:00:00 2001
From: Thomas Huth <huth@xxxxxxxxxxxxx>
Date: Fri, 22 Dec 2023 21:03:35 +0100
Subject: [PATCH 01/20] Add files from Virtual Jaguar
The Virtual Jaguar project at https://icculus.org/virtualjaguar/ seems to be
dormant since years, so it looks like the development has ceased.
Looking at the sources, it seems like the latest versions of Virtual Jaguar
were using an older version of the UAE CPU core from Hatari, so it might be
possible to revive the sources with the current CPU emulation within Hatari.
Let's give it a try and start adding the emulation code from Virtual Jaguar,
taken from the GPLv2 sources here:
https://github.com/mirror/virtualjaguar/tree/636d4cdd1e2d70fa488e28766e78fe83
---
src/jaguar/blitter.c | 6233 ++++++++++++++++++++++++++++++++++++++++
src/jaguar/blitter.h | 30 +
src/jaguar/cdintf.c | 151 +
src/jaguar/cdintf.h | 22 +
src/jaguar/cdrom.c | 1336 +++++++++
src/jaguar/cdrom.h | 26 +
src/jaguar/crc32.c | 63 +
src/jaguar/crc32.h | 10 +
src/jaguar/cry2rgb.h | 71 +
src/jaguar/dac.c | 416 +++
src/jaguar/dac.h | 26 +
src/jaguar/dsp.c | 4637 ++++++++++++++++++++++++++++++
src/jaguar/dsp.h | 42 +
src/jaguar/eeprom.c | 334 +++
src/jaguar/eeprom.h | 20 +
src/jaguar/event.c | 262 ++
src/jaguar/event.h | 28 +
src/jaguar/file.c | 653 +++++
src/jaguar/file.h | 26 +
src/jaguar/filedb.c | 105 +
src/jaguar/filedb.h | 28 +
src/jaguar/gpu.c | 2442 ++++++++++++++++
src/jaguar/gpu.h | 38 +
src/jaguar/jagdasm.c | 166 ++
src/jaguar/jagdasm.h | 9 +
src/jaguar/jaguar.c | 1916 ++++++++++++
src/jaguar/jaguar.h | 50 +
src/jaguar/jerry.c | 855 ++++++
src/jaguar/jerry.h | 39 +
src/jaguar/joystick.c | 450 +++
src/jaguar/joystick.h | 46 +
src/jaguar/log.c | 67 +
src/jaguar/log.h | 23 +
src/jaguar/memory.c | 267 ++
src/jaguar/memory.h | 107 +
src/jaguar/objectp.c | 1671 +++++++++++
src/jaguar/objectp.h | 29 +
src/jaguar/settings.c | 125 +
src/jaguar/settings.h | 60 +
src/jaguar/tom.c | 1432 +++++++++
src/jaguar/tom.h | 66 +
src/jaguar/types.h | 22 +
src/jaguar/wavetable.c | 278 ++
src/jaguar/wavetable.h | 17 +
44 files changed, 24694 insertions(+)
create mode 100644 src/jaguar/blitter.c
create mode 100644 src/jaguar/blitter.h
create mode 100644 src/jaguar/cdintf.c
create mode 100644 src/jaguar/cdintf.h
create mode 100644 src/jaguar/cdrom.c
create mode 100644 src/jaguar/cdrom.h
create mode 100644 src/jaguar/crc32.c
create mode 100644 src/jaguar/crc32.h
create mode 100644 src/jaguar/cry2rgb.h
create mode 100644 src/jaguar/dac.c
create mode 100644 src/jaguar/dac.h
create mode 100644 src/jaguar/dsp.c
create mode 100644 src/jaguar/dsp.h
create mode 100644 src/jaguar/eeprom.c
create mode 100644 src/jaguar/eeprom.h
create mode 100644 src/jaguar/event.c
create mode 100644 src/jaguar/event.h
create mode 100644 src/jaguar/file.c
create mode 100644 src/jaguar/file.h
create mode 100644 src/jaguar/filedb.c
create mode 100644 src/jaguar/filedb.h
create mode 100644 src/jaguar/gpu.c
create mode 100644 src/jaguar/gpu.h
create mode 100644 src/jaguar/jagdasm.c
create mode 100644 src/jaguar/jagdasm.h
create mode 100644 src/jaguar/jaguar.c
create mode 100644 src/jaguar/jaguar.h
create mode 100644 src/jaguar/jerry.c
create mode 100644 src/jaguar/jerry.h
create mode 100644 src/jaguar/joystick.c
create mode 100644 src/jaguar/joystick.h
create mode 100644 src/jaguar/log.c
create mode 100644 src/jaguar/log.h
create mode 100644 src/jaguar/memory.c
create mode 100644 src/jaguar/memory.h
create mode 100644 src/jaguar/objectp.c
create mode 100644 src/jaguar/objectp.h
create mode 100644 src/jaguar/settings.c
create mode 100644 src/jaguar/settings.h
create mode 100644 src/jaguar/tom.c
create mode 100644 src/jaguar/tom.h
create mode 100644 src/jaguar/types.h
create mode 100644 src/jaguar/wavetable.c
create mode 100644 src/jaguar/wavetable.h
diff --git a/src/jaguar/blitter.c b/src/jaguar/blitter.c
new file mode 100644
index 00000000..3d4207d4
--- /dev/null
+++ b/src/jaguar/blitter.c
@@ -0,0 +1,6233 @@
+//
+// Blitter core
+//
+// by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+//
+
+//
+// I owe a debt of gratitude to Curt Vendel and to John Mathieson--to Curt
+// for supplying the Oberon ASIC nets and to John for making them available
+// to Curt. ;-) Without that excellent documentation which shows *exactly*
+// what's going on inside the TOM chip, we'd all still be guessing as to how
+// the wily blitter and other pieces of the Jaguar puzzle actually work.
+// Now how about those JERRY ASIC nets gentlemen...? [We have those now!] ;-)
+//
+
+#include "blitter.h"
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include "jaguar.h"
+#include "log.h"
+//#include "memory.h"
+
+// Various conditional compilation goodies...
+
+//#define USE_ORIGINAL_BLITTER
+//#define USE_MIDSUMMER_BLITTER
+#define USE_MIDSUMMER_BLITTER_MKII
+
+// External global variables
+
+extern int jaguar_active_memory_dumps;
+
+// Local global variables
+
+int start_logging = 0;
+uint8 blitter_working = 0;
+
+// Blitter register RAM (most of it is hidden from the user)
+
+static uint8 blitter_ram[0x100];
+
+// Other crapola
+
+bool specialLog = false;
+extern int effect_start;
+extern int blit_start_log;
+void BlitterMidsummer(uint32 cmd);
+void BlitterMidsummer2(void);
+
+#define REG(A) (((uint32)blitter_ram[(A)] << 24) | ((uint32)blitter_ram[(A)+1] << 16) \
+ | ((uint32)blitter_ram[(A)+2] << 8) | (uint32)blitter_ram[(A)+3])
+#define WREG(A,D) (blitter_ram[(A)] = ((D)>>24)&0xFF, blitter_ram[(A)+1] = ((D)>>16)&0xFF, \
+ blitter_ram[(A)+2] = ((D)>>8)&0xFF, blitter_ram[(A)+3] = (D)&0xFF)
+
+// Blitter registers (offsets from F02200)
+
+#define A1_BASE ((uint32)0x00)
+#define A1_FLAGS ((uint32)0x04)
+#define A1_CLIP ((uint32)0x08) // Height and width values for clipping
+#define A1_PIXEL ((uint32)0x0C) // Integer part of the pixel (Y.i and X.i)
+#define A1_STEP ((uint32)0x10) // Integer part of the step
+#define A1_FSTEP ((uint32)0x14) // Fractional part of the step
+#define A1_FPIXEL ((uint32)0x18) // Fractional part of the pixel (Y.f and X.f)
+#define A1_INC ((uint32)0x1C) // Integer part of the increment
+#define A1_FINC ((uint32)0x20) // Fractional part of the increment
+#define A2_BASE ((uint32)0x24)
+#define A2_FLAGS ((uint32)0x28)
+#define A2_MASK ((uint32)0x2C) // Modulo values for x and y (M.y and M.x)
+#define A2_PIXEL ((uint32)0x30) // Integer part of the pixel (no fractional part for A2)
+#define A2_STEP ((uint32)0x34) // Integer part of the step (no fractional part for A2)
+#define COMMAND ((uint32)0x38)
+#define PIXLINECOUNTER ((uint32)0x3C) // Inner & outer loop values
+#define SRCDATA ((uint32)0x40)
+#define DSTDATA ((uint32)0x48)
+#define DSTZ ((uint32)0x50)
+#define SRCZINT ((uint32)0x58)
+#define SRCZFRAC ((uint32)0x60)
+#define PATTERNDATA ((uint32)0x68)
+#define INTENSITYINC ((uint32)0x70)
+#define ZINC ((uint32)0x74)
+#define COLLISIONCTRL ((uint32)0x78)
+#define PHRASEINT0 ((uint32)0x7C)
+#define PHRASEINT1 ((uint32)0x80)
+#define PHRASEINT2 ((uint32)0x84)
+#define PHRASEINT3 ((uint32)0x88)
+#define PHRASEZ0 ((uint32)0x8C)
+#define PHRASEZ1 ((uint32)0x90)
+#define PHRASEZ2 ((uint32)0x94)
+#define PHRASEZ3 ((uint32)0x98)
+
+// Blitter command bits
+
+#define SRCEN (cmd & 0x00000001)
+#define SRCENZ (cmd & 0x00000002)
+#define SRCENX (cmd & 0x00000004)
+#define DSTEN (cmd & 0x00000008)
+#define DSTENZ (cmd & 0x00000010)
+#define DSTWRZ (cmd & 0x00000020)
+#define CLIPA1 (cmd & 0x00000040)
+
+#define UPDA1F (cmd & 0x00000100)
+#define UPDA1 (cmd & 0x00000200)
+#define UPDA2 (cmd & 0x00000400)
+
+#define DSTA2 (cmd & 0x00000800)
+
+#define Z_OP_INF (cmd & 0x00040000)
+#define Z_OP_EQU (cmd & 0x00080000)
+#define Z_OP_SUP (cmd & 0x00100000)
+
+#define LFU_NAN (cmd & 0x00200000)
+#define LFU_NA (cmd & 0x00400000)
+#define LFU_AN (cmd & 0x00800000)
+#define LFU_A (cmd & 0x01000000)
+
+#define CMPDST (cmd & 0x02000000)
+#define BCOMPEN (cmd & 0x04000000)
+#define DCOMPEN (cmd & 0x08000000)
+
+#define PATDSEL (cmd & 0x00010000)
+#define ADDDSEL (cmd & 0x00020000)
+#define TOPBEN (cmd & 0x00004000)
+#define TOPNEN (cmd & 0x00008000)
+#define BKGWREN (cmd & 0x10000000)
+#define GOURD (cmd & 0x00001000)
+#define GOURZ (cmd & 0x00002000)
+#define SRCSHADE (cmd & 0x40000000)
+
+
+#define XADDPHR 0
+#define XADDPIX 1
+#define XADD0 2
+#define XADDINC 3
+
+#define XSIGNSUB_A1 (REG(A1_FLAGS)&0x080000)
+#define XSIGNSUB_A2 (REG(A2_FLAGS)&0x080000)
+
+#define YSIGNSUB_A1 (REG(A1_FLAGS)&0x100000)
+#define YSIGNSUB_A2 (REG(A2_FLAGS)&0x100000)
+
+#define YADD1_A1 (REG(A1_FLAGS)&0x040000)
+#define YADD1_A2 (REG(A2_FLAGS)&0x040000)
+
+/*******************************************************************************
+********************** STUFF CUT BELOW THIS LINE! ******************************
+*******************************************************************************/
+#ifdef USE_ORIGINAL_BLITTER // We're ditching this crap for now...
+
+//Put 'em back, once we fix the problem!!! [KO]
+// 1 bpp pixel read
+#define PIXEL_SHIFT_1(a) (((~a##_x) >> 16) & 7)
+#define PIXEL_OFFSET_1(a) (((((uint32)a##_y >> 16) * a##_width / 8) + (((uint32)a##_x >> 19) & ~7)) * (1 + a##_pitch) + (((uint32)a##_x >> 19) & 7))
+#define READ_PIXEL_1(a) ((JaguarReadByte(a##_addr+PIXEL_OFFSET_1(a), BLITTER) >> PIXEL_SHIFT_1(a)) & 0x01)
+//#define READ_PIXEL_1(a) ((JaguarReadByte(a##_addr+PIXEL_OFFSET_1(a)) >> PIXEL_SHIFT_1(a)) & 0x01)
+
+// 2 bpp pixel read
+#define PIXEL_SHIFT_2(a) (((~a##_x) >> 15) & 6)
+#define PIXEL_OFFSET_2(a) (((((uint32)a##_y >> 16) * a##_width / 4) + (((uint32)a##_x >> 18) & ~7)) * (1 + a##_pitch) + (((uint32)a##_x >> 18) & 7))
+#define READ_PIXEL_2(a) ((JaguarReadByte(a##_addr+PIXEL_OFFSET_2(a), BLITTER) >> PIXEL_SHIFT_2(a)) & 0x03)
+//#define READ_PIXEL_2(a) ((JaguarReadByte(a##_addr+PIXEL_OFFSET_2(a)) >> PIXEL_SHIFT_2(a)) & 0x03)
+
+// 4 bpp pixel read
+#define PIXEL_SHIFT_4(a) (((~a##_x) >> 14) & 4)
+#define PIXEL_OFFSET_4(a) (((((uint32)a##_y >> 16) * (a##_width/2)) + (((uint32)a##_x >> 17) & ~7)) * (1 + a##_pitch) + (((uint32)a##_x >> 17) & 7))
+#define READ_PIXEL_4(a) ((JaguarReadByte(a##_addr+PIXEL_OFFSET_4(a), BLITTER) >> PIXEL_SHIFT_4(a)) & 0x0f)
+//#define READ_PIXEL_4(a) ((JaguarReadByte(a##_addr+PIXEL_OFFSET_4(a)) >> PIXEL_SHIFT_4(a)) & 0x0f)
+
+// 8 bpp pixel read
+#define PIXEL_OFFSET_8(a) (((((uint32)a##_y >> 16) * a##_width) + (((uint32)a##_x >> 16) & ~7)) * (1 + a##_pitch) + (((uint32)a##_x >> 16) & 7))
+#define READ_PIXEL_8(a) (JaguarReadByte(a##_addr+PIXEL_OFFSET_8(a), BLITTER))
+//#define READ_PIXEL_8(a) (JaguarReadByte(a##_addr+PIXEL_OFFSET_8(a)))
+
+// 16 bpp pixel read
+#define PIXEL_OFFSET_16(a) (((((uint32)a##_y >> 16) * a##_width) + (((uint32)a##_x >> 16) & ~3)) * (1 + a##_pitch) + (((uint32)a##_x >> 16) & 3))
+#define READ_PIXEL_16(a) (JaguarReadWord(a##_addr+(PIXEL_OFFSET_16(a)<<1), BLITTER))
+//#define READ_PIXEL_16(a) (JaguarReadWord(a##_addr+(PIXEL_OFFSET_16(a)<<1)))
+
+// 32 bpp pixel read
+#define PIXEL_OFFSET_32(a) (((((uint32)a##_y >> 16) * a##_width) + (((uint32)a##_x >> 16) & ~1)) * (1 + a##_pitch) + (((uint32)a##_x >> 16) & 1))
+#define READ_PIXEL_32(a) (JaguarReadLong(a##_addr+(PIXEL_OFFSET_32(a)<<2), BLITTER))
+//#define READ_PIXEL_32(a) (JaguarReadLong(a##_addr+(PIXEL_OFFSET_32(a)<<2)))
+
+// pixel read
+#define READ_PIXEL(a,f) (\
+ (((f>>3)&0x07) == 0) ? (READ_PIXEL_1(a)) : \
+ (((f>>3)&0x07) == 1) ? (READ_PIXEL_2(a)) : \
+ (((f>>3)&0x07) == 2) ? (READ_PIXEL_4(a)) : \
+ (((f>>3)&0x07) == 3) ? (READ_PIXEL_8(a)) : \
+ (((f>>3)&0x07) == 4) ? (READ_PIXEL_16(a)) : \
+ (((f>>3)&0x07) == 5) ? (READ_PIXEL_32(a)) : 0)
+
+// 16 bpp z data read
+#define ZDATA_OFFSET_16(a) (PIXEL_OFFSET_16(a) + a##_zoffs * 4)
+#define READ_ZDATA_16(a) (JaguarReadWord(a##_addr+(ZDATA_OFFSET_16(a)<<1), BLITTER))
+//#define READ_ZDATA_16(a) (JaguarReadWord(a##_addr+(ZDATA_OFFSET_16(a)<<1)))
+
+// z data read
+#define READ_ZDATA(a,f) (READ_ZDATA_16(a))
+
+// 16 bpp z data write
+#define WRITE_ZDATA_16(a,d) { JaguarWriteWord(a##_addr+(ZDATA_OFFSET_16(a)<<1), d, BLITTER); }
+//#define WRITE_ZDATA_16(a,d) { JaguarWriteWord(a##_addr+(ZDATA_OFFSET_16(a)<<1), d); }
+
+// z data write
+#define WRITE_ZDATA(a,f,d) WRITE_ZDATA_16(a,d);
+
+// 1 bpp r data read
+#define READ_RDATA_1(r,a,p) ((p) ? ((REG(r+(((uint32)a##_x >> 19) & 0x04))) >> (((uint32)a##_x >> 16) & 0x1F)) & 0x0001 : (REG(r) & 0x0001))
+
+// 2 bpp r data read
+#define READ_RDATA_2(r,a,p) ((p) ? ((REG(r+(((uint32)a##_x >> 18) & 0x04))) >> (((uint32)a##_x >> 15) & 0x3E)) & 0x0003 : (REG(r) & 0x0003))
+
+// 4 bpp r data read
+#define READ_RDATA_4(r,a,p) ((p) ? ((REG(r+(((uint32)a##_x >> 17) & 0x04))) >> (((uint32)a##_x >> 14) & 0x28)) & 0x000F : (REG(r) & 0x000F))
+
+// 8 bpp r data read
+#define READ_RDATA_8(r,a,p) ((p) ? ((REG(r+(((uint32)a##_x >> 16) & 0x04))) >> (((uint32)a##_x >> 13) & 0x18)) & 0x00FF : (REG(r) & 0x00FF))
+
+// 16 bpp r data read
+#define READ_RDATA_16(r,a,p) ((p) ? ((REG(r+(((uint32)a##_x >> 15) & 0x04))) >> (((uint32)a##_x >> 12) & 0x10)) & 0xFFFF : (REG(r) & 0xFFFF))
+
+// 32 bpp r data read
+#define READ_RDATA_32(r,a,p) ((p) ? REG(r+(((uint32)a##_x >> 14) & 0x04)) : REG(r))
+
+// register data read
+#define READ_RDATA(r,a,f,p) (\
+ (((f>>3)&0x07) == 0) ? (READ_RDATA_1(r,a,p)) : \
+ (((f>>3)&0x07) == 1) ? (READ_RDATA_2(r,a,p)) : \
+ (((f>>3)&0x07) == 2) ? (READ_RDATA_4(r,a,p)) : \
+ (((f>>3)&0x07) == 3) ? (READ_RDATA_8(r,a,p)) : \
+ (((f>>3)&0x07) == 4) ? (READ_RDATA_16(r,a,p)) : \
+ (((f>>3)&0x07) == 5) ? (READ_RDATA_32(r,a,p)) : 0)
+
+// 1 bpp pixel write
+#define WRITE_PIXEL_1(a,d) { JaguarWriteByte(a##_addr+PIXEL_OFFSET_1(a), (JaguarReadByte(a##_addr+PIXEL_OFFSET_1(a), BLITTER)&(~(0x01 << PIXEL_SHIFT_1(a))))|(d<<PIXEL_SHIFT_1(a)), BLITTER); }
+//#define WRITE_PIXEL_1(a,d) { JaguarWriteByte(a##_addr+PIXEL_OFFSET_1(a), (JaguarReadByte(a##_addr+PIXEL_OFFSET_1(a))&(~(0x01 << PIXEL_SHIFT_1(a))))|(d<<PIXEL_SHIFT_1(a))); }
+
+// 2 bpp pixel write
+#define WRITE_PIXEL_2(a,d) { JaguarWriteByte(a##_addr+PIXEL_OFFSET_2(a), (JaguarReadByte(a##_addr+PIXEL_OFFSET_2(a), BLITTER)&(~(0x03 << PIXEL_SHIFT_2(a))))|(d<<PIXEL_SHIFT_2(a)), BLITTER); }
+//#define WRITE_PIXEL_2(a,d) { JaguarWriteByte(a##_addr+PIXEL_OFFSET_2(a), (JaguarReadByte(a##_addr+PIXEL_OFFSET_2(a))&(~(0x03 << PIXEL_SHIFT_2(a))))|(d<<PIXEL_SHIFT_2(a))); }
+
+// 4 bpp pixel write
+#define WRITE_PIXEL_4(a,d) { JaguarWriteByte(a##_addr+PIXEL_OFFSET_4(a), (JaguarReadByte(a##_addr+PIXEL_OFFSET_4(a), BLITTER)&(~(0x0f << PIXEL_SHIFT_4(a))))|(d<<PIXEL_SHIFT_4(a)), BLITTER); }
+//#define WRITE_PIXEL_4(a,d) { JaguarWriteByte(a##_addr+PIXEL_OFFSET_4(a), (JaguarReadByte(a##_addr+PIXEL_OFFSET_4(a))&(~(0x0f << PIXEL_SHIFT_4(a))))|(d<<PIXEL_SHIFT_4(a))); }
+
+// 8 bpp pixel write
+#define WRITE_PIXEL_8(a,d) { JaguarWriteByte(a##_addr+PIXEL_OFFSET_8(a), d, BLITTER); }
+//#define WRITE_PIXEL_8(a,d) { JaguarWriteByte(a##_addr+PIXEL_OFFSET_8(a), d); }
+
+// 16 bpp pixel write
+//#define WRITE_PIXEL_16(a,d) { JaguarWriteWord(a##_addr+(PIXEL_OFFSET_16(a)<<1),d); }
+#define WRITE_PIXEL_16(a,d) { JaguarWriteWord(a##_addr+(PIXEL_OFFSET_16(a)<<1), d, BLITTER); if (specialLog) WriteLog("Pixel write address: %08X\n", a##_addr+(PIXEL_OFFSET_16(a)<<1)); }
+//#define WRITE_PIXEL_16(a,d) { JaguarWriteWord(a##_addr+(PIXEL_OFFSET_16(a)<<1), d); if (specialLog) WriteLog("Pixel write address: %08X\n", a##_addr+(PIXEL_OFFSET_16(a)<<1)); }
+
+// 32 bpp pixel write
+#define WRITE_PIXEL_32(a,d) { JaguarWriteLong(a##_addr+(PIXEL_OFFSET_32(a)<<2), d, BLITTER); }
+//#define WRITE_PIXEL_32(a,d) { JaguarWriteLong(a##_addr+(PIXEL_OFFSET_32(a)<<2), d); }
+
+// pixel write
+#define WRITE_PIXEL(a,f,d) {\
+ switch ((f>>3)&0x07) { \
+ case 0: WRITE_PIXEL_1(a,d); break; \
+ case 1: WRITE_PIXEL_2(a,d); break; \
+ case 2: WRITE_PIXEL_4(a,d); break; \
+ case 3: WRITE_PIXEL_8(a,d); break; \
+ case 4: WRITE_PIXEL_16(a,d); break; \
+ case 5: WRITE_PIXEL_32(a,d); break; \
+ }}
+
+// Width in Pixels of a Scanline
+// This is a pretranslation of the value found in the A1 & A2 flags: It's really a floating point value
+// of the form EEEEMM where MM is the mantissa with an implied "1." in front of it and the EEEE value is
+// the exponent. Valid values for the exponent range from 0 to 11 (decimal). It's easiest to think of it
+// as a floating point bit pattern being followed by a number of zeroes. So, e.g., 001101 translates to
+// 1.01 (the "1." being implied) x (2 ^ 3) or 1010 -> 10 in base 10 (i.e., 1.01 with the decimal place
+// being shifted to the right 3 places).
+/*static uint32 blitter_scanline_width[48] =
+{
+ 0, 0, 0, 0, // Note: This would really translate to 1, 1, 1, 1
+ 2, 0, 0, 0,
+ 4, 0, 6, 0,
+ 8, 10, 12, 14,
+ 16, 20, 24, 28,
+ 32, 40, 48, 56,
+ 64, 80, 96, 112,
+ 128, 160, 192, 224,
+ 256, 320, 384, 448,
+ 512, 640, 768, 896,
+ 1024, 1280, 1536, 1792,
+ 2048, 2560, 3072, 3584
+};//*/
+
+//static uint8 * tom_ram_8;
+//static uint8 * paletteRam;
+static uint8 src;
+static uint8 dst;
+static uint8 misc;
+static uint8 a1ctl;
+static uint8 mode;
+static uint8 ity;
+static uint8 zop;
+static uint8 op;
+static uint8 ctrl;
+static uint32 a1_addr;
+static uint32 a2_addr;
+static int32 a1_zoffs;
+static int32 a2_zoffs;
+static uint32 xadd_a1_control;
+static uint32 xadd_a2_control;
+static int32 a1_pitch;
+static int32 a2_pitch;
+static uint32 n_pixels;
+static uint32 n_lines;
+static int32 a1_x;
+static int32 a1_y;
+static int32 a1_width;
+static int32 a2_x;
+static int32 a2_y;
+static int32 a2_width;
+static int32 a2_mask_x;
+static int32 a2_mask_y;
+static int32 a1_xadd;
+static int32 a1_yadd;
+static int32 a2_xadd;
+static int32 a2_yadd;
+static uint8 a1_phrase_mode;
+static uint8 a2_phrase_mode;
+static int32 a1_step_x = 0;
+static int32 a1_step_y = 0;
+static int32 a2_step_x = 0;
+static int32 a2_step_y = 0;
+static uint32 outer_loop;
+static uint32 inner_loop;
+static uint32 a2_psize;
+static uint32 a1_psize;
+static uint32 gouraud_add;
+//static uint32 gouraud_data;
+//static uint16 gint[4];
+//static uint16 gfrac[4];
+//static uint8 gcolour[4];
+static int gd_i[4];
+static int gd_c[4];
+static int gd_ia, gd_ca;
+static int colour_index = 0;
+static int32 zadd;
+static uint32 z_i[4];
+
+static int32 a1_clip_x, a1_clip_y;
+
+// In the spirit of "get it right first, *then* optimize" I've taken the liberty
+// of removing all the unnecessary code caching. If it turns out to be a good way
+// to optimize the blitter, then we may revisit it in the future...
+
+//
+// Generic blit handler
+//
+void blitter_generic(uint32 cmd)
+{
+/*
+Blit! (0018FA70 <- 008DDC40) count: 2 x 13, A1/2_FLAGS: 00014218/00013C18 [cmd: 1401060C]
+ CMD -> src: SRCENX dst: DSTEN misc: a1ctl: UPDA1 UPDA2 mode: ity: PATDSEL z-op: op: LFU_CLEAR ctrl: BCOMPEN BKGWREN
+ A1 step values: -2 (X), 1 (Y)
+ A2 step values: -1 (X), 1 (Y) [mask (unused): 00000000 - FFFFFFFF/FFFFFFFF]
+ A1 -> pitch: 1 phrases, depth: 8bpp, z-off: 0, width: 320 (21), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 8bpp, z-off: 0, width: 192 (1E), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 100/12, A2 x/y: 106/0 Pattern: 000000F300000000
+*/
+//if (effect_start)
+// specialLog = true;
+/*if (cmd == 0x1401060C && blit_start_log)
+ specialLog = true;//*/
+//Testing only!
+//uint32 logGo = ((cmd == 0x01800E01 && REG(A1_BASE) == 0x898000) ? 1 : 0);
+ uint32 srcdata, srczdata, dstdata, dstzdata, writedata, inhibit;
+ uint32 bppSrc = (DSTA2 ? 1 << ((REG(A1_FLAGS) >> 3) & 0x07) : 1 << ((REG(A2_FLAGS) >> 3) & 0x07));
+
+if (specialLog)
+{
+ WriteLog("About to do n x m blit (BM width is ? pixels)...\n");
+ WriteLog("A1_STEP_X/Y = %08X/%08X, A2_STEP_X/Y = %08X/%08X\n", a1_step_x, a1_step_y, a2_step_x, a2_step_y);
+}
+/* if (BCOMPEN)
+ {
+ if (DSTA2)
+ a1_xadd = 0;
+ else
+ a2_xadd = 0;
+ }//*/
+
+ while (outer_loop--)
+ {
+if (specialLog)
+{
+ WriteLog(" A1_X/Y = %08X/%08X, A2_X/Y = %08X/%08X\n", a1_x, a1_y, a2_x, a2_y);
+}
+ uint32 a1_start = a1_x, a2_start = a2_x, bitPos = 0;
+
+ //Kludge for Hover Strike...
+ //I wonder if this kludge is in conjunction with the SRCENX down below...
+ // This isn't so much a kludge but the way things work in BCOMPEN mode....!
+ if (BCOMPEN && SRCENX)
+ {
+ if (n_pixels < bppSrc)
+ bitPos = bppSrc - n_pixels;
+ }
+
+ inner_loop = n_pixels;
+ while (inner_loop--)
+ {
+if (specialLog)
+{
+ WriteLog(" A1_X/Y = %08X/%08X, A2_X/Y = %08X/%08X\n", a1_x, a1_y, a2_x, a2_y);
+}
+ srcdata = srczdata = dstdata = dstzdata = writedata = inhibit = 0;
+
+ if (!DSTA2) // Data movement: A1 <- A2
+ {
+ // load src data and Z
+// if (SRCEN)
+ if (SRCEN || SRCENX) // Not sure if this is correct... (seems to be...!)
+ {
+ srcdata = READ_PIXEL(a2, REG(A2_FLAGS));
+
+ if (SRCENZ)
+ srczdata = READ_ZDATA(a2, REG(A2_FLAGS));
+ else if (cmd & 0x0001C020) // PATDSEL | TOPBEN | TOPNEN | DSTWRZ
+ srczdata = READ_RDATA(SRCZINT, a2, REG(A2_FLAGS), a2_phrase_mode);
+ }
+ else // Use SRCDATA register...
+ {
+ srcdata = READ_RDATA(SRCDATA, a2, REG(A2_FLAGS), a2_phrase_mode);
+
+ if (cmd & 0x0001C020) // PATDSEL | TOPBEN | TOPNEN | DSTWRZ
+ srczdata = READ_RDATA(SRCZINT, a2, REG(A2_FLAGS), a2_phrase_mode);
+ }
+
+ // load dst data and Z
+ if (DSTEN)
+ {
+ dstdata = READ_PIXEL(a1, REG(A1_FLAGS));
+
+ if (DSTENZ)
+ dstzdata = READ_ZDATA(a1, REG(A1_FLAGS));
+ else
+ dstzdata = READ_RDATA(DSTZ, a1, REG(A1_FLAGS), a1_phrase_mode);
+ }
+ else
+ {
+ dstdata = READ_RDATA(DSTDATA, a1, REG(A1_FLAGS), a1_phrase_mode);
+
+ if (DSTENZ)
+ dstzdata = READ_RDATA(DSTZ, a1, REG(A1_FLAGS), a1_phrase_mode);
+ }
+
+/*This wasn't working... // a1 clipping
+ if (cmd & 0x00000040)
+ {
+ if (a1_x < 0 || a1_y < 0 || (a1_x >> 16) >= (REG(A1_CLIP) & 0x7FFF)
+ || (a1_y >> 16) >= ((REG(A1_CLIP) >> 16) & 0x7FFF))
+ inhibit = 1;
+ }//*/
+
+ if (GOURZ)
+ srczdata = z_i[colour_index] >> 16;
+
+ // apply z comparator
+ if (Z_OP_INF && srczdata < dstzdata) inhibit = 1;
+ if (Z_OP_EQU && srczdata == dstzdata) inhibit = 1;
+ if (Z_OP_SUP && srczdata > dstzdata) inhibit = 1;
+
+ // apply data comparator
+// Note: DCOMPEN only works in 8/16 bpp modes! !!! FIX !!!
+// Does BCOMPEN only work in 1 bpp mode???
+// No, but it always does a 1 bit expansion no matter what the BPP of the channel is set to. !!! FIX !!!
+// This is bit tricky... We need to fix the XADD value so that it acts like a 1BPP value while inside
+// an 8BPP space.
+ if (DCOMPEN | BCOMPEN)
+ {
+//Temp, for testing Hover Strike
+//Doesn't seem to do it... Why?
+//What needs to happen here is twofold. First, the address generator in the outer loop has
+//to honor the BPP when calculating the start address (which it kinda does already). Second,
+//it has to step bit by bit when using BCOMPEN. How to do this???
+ if (BCOMPEN)
+//small problem with this approach: it's not accurate... We need a proper address to begin with
+//and *then* we can do the bit stepping from there the way it's *supposed* to be done... !!! FIX !!!
+//[DONE]
+ {
+ uint32 pixShift = (~bitPos) & (bppSrc - 1);
+ srcdata = (srcdata >> pixShift) & 0x01;
+
+ bitPos++;
+// if (bitPos % bppSrc == 0)
+// a2_x += 0x00010000;
+ }
+/*
+Interesting (Hover Strike--large letter):
+
+Blit! (0018FA70 <- 008DDC40) count: 2 x 13, A1/2_FLAGS: 00014218/00013C18 [cmd: 1401060C]
+ CMD -> src: SRCENX dst: DSTEN misc: a1ctl: UPDA1 UPDA2 mode: ity: PATDSEL z-op: op: LFU_CLEAR ctrl: BCOMPEN BKGWREN
+ A1 step values: -2 (X), 1 (Y)
+ A2 step values: -1 (X), 1 (Y) [mask (unused): 00000000 - FFFFFFFF/FFFFFFFF]
+ A1 -> pitch: 1 phrases, depth: 8bpp, z-off: 0, width: 320 (21), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 8bpp, z-off: 0, width: 192 (1E), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 100/12, A2 x/y: 106/0 Pattern: 000000F300000000
+
+Blit! (0018FA70 <- 008DDC40) count: 8 x 13, A1/2_FLAGS: 00014218/00013C18 [cmd: 1401060C]
+ CMD -> src: SRCENX dst: DSTEN misc: a1ctl: UPDA1 UPDA2 mode: ity: PATDSEL z-op: op: LFU_CLEAR ctrl: BCOMPEN BKGWREN
+ A1 step values: -8 (X), 1 (Y)
+ A2 step values: -1 (X), 1 (Y) [mask (unused): 00000000 - FFFFFFFF/FFFFFFFF]
+ A1 -> pitch: 1 phrases, depth: 8bpp, z-off: 0, width: 320 (21), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 8bpp, z-off: 0, width: 192 (1E), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 102/12, A2 x/y: 107/0 Pattern: 000000F300000000
+
+Blit! (0018FA70 <- 008DDC40) count: 1 x 13, A1/2_FLAGS: 00014218/00013C18 [cmd: 1401060C]
+ CMD -> src: SRCENX dst: DSTEN misc: a1ctl: UPDA1 UPDA2 mode: ity: PATDSEL z-op: op: LFU_CLEAR ctrl: BCOMPEN BKGWREN
+ A1 step values: -1 (X), 1 (Y)
+ A2 step values: -1 (X), 1 (Y) [mask (unused): 00000000 - FFFFFFFF/FFFFFFFF]
+ A1 -> pitch: 1 phrases, depth: 8bpp, z-off: 0, width: 320 (21), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 8bpp, z-off: 0, width: 192 (1E), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 118/12, A2 x/y: 70/0 Pattern: 000000F300000000
+
+Blit! (0018FA70 <- 008DDC40) count: 8 x 13, A1/2_FLAGS: 00014218/00013C18 [cmd: 1401060C]
+ CMD -> src: SRCENX dst: DSTEN misc: a1ctl: UPDA1 UPDA2 mode: ity: PATDSEL z-op: op: LFU_CLEAR ctrl: BCOMPEN BKGWREN
+ A1 step values: -8 (X), 1 (Y)
+ A2 step values: -1 (X), 1 (Y) [mask (unused): 00000000 - FFFFFFFF/FFFFFFFF]
+ A1 -> pitch: 1 phrases, depth: 8bpp, z-off: 0, width: 320 (21), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 8bpp, z-off: 0, width: 192 (1E), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 119/12, A2 x/y: 71/0 Pattern: 000000F300000000
+
+Blit! (0018FA70 <- 008DDC40) count: 1 x 13, A1/2_FLAGS: 00014218/00013C18 [cmd: 1401060C]
+ CMD -> src: SRCENX dst: DSTEN misc: a1ctl: UPDA1 UPDA2 mode: ity: PATDSEL z-op: op: LFU_CLEAR ctrl: BCOMPEN BKGWREN
+ A1 step values: -1 (X), 1 (Y)
+ A2 step values: -1 (X), 1 (Y) [mask (unused): 00000000 - FFFFFFFF/FFFFFFFF]
+ A1 -> pitch: 1 phrases, depth: 8bpp, z-off: 0, width: 320 (21), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 8bpp, z-off: 0, width: 192 (1E), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 127/12, A2 x/y: 66/0 Pattern: 000000F300000000
+
+Blit! (0018FA70 <- 008DDC40) count: 8 x 13, A1/2_FLAGS: 00014218/00013C18 [cmd: 1401060C]
+ CMD -> src: SRCENX dst: DSTEN misc: a1ctl: UPDA1 UPDA2 mode: ity: PATDSEL z-op: op: LFU_CLEAR ctrl: BCOMPEN BKGWREN
+ A1 step values: -8 (X), 1 (Y)
+ A2 step values: -1 (X), 1 (Y) [mask (unused): 00000000 - FFFFFFFF/FFFFFFFF]
+ A1 -> pitch: 1 phrases, depth: 8bpp, z-off: 0, width: 320 (21), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 8bpp, z-off: 0, width: 192 (1E), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 128/12, A2 x/y: 67/0 Pattern: 000000F300000000
+*/
+
+
+ if (!CMPDST)
+ {
+//WriteLog("Blitter: BCOMPEN set on command %08X inhibit prev:%u, now:", cmd, inhibit);
+ // compare source pixel with pattern pixel
+/*
+Blit! (000B8250 <- 0012C3A0) count: 16 x 1, A1/2_FLAGS: 00014420/00012000 [cmd: 05810001]
+ CMD -> src: SRCEN dst: misc: a1ctl: mode: ity: PATDSEL z-op: op: LFU_REPLACE ctrl: BCOMPEN
+ A1 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 384 (22), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 1bpp, z-off: 0, width: 16 (10), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ x/y: 0/20
+...
+*/
+// AvP is still wrong, could be cuz it's doing A1 -> A2...
+
+// Src is the 1bpp bitmap... DST is the PATTERN!!!
+// This seems to solve at least ONE of the problems with MC3D...
+// Why should this be inverted???
+// Bcuz it is. This is supposed to be used only for a bit -> pixel expansion...
+/* if (srcdata == READ_RDATA(PATTERNDATA, a2, REG(A2_FLAGS), a2_phrase_mode))
+// if (srcdata != READ_RDATA(PATTERNDATA, a2, REG(A2_FLAGS), a2_phrase_mode))
+ inhibit = 1;//*/
+/* uint32 A2bpp = 1 << ((REG(A2_FLAGS) >> 3) & 0x07);
+ if (A2bpp == 1 || A2bpp == 16 || A2bpp == 8)
+ inhibit = (srcdata == 0 ? 1: 0);
+// inhibit = !srcdata;
+ else
+ WriteLog("Blitter: Bad BPP (%u) selected for BCOMPEN mode!\n", A2bpp);//*/
+// What it boils down to is this:
+
+ if (srcdata == 0)
+ inhibit = 1;//*/
+ }
+ else
+ {
+ // compare destination pixel with pattern pixel
+ if (dstdata == READ_RDATA(PATTERNDATA, a1, REG(A1_FLAGS), a1_phrase_mode))
+// if (dstdata != READ_RDATA(PATTERNDATA, a1, REG(A1_FLAGS), a1_phrase_mode))
+ inhibit = 1;
+ }
+
+// This is DEFINITELY WRONG
+// if (a1_phrase_mode || a2_phrase_mode)
+// inhibit = !inhibit;
+ }
+
+ if (CLIPA1)
+ {
+ inhibit |= (((a1_x >> 16) < a1_clip_x && (a1_x >> 16) >= 0
+ && (a1_y >> 16) < a1_clip_y && (a1_y >> 16) >= 0) ? 0 : 1);
+ }
+
+ // compute the write data and store
+ if (!inhibit)
+ {
+// Houston, we have a problem...
+// Look here, at PATDSEL and GOURD. If both are active (as they are on the BIOS intro), then there's
+// a conflict! E.g.:
+//Blit! (00100000 <- 000095D0) count: 3 x 1, A1/2_FLAGS: 00014220/00004020 [cmd: 00011008]
+// CMD -> src: dst: DSTEN misc: a1ctl: mode: GOURD ity: PATDSEL z-op: op: LFU_CLEAR ctrl:
+// A1 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 320 (21), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+// A2 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 256 (20), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+// A1 x/y: 90/171, A2 x/y: 808/0 Pattern: 776D770077007700
+
+ if (PATDSEL)
+ {
+ // use pattern data for write data
+ writedata = READ_RDATA(PATTERNDATA, a1, REG(A1_FLAGS), a1_phrase_mode);
+ }
+ else if (ADDDSEL)
+ {
+/*if (blit_start_log)
+ WriteLog("BLIT: ADDDSEL srcdata: %08X\, dstdata: %08X, ", srcdata, dstdata);//*/
+
+ // intensity addition
+//Ok, this is wrong... Or is it? Yes, it's wrong! !!! FIX !!!
+/* writedata = (srcdata & 0xFF) + (dstdata & 0xFF);
+ if (!(TOPBEN) && writedata > 0xFF)
+// writedata = 0xFF;
+ writedata &= 0xFF;
+ writedata |= (srcdata & 0xF00) + (dstdata & 0xF00);
+ if (!(TOPNEN) && writedata > 0xFFF)
+// writedata = 0xFFF;
+ writedata &= 0xFFF;
+ writedata |= (srcdata & 0xF000) + (dstdata & 0xF000);//*/
+//notneeded--writedata &= 0xFFFF;
+/*if (blit_start_log)
+ WriteLog("writedata: %08X\n", writedata);//*/
+/*
+Hover Strike ADDDSEL blit:
+
+Blit! (00098D90 <- 0081DDC0) count: 320 x 287, A1/2_FLAGS: 00004220/00004020 [cmd: 00020208]
+ CMD -> src: dst: DSTEN misc: a1ctl: UPDA1 mode: ity: ADDDSEL z-op: op: LFU_CLEAR ctrl:
+ A1 step values: -320 (X), 1 (Y)
+ A1 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 320 (21), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 256 (20), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 0/0, A2 x/y: 3288/0 Pattern: 0000000000000000 SRCDATA: 00FD00FD00FD00FD
+*/
+ writedata = (srcdata & 0xFF) + (dstdata & 0xFF);
+
+ if (!TOPBEN)
+ {
+//This is correct now, but slow...
+ int16 s = (srcdata & 0xFF) | (srcdata & 0x80 ? 0xFF00 : 0x0000),
+ d = dstdata & 0xFF;
+ int16 sum = s + d;
+
+ if (sum < 0)
+ writedata = 0x00;
+ else if (sum > 0xFF)
+ writedata = 0xFF;
+ else
+ writedata = (uint32)sum;
+ }
+
+//This doesn't seem right... Looks like it would muck up the low byte... !!! FIX !!!
+ writedata |= (srcdata & 0xF00) + (dstdata & 0xF00);
+
+ if (!TOPNEN && writedata > 0xFFF)
+ {
+ writedata &= 0xFFF;
+ }
+
+ writedata |= (srcdata & 0xF000) + (dstdata & 0xF000);
+ }
+ else
+ {
+ if (LFU_NAN) writedata |= ~srcdata & ~dstdata;
+ if (LFU_NA) writedata |= ~srcdata & dstdata;
+ if (LFU_AN) writedata |= srcdata & ~dstdata;
+ if (LFU_A) writedata |= srcdata & dstdata;
+ }
+
+//Although, this looks like it's OK... (even if it is shitty!)
+//According to JTRM, this is part of the four things the blitter does with the write data (the other
+//three being PATDSEL, ADDDSEL, and LFU (default). I'm not sure which gets precedence, this or PATDSEL
+//(see above blit example)...
+ if (GOURD)
+ writedata = ((gd_c[colour_index]) << 8) | (gd_i[colour_index] >> 16);
+
+ if (SRCSHADE)
+ {
+ int intensity = srcdata & 0xFF;
+ int ia = gd_ia >> 16;
+ if (ia & 0x80)
+ ia = 0xFFFFFF00 | ia;
+ intensity += ia;
+ if (intensity < 0)
+ intensity = 0;
+ if (intensity > 0xFF)
+ intensity = 0xFF;
+ writedata = (srcdata & 0xFF00) | intensity;
+ }
+ }
+ else
+ {
+ writedata = dstdata;
+ srczdata = dstzdata;
+ }
+
+//Tried 2nd below for Hover Strike: No dice.
+ if (/*a1_phrase_mode || */BKGWREN || !inhibit)
+// if (/*a1_phrase_mode || BKGWREN ||*/ !inhibit)
+ {
+/*if (((REG(A1_FLAGS) >> 3) & 0x07) == 5)
+{
+ uint32 offset = a1_addr+(PIXEL_OFFSET_32(a1)<<2);
+// (((((uint32)a##_y >> 16) * a##_width) + (((uint32)a##_x >> 16) & ~1)) * (1 + a##_pitch) + (((uint32)a##_x >> 16) & 1))
+ if ((offset >= 0x1FF020 && offset <= 0x1FF03F) || (offset >= 0x1FF820 && offset <= 0x1FF83F))
+ WriteLog("32bpp pixel write: A1 Phrase mode --> ");
+}//*/
+ // write to the destination
+ WRITE_PIXEL(a1, REG(A1_FLAGS), writedata);
+ if (DSTWRZ)
+ WRITE_ZDATA(a1, REG(A1_FLAGS), srczdata);
+ }
+ }
+ else // if (DSTA2) // Data movement: A1 -> A2
+ {
+ // load src data and Z
+ if (SRCEN)
+ {
+ srcdata = READ_PIXEL(a1, REG(A1_FLAGS));
+ if (SRCENZ)
+ srczdata = READ_ZDATA(a1, REG(A1_FLAGS));
+ else if (cmd & 0x0001C020) // PATDSEL | TOPBEN | TOPNEN | DSTWRZ
+ srczdata = READ_RDATA(SRCZINT, a1, REG(A1_FLAGS), a1_phrase_mode);
+ }
+ else
+ {
+ srcdata = READ_RDATA(SRCDATA, a1, REG(A1_FLAGS), a1_phrase_mode);
+ if (cmd & 0x001C020) // PATDSEL | TOPBEN | TOPNEN | DSTWRZ
+ srczdata = READ_RDATA(SRCZINT, a1, REG(A1_FLAGS), a1_phrase_mode);
+ }
+
+ // load dst data and Z
+ if (DSTEN)
+ {
+ dstdata = READ_PIXEL(a2, REG(A2_FLAGS));
+ if (DSTENZ)
+ dstzdata = READ_ZDATA(a2, REG(A2_FLAGS));
+ else
+ dstzdata = READ_RDATA(DSTZ, a2, REG(A2_FLAGS), a2_phrase_mode);
+ }
+ else
+ {
+ dstdata = READ_RDATA(DSTDATA, a2, REG(A2_FLAGS), a2_phrase_mode);
+ if (DSTENZ)
+ dstzdata = READ_RDATA(DSTZ, a2, REG(A2_FLAGS), a2_phrase_mode);
+ }
+
+ if (GOURZ)
+ srczdata = z_i[colour_index] >> 16;
+
+ // apply z comparator
+ if (Z_OP_INF && srczdata < dstzdata) inhibit = 1;
+ if (Z_OP_EQU && srczdata == dstzdata) inhibit = 1;
+ if (Z_OP_SUP && srczdata > dstzdata) inhibit = 1;
+
+ // apply data comparator
+//NOTE: The bit comparator (BCOMPEN) is NOT the same at the data comparator!
+ if (DCOMPEN | BCOMPEN)
+ {
+ if (!CMPDST)
+ {
+ // compare source pixel with pattern pixel
+// AvP: Numbers are correct, but sprites are not!
+//This doesn't seem to be a problem... But could still be wrong...
+/* if (srcdata == READ_RDATA(PATTERNDATA, a1, REG(A1_FLAGS), a1_phrase_mode))
+// if (srcdata != READ_RDATA(PATTERNDATA, a1, REG(A1_FLAGS), a1_phrase_mode))
+ inhibit = 1;//*/
+// This is probably not 100% correct... It works in the 1bpp case
+// (in A1 <- A2 mode, that is...)
+// AvP: This is causing blocks to be written instead of bit patterns...
+// Works now...
+// NOTE: We really should separate out the BCOMPEN & DCOMPEN stuff!
+/* uint32 A1bpp = 1 << ((REG(A1_FLAGS) >> 3) & 0x07);
+ if (A1bpp == 1 || A1bpp == 16 || A1bpp == 8)
+ inhibit = (srcdata == 0 ? 1: 0);
+ else
+ WriteLog("Blitter: Bad BPP (%u) selected for BCOMPEN mode!\n", A1bpp);//*/
+// What it boils down to is this:
+ if (srcdata == 0)
+ inhibit = 1;//*/
+ }
+ else
+ {
+ // compare destination pixel with pattern pixel
+ if (dstdata == READ_RDATA(PATTERNDATA, a2, REG(A2_FLAGS), a2_phrase_mode))
+// if (dstdata != READ_RDATA(PATTERNDATA, a2, REG(A2_FLAGS), a2_phrase_mode))
+ inhibit = 1;
+ }
+
+// This is DEFINITELY WRONG
+// if (a1_phrase_mode || a2_phrase_mode)
+// inhibit = !inhibit;
+ }
+
+ if (CLIPA1)
+ {
+ inhibit |= (((a1_x >> 16) < a1_clip_x && (a1_x >> 16) >= 0
+ && (a1_y >> 16) < a1_clip_y && (a1_y >> 16) >= 0) ? 0 : 1);
+ }
+
+ // compute the write data and store
+ if (!inhibit)
+ {
+ if (PATDSEL)
+ {
+ // use pattern data for write data
+ writedata = READ_RDATA(PATTERNDATA, a2, REG(A2_FLAGS), a2_phrase_mode);
+ }
+ else if (ADDDSEL)
+ {
+ // intensity addition
+ writedata = (srcdata & 0xFF) + (dstdata & 0xFF);
+ if (!(TOPBEN) && writedata > 0xFF)
+ writedata = 0xFF;
+ writedata |= (srcdata & 0xF00) + (dstdata & 0xF00);
+ if (!(TOPNEN) && writedata > 0xFFF)
+ writedata = 0xFFF;
+ writedata |= (srcdata & 0xF000) + (dstdata & 0xF000);
+ }
+ else
+ {
+ if (LFU_NAN)
+ writedata |= ~srcdata & ~dstdata;
+ if (LFU_NA)
+ writedata |= ~srcdata & dstdata;
+ if (LFU_AN)
+ writedata |= srcdata & ~dstdata;
+ if (LFU_A)
+ writedata |= srcdata & dstdata;
+ }
+
+ if (GOURD)
+ writedata = ((gd_c[colour_index]) << 8) | (gd_i[colour_index] >> 16);
+
+ if (SRCSHADE)
+ {
+ int intensity = srcdata & 0xFF;
+ int ia = gd_ia >> 16;
+ if (ia & 0x80)
+ ia = 0xFFFFFF00 | ia;
+ intensity += ia;
+ if (intensity < 0)
+ intensity = 0;
+ if (intensity > 0xFF)
+ intensity = 0xFF;
+ writedata = (srcdata & 0xFF00) | intensity;
+ }
+ }
+ else
+ {
+ writedata = dstdata;
+ srczdata = dstzdata;
+ }
+
+ if (/*a2_phrase_mode || */BKGWREN || !inhibit)
+ {
+/*if (logGo)
+{
+ uint32 offset = a2_addr+(PIXEL_OFFSET_16(a2)<<1);
+// (((((uint32)a##_y >> 16) * a##_width) + (((uint32)a##_x >> 16) & ~1)) * (1 + a##_pitch) + (((uint32)a##_x >> 16) & 1))
+ WriteLog("[%08X:%04X] ", offset, writedata);
+}//*/
+ // write to the destination
+ WRITE_PIXEL(a2, REG(A2_FLAGS), writedata);
+
+ if (DSTWRZ)
+ WRITE_ZDATA(a2, REG(A2_FLAGS), srczdata);
+ }
+ }
+
+ // Update x and y (inner loop)
+//Now it does! But crappy, crappy, crappy! !!! FIX !!! [DONE]
+//This is less than ideal, but it works...
+ if (!BCOMPEN)
+ {//*/
+ a1_x += a1_xadd, a1_y += a1_yadd;
+ a2_x = (a2_x + a2_xadd) & a2_mask_x, a2_y = (a2_y + a2_yadd) & a2_mask_y;
+ }
+ else
+ {
+ a1_y += a1_yadd, a2_y = (a2_y + a2_yadd) & a2_mask_y;
+ if (!DSTA2)
+ {
+ a1_x += a1_xadd;
+ if (bitPos % bppSrc == 0)
+ a2_x = (a2_x + a2_xadd) & a2_mask_x;
+ }
+ else
+ {
+ a2_x = (a2_x + a2_xadd) & a2_mask_x;
+ if (bitPos % bppSrc == 0)
+ a1_x += a1_xadd;
+ }
+ }//*/
+
+ if (GOURZ)
+ z_i[colour_index] += zadd;
+
+ if (GOURD || SRCSHADE)
+ {
+ gd_i[colour_index] += gd_ia;
+//Hmm, this doesn't seem to do anything...
+//But it is correct according to the JTRM...!
+if ((int32)gd_i[colour_index] < 0)
+ gd_i[colour_index] = 0;
+if (gd_i[colour_index] > 0x00FFFFFF)
+ gd_i[colour_index] = 0x00FFFFFF;//*/
+
+ gd_c[colour_index] += gd_ca;
+if ((int32)gd_c[colour_index] < 0)
+ gd_c[colour_index] = 0;
+if (gd_c[colour_index] > 0x000000FF)
+ gd_c[colour_index] = 0x000000FF;//*/
+ }
+
+ if (GOURD || SRCSHADE || GOURZ)
+ {
+ if (a1_phrase_mode)
+//This screws things up WORSE (for the BIOS opening screen)
+// if (a1_phrase_mode || a2_phrase_mode)
+ colour_index = (colour_index + 1) & 0x03;
+ }
+ }
+
+/*
+Here's the problem... The phrase mode code!
+Blit! (00100000 -> 00148000) count: 327 x 267, A1/2_FLAGS: 00004420/00004420 [cmd: 41802E01]
+ CMD -> src: SRCEN dst: misc: a1ctl: UPDA1 UPDA2 mode: DSTA2 GOURZ ity: z-op: op: LFU_REPLACE ctrl: SRCSHADE
+ A1 step values: -327 (X), 1 (Y)
+ A2 step values: -327 (X), 1 (Y) [mask (unused): 00000000 - FFFFFFFF/FFFFFFFF]
+ A1 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 384 (22), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 384 (22), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 28/58, A2 x/y: 28/58 Pattern: 00EA7BEA77EA77EA SRCDATA: 7BFF7BFF7BFF7BFF
+
+Below fixes it, but then borks:
+; O
+
+Blit! (00110000 <- 0010B2A8) count: 12 x 12, A1/2_FLAGS: 000042E2/00000020 [cmd: 09800609]
+ CMD -> src: SRCEN dst: DSTEN misc: a1ctl: UPDA1 UPDA2 mode: ity: z-op: op: LFU_REPLACE ctrl: DCOMPEN
+ A1 step values: -15 (X), 1 (Y)
+ A2 step values: -4 (X), 0 (Y) [mask (unused): 00000000 - FFFFFFFF/FFFFFFFF]
+ A1 -> pitch: 4 phrases, depth: 16bpp, z-off: 3, width: 320 (21), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 1 (00), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 173/144, A2 x/y: 4052/0
+
+Lesse, with pre-add we'd have:
+
+ oooooooooooo
+00001111222233334444555566667777
+ ^ ^starts here...
+ | ^ends here.
+ |rolls back to here. Hmm.
+
+*/
+//NOTE: The way to fix the CD BIOS is to uncomment below and comment the stuff after
+// the phrase mode mucking around. But it fucks up everything else...
+//#define SCREWY_CD_DEPENDENT
+#ifdef SCREWY_CD_DEPENDENT
+ a1_x += a1_step_x;
+ a1_y += a1_step_y;
+ a2_x += a2_step_x;
+ a2_y += a2_step_y;//*/
+#endif
+
+ //New: Phrase mode taken into account! :-p
+/* if (a1_phrase_mode) // v1
+ {
+ // Bump the pointer to the next phrase boundary
+ // Even though it works, this is crappy... Clean it up!
+ uint32 size = 64 / a1_psize;
+
+ // Crappy kludge... ('aligning' source to destination)
+ if (a2_phrase_mode && DSTA2)
+ {
+ uint32 extra = (a2_start >> 16) % size;
+ a1_x += extra << 16;
+ }
+
+ uint32 newx = (a1_x >> 16) / size;
+ uint32 newxrem = (a1_x >> 16) % size;
+ a1_x &= 0x0000FFFF;
+ a1_x |= (((newx + (newxrem == 0 ? 0 : 1)) * size) & 0xFFFF) << 16;
+ }//*/
+ if (a1_phrase_mode) // v2
+ {
+ // Bump the pointer to the next phrase boundary
+ // Even though it works, this is crappy... Clean it up!
+ uint32 size = 64 / a1_psize;
+
+ // Crappy kludge... ('aligning' source to destination)
+ if (a2_phrase_mode && DSTA2)
+ {
+ uint32 extra = (a2_start >> 16) % size;
+ a1_x += extra << 16;
+ }
+
+ uint32 pixelSize = (size - 1) << 16;
+ a1_x = (a1_x + pixelSize) & ~pixelSize;
+ }
+
+/* if (a2_phrase_mode) // v1
+ {
+ // Bump the pointer to the next phrase boundary
+ // Even though it works, this is crappy... Clean it up!
+ uint32 size = 64 / a2_psize;
+
+ // Crappy kludge... ('aligning' source to destination)
+ // Prolly should do this for A1 channel as well... [DONE]
+ if (a1_phrase_mode && !DSTA2)
+ {
+ uint32 extra = (a1_start >> 16) % size;
+ a2_x += extra << 16;
+ }
+
+ uint32 newx = (a2_x >> 16) / size;
+ uint32 newxrem = (a2_x >> 16) % size;
+ a2_x &= 0x0000FFFF;
+ a2_x |= (((newx + (newxrem == 0 ? 0 : 1)) * size) & 0xFFFF) << 16;
+ }//*/
+ if (a2_phrase_mode) // v1
+ {
+ // Bump the pointer to the next phrase boundary
+ // Even though it works, this is crappy... Clean it up!
+ uint32 size = 64 / a2_psize;
+
+ // Crappy kludge... ('aligning' source to destination)
+ // Prolly should do this for A1 channel as well... [DONE]
+ if (a1_phrase_mode && !DSTA2)
+ {
+ uint32 extra = (a1_start >> 16) % size;
+ a2_x += extra << 16;
+ }
+
+ uint32 pixelSize = (size - 1) << 16;
+ a2_x = (a2_x + pixelSize) & ~pixelSize;
+ }
+
+ //Not entirely: This still mucks things up... !!! FIX !!!
+ //Should this go before or after the phrase mode mucking around?
+#ifndef SCREWY_CD_DEPENDENT
+ a1_x += a1_step_x;
+ a1_y += a1_step_y;
+ a2_x += a2_step_x;
+ a2_y += a2_step_y;//*/
+#endif
+ }
+
+ // write values back to registers
+ WREG(A1_PIXEL, (a1_y & 0xFFFF0000) | ((a1_x >> 16) & 0xFFFF));
+ WREG(A1_FPIXEL, (a1_y << 16) | (a1_x & 0xFFFF));
+ WREG(A2_PIXEL, (a2_y & 0xFFFF0000) | ((a2_x >> 16) & 0xFFFF));
+specialLog = false;
+}
+
+void blitter_blit(uint32 cmd)
+{
+//Apparently this is doing *something*, just not sure exactly what...
+/*if (cmd == 0x41802E01)
+{
+ WriteLog("BLIT: Found our blit. Was: %08X ", cmd);
+ cmd = 0x01800E01;
+ WriteLog("Is: %08X\n", cmd);
+}//*/
+
+ uint32 pitchValue[4] = { 0, 1, 3, 2 };
+ colour_index = 0;
+ src = cmd & 0x07;
+ dst = (cmd >> 3) & 0x07;
+ misc = (cmd >> 6) & 0x03;
+ a1ctl = (cmd >> 8) & 0x7;
+ mode = (cmd >> 11) & 0x07;
+ ity = (cmd >> 14) & 0x0F;
+ zop = (cmd >> 18) & 0x07;
+ op = (cmd >> 21) & 0x0F;
+ ctrl = (cmd >> 25) & 0x3F;
+
+ // Addresses in A1/2_BASE are *phrase* aligned, i.e., bottom three bits are ignored!
+ // NOTE: This fixes Rayman's bad collision detection AND keeps T2K working!
+ a1_addr = REG(A1_BASE) & 0xFFFFFFF8;
+ a2_addr = REG(A2_BASE) & 0xFFFFFFF8;
+
+ a1_zoffs = (REG(A1_FLAGS) >> 6) & 7;
+ a2_zoffs = (REG(A2_FLAGS) >> 6) & 7;
+
+ xadd_a1_control = (REG(A1_FLAGS) >> 16) & 0x03;
+ xadd_a2_control = (REG(A2_FLAGS) >> 16) & 0x03;
+
+ a1_pitch = pitchValue[(REG(A1_FLAGS) & 0x03)];
+ a2_pitch = pitchValue[(REG(A2_FLAGS) & 0x03)];
+
+ n_pixels = REG(PIXLINECOUNTER) & 0xFFFF;
+ n_lines = (REG(PIXLINECOUNTER) >> 16) & 0xFFFF;
+
+ a1_x = (REG(A1_PIXEL) << 16) | (REG(A1_FPIXEL) & 0xFFFF);
+ a1_y = (REG(A1_PIXEL) & 0xFFFF0000) | (REG(A1_FPIXEL) >> 16);
+//According to the JTRM, X is restricted to 15 bits and Y is restricted to 12.
+//But it seems to fuck up T2K! !!! FIX !!!
+//Could it be sign extended??? Doesn't seem to be so according to JTRM
+// a1_x &= 0x7FFFFFFF, a1_y &= 0x0FFFFFFF;
+//Actually, it says that the X is 16 bits. But it still seems to mess with the Y when restricted to 12...
+// a1_y &= 0x0FFFFFFF;
+
+// a1_width = blitter_scanline_width[((REG(A1_FLAGS) & 0x00007E00) >> 9)];
+// According to JTRM, this must give a *whole number* of phrases in the current
+// pixel size (this means the lookup above is WRONG)... !!! FIX !!!
+ uint32 m = (REG(A1_FLAGS) >> 9) & 0x03, e = (REG(A1_FLAGS) >> 11) & 0x0F;
+ a1_width = ((0x04 | m) << e) >> 2;//*/
+
+ a2_x = (REG(A2_PIXEL) & 0x0000FFFF) << 16;
+ a2_y = (REG(A2_PIXEL) & 0xFFFF0000);
+//According to the JTRM, X is restricted to 15 bits and Y is restricted to 12.
+//But it seems to fuck up T2K! !!! FIX !!!
+// a2_x &= 0x7FFFFFFF, a2_y &= 0x0FFFFFFF;
+//Actually, it says that the X is 16 bits. But it still seems to mess with the Y when restricted to 12...
+// a2_y &= 0x0FFFFFFF;
+
+// a2_width = blitter_scanline_width[((REG(A2_FLAGS) & 0x00007E00) >> 9)];
+// According to JTRM, this must give a *whole number* of phrases in the current
+// pixel size (this means the lookup above is WRONG)... !!! FIX !!!
+ m = (REG(A2_FLAGS) >> 9) & 0x03, e = (REG(A2_FLAGS) >> 11) & 0x0F;
+ a2_width = ((0x04 | m) << e) >> 2;//*/
+ a2_mask_x = ((REG(A2_MASK) & 0x0000FFFF) << 16) | 0xFFFF;
+ a2_mask_y = (REG(A2_MASK) & 0xFFFF0000) | 0xFFFF;
+
+ // Check for "use mask" flag
+ if (!(REG(A2_FLAGS) & 0x8000))
+ {
+ a2_mask_x = 0xFFFFFFFF; // must be 16.16
+ a2_mask_y = 0xFFFFFFFF; // must be 16.16
+ }
+
+ a1_phrase_mode = 0;
+
+ // According to the official documentation, a hardware bug ties A2's yadd bit to A1's...
+ a2_yadd = a1_yadd = (YADD1_A1 ? 1 << 16 : 0);
+
+ if (YSIGNSUB_A1)
+ a1_yadd = -a1_yadd;
+
+ // determine a1_xadd
+ switch (xadd_a1_control)
+ {
+ case XADDPHR:
+// This is a documented Jaguar bug relating to phrase mode and truncation.... Look into it!
+ // add phrase offset to X and truncate
+ a1_xadd = 1 << 16;
+ a1_phrase_mode = 1;
+ break;
+ case XADDPIX:
+ // add pixelsize (1) to X
+ a1_xadd = 1 << 16;
+ break;
+ case XADD0:
+ // add zero (for those nice vertical lines)
+ a1_xadd = 0;
+ break;
+ case XADDINC:
+ // add the contents of the increment register
+ a1_xadd = (REG(A1_INC) << 16) | (REG(A1_FINC) & 0x0000FFFF);
+ a1_yadd = (REG(A1_INC) & 0xFFFF0000) | (REG(A1_FINC) >> 16);
+ break;
+ }
+
+
+//Blit! (0011D000 -> 000B9600) count: 228 x 1, A1/2_FLAGS: 00073820/00064220 [cmd: 41802801]
+// A1 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 128 (1C), addctl: XADDINC YADD1 XSIGNADD YSIGNADD
+// A2 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 320 (21), addctl: XADD0 YADD1 XSIGNADD YSIGNADD
+//if (YADD1_A1 && YADD1_A2 && xadd_a2_control == XADD0 && xadd_a1_control == XADDINC)// &&
+// uint32 a1f = REG(A1_FLAGS), a2f = REG(A2_FLAGS);
+//Ok, so this ISN'T it... Prolly the XADDPHR code above that's doing it...
+//if (REG(A1_FLAGS) == 0x00073820 && REG(A2_FLAGS) == 0x00064220 && cmd == 0x41802801)
+// A1 x/y: 14368/7, A2 x/y: 150/36
+//This is it... The problem...
+//if ((a1_x >> 16) == 14368) // 14368 = $3820
+// return; //Lesse what we got...
+
+ if (XSIGNSUB_A1)
+ a1_xadd = -a1_xadd;
+
+ if (YSIGNSUB_A2)
+ a2_yadd = -a2_yadd;
+
+ a2_phrase_mode = 0;
+
+ // determine a2_xadd
+ switch (xadd_a2_control)
+ {
+ case XADDPHR:
+ // add phrase offset to X and truncate
+ a2_xadd = 1 << 16;
+ a2_phrase_mode = 1;
+ break;
+ case XADDPIX:
+ // add pixelsize (1) to X
+ a2_xadd = 1 << 16;
+ break;
+ case XADD0:
+ // add zero (for those nice vertical lines)
+ a2_xadd = 0;
+ break;
+//This really isn't a valid bit combo for A2... Shouldn't this cause the blitter to just say no?
+ case XADDINC:
+WriteLog("BLIT: Asked to use invalid bit combo (XADDINC) for A2...\n");
+ // add the contents of the increment register
+ // since there is no register for a2 we just add 1
+//Let's do nothing, since it's not listed as a valid bit combo...
+// a2_xadd = 1 << 16;
+ break;
+ }
+
+ if (XSIGNSUB_A2)
+ a2_xadd = -a2_xadd;
+
+ // Modify outer loop steps based on blitter command
+
+ a1_step_x = 0;
+ a1_step_y = 0;
+ a2_step_x = 0;
+ a2_step_y = 0;
+
+ if (UPDA1F)
+ a1_step_x = (REG(A1_FSTEP) & 0xFFFF),
+ a1_step_y = (REG(A1_FSTEP) >> 16);
+
+ if (UPDA1)
+ a1_step_x |= ((REG(A1_STEP) & 0x0000FFFF) << 16),
+ a1_step_y |= ((REG(A1_STEP) & 0xFFFF0000));
+
+ if (UPDA2)
+ a2_step_x = (REG(A2_STEP) & 0x0000FFFF) << 16,
+ a2_step_y = (REG(A2_STEP) & 0xFFFF0000);
+
+ outer_loop = n_lines;
+
+ // Clipping...
+
+ if (CLIPA1)
+ a1_clip_x = REG(A1_CLIP) & 0x7FFF,
+ a1_clip_y = (REG(A1_CLIP) >> 16) & 0x7FFF;
+
+// This phrase sizing is incorrect as well... !!! FIX !!! [NOTHING TO FIX]
+// Err, this is pixel size... (and it's OK)
+ a2_psize = 1 << ((REG(A2_FLAGS) >> 3) & 0x07);
+ a1_psize = 1 << ((REG(A1_FLAGS) >> 3) & 0x07);
+
+ // Z-buffering
+ if (GOURZ)
+ {
+ zadd = REG(ZINC);
+
+ for(int v=0; v<4; v++)
+ z_i[v] = REG(PHRASEZ0 + v*4);
+ }
+
+ // Gouraud shading
+ if (GOURD || GOURZ || SRCSHADE)
+ {
+ gd_c[0] = blitter_ram[PATTERNDATA + 6];
+ gd_i[0] = ((uint32)blitter_ram[PATTERNDATA + 7] << 16)
+ | ((uint32)blitter_ram[SRCDATA + 6] << 8) | blitter_ram[SRCDATA + 7];
+
+ gd_c[1] = blitter_ram[PATTERNDATA + 4];
+ gd_i[1] = ((uint32)blitter_ram[PATTERNDATA + 5] << 16)
+ | ((uint32)blitter_ram[SRCDATA + 4] << 8) | blitter_ram[SRCDATA + 5];
+
+ gd_c[2] = blitter_ram[PATTERNDATA + 2];
+ gd_i[2] = ((uint32)blitter_ram[PATTERNDATA + 3] << 16)
+ | ((uint32)blitter_ram[SRCDATA + 2] << 8) | blitter_ram[SRCDATA + 3];
+
+ gd_c[3] = blitter_ram[PATTERNDATA + 0];
+ gd_i[3] = ((uint32)blitter_ram[PATTERNDATA + 1] << 16)
+ | ((uint32)blitter_ram[SRCDATA + 0] << 8) | blitter_ram[SRCDATA + 1];
+
+ gouraud_add = REG(INTENSITYINC);
+
+ gd_ia = gouraud_add & 0x00FFFFFF;
+ if (gd_ia & 0x00800000)
+ gd_ia = 0xFF000000 | gd_ia;
+
+ gd_ca = (gouraud_add >> 24) & 0xFF;
+ if (gd_ca & 0x00000080)
+ gd_ca = 0xFFFFFF00 | gd_ca;
+ }
+
+ // Bit comparitor fixing...
+/* if (BCOMPEN)
+ {
+ // Determine the data flow direction...
+ if (!DSTA2)
+ a2_step_x /= (1 << ((REG(A2_FLAGS) >> 3) & 0x07));
+ else
+ ;//add this later
+ }//*/
+/* if (BCOMPEN)//Kludge for Hover Strike... !!! FIX !!!
+ {
+ // Determine the data flow direction...
+ if (!DSTA2)
+ a2_x <<= 3;
+ }//*/
+
+#ifdef LOG_BLITS
+ if (start_logging)
+ {
+ WriteLog("Blit!\n");
+ WriteLog(" cmd = 0x%.8x\n",cmd);
+ WriteLog(" a1_base = %08X\n", a1_addr);
+ WriteLog(" a1_pitch = %d\n", a1_pitch);
+ WriteLog(" a1_psize = %d\n", a1_psize);
+ WriteLog(" a1_width = %d\n", a1_width);
+ WriteLog(" a1_xadd = %f (phrase=%d)\n", (float)a1_xadd / 65536.0, a1_phrase_mode);
+ WriteLog(" a1_yadd = %f\n", (float)a1_yadd / 65536.0);
+ WriteLog(" a1_xstep = %f\n", (float)a1_step_x / 65536.0);
+ WriteLog(" a1_ystep = %f\n", (float)a1_step_y / 65536.0);
+ WriteLog(" a1_x = %f\n", (float)a1_x / 65536.0);
+ WriteLog(" a1_y = %f\n", (float)a1_y / 65536.0);
+ WriteLog(" a1_zoffs = %i\n",a1_zoffs);
+
+ WriteLog(" a2_base = %08X\n", a2_addr);
+ WriteLog(" a2_pitch = %d\n", a2_pitch);
+ WriteLog(" a2_psize = %d\n", a2_psize);
+ WriteLog(" a2_width = %d\n", a2_width);
+ WriteLog(" a2_xadd = %f (phrase=%d)\n", (float)a2_xadd / 65536.0, a2_phrase_mode);
+ WriteLog(" a2_yadd = %f\n", (float)a2_yadd / 65536.0);
+ WriteLog(" a2_xstep = %f\n", (float)a2_step_x / 65536.0);
+ WriteLog(" a2_ystep = %f\n", (float)a2_step_y / 65536.0);
+ WriteLog(" a2_x = %f\n", (float)a2_x / 65536.0);
+ WriteLog(" a2_y = %f\n", (float)a2_y / 65536.0);
+ WriteLog(" a2_mask_x= 0x%.4x\n",a2_mask_x);
+ WriteLog(" a2_mask_y= 0x%.4x\n",a2_mask_y);
+ WriteLog(" a2_zoffs = %i\n",a2_zoffs);
+
+ WriteLog(" count = %d x %d\n", n_pixels, n_lines);
+
+ WriteLog(" command = %08X\n", cmd);
+ WriteLog(" dsten = %i\n",DSTEN);
+ WriteLog(" srcen = %i\n",SRCEN);
+ WriteLog(" patdsel = %i\n",PATDSEL);
+ WriteLog(" color = 0x%.8x\n",REG(PATTERNDATA));
+ WriteLog(" dcompen = %i\n",DCOMPEN);
+ WriteLog(" bcompen = %i\n",BCOMPEN);
+ WriteLog(" cmpdst = %i\n",CMPDST);
+ WriteLog(" GOURZ = %i\n",GOURZ);
+ WriteLog(" GOURD = %i\n",GOURD);
+ WriteLog(" SRCSHADE= %i\n",SRCSHADE);
+ }
+#endif
+
+//NOTE: Pitch is ignored!
+
+//This *might* be the altimeter blits (they are)...
+//On captured screen, x-pos for black (inner) is 259, for pink is 257
+//Black is short by 3, pink is short by 1...
+/*
+Blit! (00110000 <- 000BF010) count: 9 x 31, A1/2_FLAGS: 000042E2/00010020 [cmd: 00010200]
+ CMD -> src: dst: misc: a1ctl: UPDA1 mode: ity: PATDSEL z-op: op: LFU_CLEAR ctrl:
+ A1 -> pitch: 4 phrases, depth: 16bpp, z-off: 3, width: 320 (21), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 1 (00), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 262/124, A2 x/y: 128/0
+Blit! (00110000 <- 000BF010) count: 5 x 38, A1/2_FLAGS: 000042E2/00010020 [cmd: 00010200]
+ CMD -> src: dst: misc: a1ctl: UPDA1 mode: ity: PATDSEL z-op: op: LFU_CLEAR ctrl:
+ A1 -> pitch: 4 phrases, depth: 16bpp, z-off: 3, width: 320 (21), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 1 (00), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 264/117, A2 x/y: 407/0
+
+Blit! (00110000 <- 000BF010) count: 9 x 23, A1/2_FLAGS: 000042E2/00010020 [cmd: 00010200]
+ CMD -> src: dst: misc: a1ctl: UPDA1 mode: ity: PATDSEL z-op: op: LFU_CLEAR ctrl:
+ A1 step values: -10 (X), 1 (Y)
+ A1 -> pitch: 4(2) phrases, depth: 16bpp, z-off: 3, width: 320 (21), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1(0) phrases, depth: 16bpp, z-off: 0, width: 1 (00), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 262/132, A2 x/y: 129/0
+Blit! (00110000 <- 000BF010) count: 5 x 27, A1/2_FLAGS: 000042E2/00010020 [cmd: 00010200]
+ CMD -> src: dst: misc: a1ctl: UPDA1 mode: ity: PATDSEL z-op: op: LFU_CLEAR ctrl:
+ A1 step values: -8 (X), 1 (Y)
+ A1 -> pitch: 4(2) phrases, depth: 16bpp, z-off: 3, width: 320 (21), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1(0) phrases, depth: 16bpp, z-off: 0, width: 1 (00), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 264/128, A2 x/y: 336/0
+
+ 264v vCursor ends up here...
+ xxxxx...`
+ 111122223333
+
+262v vCursor ends up here...
+ xxxxxxxxx.'
+ 1111222233334444
+
+Fixed! Now for more:
+
+; This looks like the ship icon in the upper left corner...
+
+Blit! (00110000 <- 0010B2A8) count: 11 x 12, A1/2_FLAGS: 000042E2/00000020 [cmd: 09800609]
+ CMD -> src: SRCEN dst: DSTEN misc: a1ctl: UPDA1 UPDA2 mode: ity: z-op: op: LFU_REPLACE ctrl: DCOMPEN
+ A1 step values: -12 (X), 1 (Y)
+ A2 step values: 0 (X), 0 (Y) [mask (unused): 00000000 - FFFFFFFF/FFFFFFFF]
+ A1 -> pitch: 4 phrases, depth: 16bpp, z-off: 3, width: 320 (21), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 1 (00), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 20/24, A2 x/y: 5780/0
+
+Also fixed!
+
+More (not sure this is a blitter problem as much as it's a GPU problem):
+All but the "M" are trashed...
+This does *NOT* look like a blitter problem, as it's rendering properly...
+Actually, if you look at the A1 step values, there IS a discrepancy!
+
+; D
+
+Blit! (00110000 <- 0010B2A8) count: 12 x 12, A1/2_FLAGS: 000042E2/00000020 [cmd: 09800609]
+ CMD -> src: SRCEN dst: DSTEN misc: a1ctl: UPDA1 UPDA2 mode: ity: z-op: op: LFU_REPLACE ctrl: DCOMPEN
+ A1 step values: -14 (X), 1 (Y)
+ A2 step values: -4 (X), 0 (Y) [mask (unused): 00000000 - FFFFFFFF/FFFFFFFF]
+ A1 -> pitch: 4 phrases, depth: 16bpp, z-off: 3, width: 320 (21), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 1 (00), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 134/144, A2 x/y: 2516/0
+;129,146: +5,-2
+
+; E
+
+Blit! (00110000 <- 0010B2A8) count: 12 x 12, A1/2_FLAGS: 000042E2/00000020 [cmd: 09800609]
+ CMD -> src: SRCEN dst: DSTEN misc: a1ctl: UPDA1 UPDA2 mode: ity: z-op: op: LFU_REPLACE ctrl: DCOMPEN
+ A1 step values: -13 (X), 1 (Y)
+ A2 step values: -4 (X), 0 (Y) [mask (unused): 00000000 - FFFFFFFF/FFFFFFFF]
+ A1 -> pitch: 4 phrases, depth: 16bpp, z-off: 3, width: 320 (21), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 1 (00), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 147/144, A2 x/y: 2660/0
+
+; M
+
+Blit! (00110000 <- 0010B2A8) count: 12 x 12, A1/2_FLAGS: 000042E2/00000020 [cmd: 09800609]
+ CMD -> src: SRCEN dst: DSTEN misc: a1ctl: UPDA1 UPDA2 mode: ity: z-op: op: LFU_REPLACE ctrl: DCOMPEN
+ A1 step values: -12 (X), 1 (Y)
+ A2 step values: 0 (X), 0 (Y) [mask (unused): 00000000 - FFFFFFFF/FFFFFFFF]
+ A1 -> pitch: 4 phrases, depth: 16bpp, z-off: 3, width: 320 (21), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 1 (00), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 160/144, A2 x/y: 3764/0
+
+; O
+
+Blit! (00110000 <- 0010B2A8) count: 12 x 12, A1/2_FLAGS: 000042E2/00000020 [cmd: 09800609]
+ CMD -> src: SRCEN dst: DSTEN misc: a1ctl: UPDA1 UPDA2 mode: ity: z-op: op: LFU_REPLACE ctrl: DCOMPEN
+ A1 step values: -15 (X), 1 (Y)
+ A2 step values: -4 (X), 0 (Y) [mask (unused): 00000000 - FFFFFFFF/FFFFFFFF]
+ A1 -> pitch: 4 phrases, depth: 16bpp, z-off: 3, width: 320 (21), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 1 (00), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 173/144, A2 x/y: 4052/0
+
+*/
+//extern int op_start_log;
+if (blit_start_log)
+{
+ char * ctrlStr[4] = { "XADDPHR\0", "XADDPIX\0", "XADD0\0", "XADDINC\0" };
+ char * bppStr[8] = { "1bpp\0", "2bpp\0", "4bpp\0", "8bpp\0", "16bpp\0", "32bpp\0", "???\0", "!!!\0" };
+ char * opStr[16] = { "LFU_CLEAR", "LFU_NSAND", "LFU_NSAD", "LFU_NOTS", "LFU_SAND", "LFU_NOTD", "LFU_N_SXORD", "LFU_NSORND",
+ "LFU_SAD", "LFU_XOR", "LFU_D", "LFU_NSORD", "LFU_REPLACE", "LFU_SORND", "LFU_SORD", "LFU_ONE" };
+ uint32 /*src = cmd & 0x07, dst = (cmd >> 3) & 0x07, misc = (cmd >> 6) & 0x03,
+ a1ctl = (cmd >> 8) & 0x07,*/ mode = (cmd >> 11) & 0x07/*, ity = (cmd >> 14) & 0x0F,
+ zop = (cmd >> 18) & 0x07, op = (cmd >> 21) & 0x0F, ctrl = (cmd >> 25) & 0x3F*/;
+ uint32 a1f = REG(A1_FLAGS), a2f = REG(A2_FLAGS);
+ uint32 p1 = a1f & 0x07, p2 = a2f & 0x07,
+ d1 = (a1f >> 3) & 0x07, d2 = (a2f >> 3) & 0x07,
+ zo1 = (a1f >> 6) & 0x07, zo2 = (a2f >> 6) & 0x07,
+ w1 = (a1f >> 9) & 0x3F, w2 = (a2f >> 9) & 0x3F,
+ ac1 = (a1f >> 16) & 0x1F, ac2 = (a2f >> 16) & 0x1F;
+ uint32 iw1 = ((0x04 | (w1 & 0x03)) << ((w1 & 0x3C) >> 2)) >> 2;
+ uint32 iw2 = ((0x04 | (w2 & 0x03)) << ((w2 & 0x3C) >> 2)) >> 2;
+ WriteLog("Blit! (%08X %s %08X) count: %d x %d, A1/2_FLAGS: %08X/%08X [cmd: %08X]\n", a1_addr, (mode&0x01 ? "->" : "<-"), a2_addr, n_pixels, n_lines, a1f, a2f, cmd);
+// WriteLog(" CMD -> src: %d, dst: %d, misc: %d, a1ctl: %d, mode: %d, ity: %1X, z-op: %d, op: %1X, ctrl: %02X\n", src, dst, misc, a1ctl, mode, ity, zop, op, ctrl);
+
+ WriteLog(" CMD -> src: %s%s%s ", (cmd & 0x0001 ? "SRCEN " : ""), (cmd & 0x0002 ? "SRCENZ " : ""), (cmd & 0x0004 ? "SRCENX" : ""));
+ WriteLog("dst: %s%s%s ", (cmd & 0x0008 ? "DSTEN " : ""), (cmd & 0x0010 ? "DSTENZ " : ""), (cmd & 0x0020 ? "DSTWRZ" : ""));
+ WriteLog("misc: %s%s ", (cmd & 0x0040 ? "CLIP_A1 " : ""), (cmd & 0x0080 ? "???" : ""));
+ WriteLog("a1ctl: %s%s%s ", (cmd & 0x0100 ? "UPDA1F " : ""), (cmd & 0x0200 ? "UPDA1 " : ""), (cmd & 0x0400 ? "UPDA2" : ""));
+ WriteLog("mode: %s%s%s ", (cmd & 0x0800 ? "DSTA2 " : ""), (cmd & 0x1000 ? "GOURD " : ""), (cmd & 0x2000 ? "GOURZ" : ""));
+ WriteLog("ity: %s%s%s%s ", (cmd & 0x4000 ? "TOPBEN " : ""), (cmd & 0x8000 ? "TOPNEN " : ""), (cmd & 0x00010000 ? "PATDSEL" : ""), (cmd & 0x00020000 ? "ADDDSEL" : ""));
+ WriteLog("z-op: %s%s%s ", (cmd & 0x00040000 ? "ZMODELT " : ""), (cmd & 0x00080000 ? "ZMODEEQ " : ""), (cmd & 0x00100000 ? "ZMODEGT" : ""));
+ WriteLog("op: %s ", opStr[(cmd >> 21) & 0x0F]);
+ WriteLog("ctrl: %s%s%s%s%s%s\n", (cmd & 0x02000000 ? "CMPDST " : ""), (cmd & 0x04000000 ? "BCOMPEN " : ""), (cmd & 0x08000000 ? "DCOMPEN " : ""), (cmd & 0x10000000 ? "BKGWREN " : ""), (cmd & 0x20000000 ? "BUSHI " : ""), (cmd & 0x40000000 ? "SRCSHADE" : ""));
+
+ if (UPDA1)
+ WriteLog(" A1 step values: %d (X), %d (Y)\n", a1_step_x >> 16, a1_step_y >> 16);
+
+ if (UPDA2)
+ WriteLog(" A2 step values: %d (X), %d (Y) [mask (%sused): %08X - %08X/%08X]\n", a2_step_x >> 16, a2_step_y >> 16, (a2f & 0x8000 ? "" : "un"), REG(A2_MASK), a2_mask_x, a2_mask_y);
+
+ WriteLog(" A1 -> pitch: %d phrases, depth: %s, z-off: %d, width: %d (%02X), addctl: %s %s %s %s\n", 1 << p1, bppStr[d1], zo1, iw1, w1, ctrlStr[ac1&0x03], (ac1&0x04 ? "YADD1" : "YADD0"), (ac1&0x08 ? "XSIGNSUB" : "XSIGNADD"), (ac1&0x10 ? "YSIGNSUB" : "YSIGNADD"));
+ WriteLog(" A2 -> pitch: %d phrases, depth: %s, z-off: %d, width: %d (%02X), addctl: %s %s %s %s\n", 1 << p2, bppStr[d2], zo2, iw2, w2, ctrlStr[ac2&0x03], (ac2&0x04 ? "YADD1" : "YADD0"), (ac2&0x08 ? "XSIGNSUB" : "XSIGNADD"), (ac2&0x10 ? "YSIGNSUB" : "YSIGNADD"));
+ WriteLog(" A1 x/y: %d/%d, A2 x/y: %d/%d Pattern: %08X%08X SRCDATA: %08X%08X\n", a1_x >> 16, a1_y >> 16, a2_x >> 16, a2_y >> 16, REG(PATTERNDATA), REG(PATTERNDATA + 4), REG(SRCDATA), REG(SRCDATA + 4));
+// blit_start_log = 0;
+// op_start_log = 1;
+}
+
+ blitter_working = 1;
+//#ifndef USE_GENERIC_BLITTER
+// if (!blitter_execute_cached_code(blitter_in_cache(cmd)))
+//#endif
+ blitter_generic(cmd);
+
+/*if (blit_start_log)
+{
+ if (a1_addr == 0xF03000 && a2_addr == 0x004D58)
+ {
+ WriteLog("\nBytes at 004D58:\n");
+ for(int i=0x004D58; i<0x004D58+(10*127*4); i++)
+ WriteLog("%02X ", JaguarReadByte(i));
+ WriteLog("\nBytes at F03000:\n");
+ for(int i=0xF03000; i<0xF03000+(6*127*4); i++)
+ WriteLog("%02X ", JaguarReadByte(i));
+ WriteLog("\n\n");
+ }
+}//*/
+
+ blitter_working = 0;
+}
+#endif // of the #if 0 near the top...
+/*******************************************************************************
+********************** STUFF CUT ABOVE THIS LINE! ******************************
+*******************************************************************************/
+
+void BlitterInit(void)
+{
+ BlitterReset();
+}
+
+void BlitterReset(void)
+{
+ memset(blitter_ram, 0x00, 0xA0);
+}
+
+void BlitterDone(void)
+{
+ WriteLog("BLIT: Done.\n");
+}
+
+uint8 BlitterReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ offset &= 0xFF;
+
+ // status register
+//This isn't cycle accurate--how to fix? !!! FIX !!!
+//Probably have to do some multi-threaded implementation or at least a reentrant safe implementation...
+ if (offset == (0x38 + 3))
+ return 0x01; // always idle
+
+// CHECK HERE ONCE THIS FIX HAS BEEN TESTED: [ ]
+//Fix for AvP:
+ if (offset >= 0x04 && offset <= 0x07)
+//This is it. I wonder if it just ignores the lower three bits?
+//No, this is a documented Jaguar I bug. It also bites the read at $F02230 as well...
+ return blitter_ram[offset + 0x08]; // A1_PIXEL ($F0220C) read at $F02204
+
+ if (offset >= 0x2C && offset <= 0x2F)
+ return blitter_ram[offset + 0x04]; // A2_PIXEL ($F02230) read at $F0222C
+
+ return blitter_ram[offset];
+}
+
+//Crappy!
+uint16 BlitterReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ return ((uint16)BlitterReadByte(offset, who) << 8) | (uint16)BlitterReadByte(offset+1, who);
+}
+
+//Crappy!
+uint32 BlitterReadLong(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ return (BlitterReadWord(offset, who) << 16) | BlitterReadWord(offset+2, who);
+}
+
+void BlitterWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
+{
+/*if (offset & 0xFF == 0x7B)
+ WriteLog("--> Wrote to B_STOP: value -> %02X\n", data);*/
+ offset &= 0xFF;
+/*if ((offset >= PATTERNDATA) && (offset < PATTERNDATA + 8))
+{
+ printf("--> %s wrote %02X to byte %u of PATTERNDATA...\n", whoName[who], data, offset - PATTERNDATA);
+ fflush(stdout);
+}//*/
+
+ // This handles writes to INTENSITY0-3 by also writing them to their proper places in
+ // PATTERNDATA & SOURCEDATA (should do the same for the Z registers! !!! FIX !!! [DONE])
+ if ((offset >= 0x7C) && (offset <= 0x9B))
+ {
+ switch (offset)
+ {
+ // INTENSITY registers 0-3
+ case 0x7C: break;
+ case 0x7D: blitter_ram[PATTERNDATA + 7] = data; break;
+ case 0x7E: blitter_ram[SRCDATA + 6] = data; break;
+ case 0x7F: blitter_ram[SRCDATA + 7] = data; break;
+
+ case 0x80: break;
+ case 0x81: blitter_ram[PATTERNDATA + 5] = data; break;
+ case 0x82: blitter_ram[SRCDATA + 4] = data; break;
+ case 0x83: blitter_ram[SRCDATA + 5] = data; break;
+
+ case 0x84: break;
+ case 0x85: blitter_ram[PATTERNDATA + 3] = data; break;
+ case 0x86: blitter_ram[SRCDATA + 2] = data; break;
+ case 0x87: blitter_ram[SRCDATA + 3] = data; break;
+
+ case 0x88: break;
+ case 0x89: blitter_ram[PATTERNDATA + 1] = data; break;
+ case 0x8A: blitter_ram[SRCDATA + 0] = data; break;
+ case 0x8B: blitter_ram[SRCDATA + 1] = data; break;
+
+
+ // Z registers 0-3
+ case 0x8C: blitter_ram[SRCZINT + 6] = data; break;
+ case 0x8D: blitter_ram[SRCZINT + 7] = data; break;
+ case 0x8E: blitter_ram[SRCZFRAC + 6] = data; break;
+ case 0x8F: blitter_ram[SRCZFRAC + 7] = data; break;
+
+ case 0x90: blitter_ram[SRCZINT + 4] = data; break;
+ case 0x91: blitter_ram[SRCZINT + 5] = data; break;
+ case 0x92: blitter_ram[SRCZFRAC + 4] = data; break;
+ case 0x93: blitter_ram[SRCZFRAC + 5] = data; break;
+
+ case 0x94: blitter_ram[SRCZINT + 2] = data; break;
+ case 0x95: blitter_ram[SRCZINT + 3] = data; break;
+ case 0x96: blitter_ram[SRCZFRAC + 2] = data; break;
+ case 0x97: blitter_ram[SRCZFRAC + 3] = data; break;
+
+ case 0x98: blitter_ram[SRCZINT + 0] = data; break;
+ case 0x99: blitter_ram[SRCZINT + 1] = data; break;
+ case 0x9A: blitter_ram[SRCZFRAC + 0] = data; break;
+ case 0x9B: blitter_ram[SRCZFRAC + 1] = data; break;
+ }
+ }
+
+ // It looks weird, but this is how the 64 bit registers are actually handled...!
+
+ else if ((offset >= SRCDATA + 0) && (offset <= SRCDATA + 3)
+ || (offset >= DSTDATA + 0) && (offset <= DSTDATA + 3)
+ || (offset >= DSTZ + 0) && (offset <= DSTZ + 3)
+ || (offset >= SRCZINT + 0) && (offset <= SRCZINT + 3)
+ || (offset >= SRCZFRAC + 0) && (offset <= SRCZFRAC + 3)
+ || (offset >= PATTERNDATA + 0) && (offset <= PATTERNDATA + 3))
+ {
+ blitter_ram[offset + 4] = data;
+ }
+ else if ((offset >= SRCDATA + 4) && (offset <= SRCDATA + 7)
+ || (offset >= DSTDATA + 4) && (offset <= DSTDATA + 7)
+ || (offset >= DSTZ + 4) && (offset <= DSTZ + 7)
+ || (offset >= SRCZINT + 4) && (offset <= SRCZINT + 7)
+ || (offset >= SRCZFRAC + 4) && (offset <= SRCZFRAC + 7)
+ || (offset >= PATTERNDATA + 4) && (offset <= PATTERNDATA + 7))
+ {
+ blitter_ram[offset - 4] = data;
+ }
+ else
+ blitter_ram[offset] = data;
+}
+
+void BlitterWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
+{
+/*if (((offset & 0xFF) >= PATTERNDATA) && ((offset & 0xFF) < PATTERNDATA + 8))
+{
+ printf("----> %s wrote %04X to byte %u of PATTERNDATA...\n", whoName[who], data, offset - (0xF02200 + PATTERNDATA));
+ fflush(stdout);
+}*/
+//#if 1
+/* if (offset & 0xFF == A1_PIXEL && data == 14368)
+ {
+ WriteLog("\n1\nA1_PIXEL written by %s (%u)...\n\n\n", whoName[who], data);
+extern bool doGPUDis;
+doGPUDis = true;
+ }
+ if ((offset & 0xFF) == (A1_PIXEL + 2) && data == 14368)
+ {
+ WriteLog("\n2\nA1_PIXEL written by %s (%u)...\n\n\n", whoName[who], data);
+extern bool doGPUDis;
+doGPUDis = true;
+ }//*/
+//#endif
+
+ BlitterWriteByte(offset + 0, data >> 8, who);
+ BlitterWriteByte(offset + 1, data & 0xFF, who);
+
+ if ((offset & 0xFF) == 0x3A)
+ // I.e., the second write of 32-bit value--not convinced this is the best way to do this!
+ // But then again, according to the Jaguar docs, this is correct...!
+/*extern int blit_start_log;
+extern bool doGPUDis;
+if (blit_start_log)
+{
+ WriteLog("BLIT: Blitter started by %s...\n", whoName[who]);
+ doGPUDis = true;
+}//*/
+#ifdef USE_ORIGINAL_BLITTER
+ blitter_blit(GET32(blitter_ram, 0x38));
+#endif
+#ifdef USE_MIDSUMMER_BLITTER
+ BlitterMidsummer(GET32(blitter_ram, 0x38));
+#endif
+#ifdef USE_MIDSUMMER_BLITTER_MKII
+ BlitterMidsummer2();
+#endif
+}
+//F02278,9,A,B
+
+void BlitterWriteLong(uint32 offset, uint32 data, uint32 who/*=UNKNOWN*/)
+{
+/*if (((offset & 0xFF) >= PATTERNDATA) && ((offset & 0xFF) < PATTERNDATA + 8))
+{
+ printf("------> %s wrote %08X to byte %u of PATTERNDATA...\n", whoName[who], data, offset - (0xF02200 + PATTERNDATA));
+ fflush(stdout);
+}//*/
+//#if 1
+/* if ((offset & 0xFF) == A1_PIXEL && (data & 0xFFFF) == 14368)
+ {
+ WriteLog("\n3\nA1_PIXEL written by %s (%u)...\n\n\n", whoName[who], data);
+extern bool doGPUDis;
+doGPUDis = true;
+ }//*/
+//#endif
+
+ BlitterWriteWord(offset + 0, data >> 16, who);
+ BlitterWriteWord(offset + 2, data & 0xFFFF, who);
+}
+
+void LogBlit(void)
+{
+ const char * opStr[16] = { "LFU_CLEAR", "LFU_NSAND", "LFU_NSAD", "LFU_NOTS", "LFU_SAND", "LFU_NOTD", "LFU_N_SXORD", "LFU_NSORND",
+ "LFU_SAD", "LFU_XOR", "LFU_D", "LFU_NSORD", "LFU_REPLACE", "LFU_SORND", "LFU_SORD", "LFU_ONE" };
+ uint32 cmd = GET32(blitter_ram, 0x38);
+ uint32 m = (REG(A1_FLAGS) >> 9) & 0x03, e = (REG(A1_FLAGS) >> 11) & 0x0F;
+ uint32 a1_width = ((0x04 | m) << e) >> 2;
+ m = (REG(A2_FLAGS) >> 9) & 0x03, e = (REG(A2_FLAGS) >> 11) & 0x0F;
+ uint32 a2_width = ((0x04 | m) << e) >> 2;
+
+ WriteLog("Blit!\n");
+ WriteLog(" COMMAND = %08X\n", cmd);
+ WriteLog(" a1_base = %08X\n", REG(A1_BASE));
+ WriteLog(" a1_flags = %08X (%c %c %c %c%c . %c%c%c%c%c%c %c%c%c %c%c%c . %c%c)\n", REG(A1_FLAGS),
+ (REG(A1_FLAGS) & 0x100000 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x080000 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x040000 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x020000 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x010000 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x004000 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x002000 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x001000 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x000800 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x000400 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x000200 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x000100 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x000080 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x000040 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x000020 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x000010 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x000008 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x000002 ? '1' : '0'),
+ (REG(A1_FLAGS) & 0x000001 ? '1' : '0'));
+ WriteLog(" pitch=%u, pixSz=%u, zOff=%u, width=%u, xCtrl=%u\n",
+ REG(A1_FLAGS) & 0x00003, (REG(A1_FLAGS) & 0x00038) >> 3,
+ (REG(A1_FLAGS) & 0x001C0) >> 6, a1_width, (REG(A1_FLAGS) & 0x30000) >> 16);
+ WriteLog(" a1_clip = %u, %u (%08X)\n", GET16(blitter_ram, A1_CLIP + 2), GET16(blitter_ram, A1_CLIP + 0), GET32(blitter_ram, A1_CLIP));
+ WriteLog(" a1_pixel = %d, %d (%08X)\n", (int16)GET16(blitter_ram, A1_PIXEL + 2), (int16)GET16(blitter_ram, A1_PIXEL + 0), GET32(blitter_ram, A1_PIXEL));
+ WriteLog(" a1_step = %d, %d (%08X)\n", (int16)GET16(blitter_ram, A1_STEP + 2), (int16)GET16(blitter_ram, A1_STEP + 0), GET32(blitter_ram, A1_STEP));
+ WriteLog(" a1_fstep = %u, %u (%08X)\n", GET16(blitter_ram, A1_FSTEP + 2), GET16(blitter_ram, A1_FSTEP + 0), GET32(blitter_ram, A1_FSTEP));
+ WriteLog(" a1_fpixel= %u, %u (%08X)\n", GET16(blitter_ram, A1_FPIXEL + 2), GET16(blitter_ram, A1_FPIXEL + 0), GET32(blitter_ram, A1_FPIXEL));
+ WriteLog(" a1_inc = %d, %d (%08X)\n", (int16)GET16(blitter_ram, A1_INC + 2), (int16)GET16(blitter_ram, A1_INC + 0), GET32(blitter_ram, A1_INC));
+ WriteLog(" a1_finc = %u, %u (%08X)\n", GET16(blitter_ram, A1_FINC + 2), GET16(blitter_ram, A1_FINC + 0), GET32(blitter_ram, A1_FINC));
+
+ WriteLog(" a2_base = %08X\n", REG(A2_BASE));
+ WriteLog(" a2_flags = %08X (%c %c %c %c%c %c %c%c%c%c%c%c %c%c%c %c%c%c . %c%c)\n", REG(A2_FLAGS),
+ (REG(A2_FLAGS) & 0x100000 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x080000 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x040000 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x020000 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x010000 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x008000 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x004000 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x002000 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x001000 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x000800 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x000400 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x000200 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x000100 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x000080 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x000040 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x000020 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x000010 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x000008 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x000002 ? '1' : '0'),
+ (REG(A2_FLAGS) & 0x000001 ? '1' : '0'));
+ WriteLog(" pitch=%u, pixSz=%u, zOff=%u, width=%u, xCtrl=%u\n",
+ REG(A2_FLAGS) & 0x00003, (REG(A2_FLAGS) & 0x00038) >> 3,
+ (REG(A2_FLAGS) & 0x001C0) >> 6, a2_width, (REG(A2_FLAGS) & 0x30000) >> 16);
+ WriteLog(" a2_mask = %u, %u (%08X)\n", GET16(blitter_ram, A2_MASK + 2), GET16(blitter_ram, A2_MASK + 0), GET32(blitter_ram, A2_MASK));
+ WriteLog(" a2_pixel = %d, %d (%08X)\n", (int16)GET16(blitter_ram, A2_PIXEL + 2), (int16)GET16(blitter_ram, A2_PIXEL + 0), GET32(blitter_ram, A2_PIXEL));
+ WriteLog(" a2_step = %d, %d (%08X)\n", (int16)GET16(blitter_ram, A2_STEP + 2), (int16)GET16(blitter_ram, A2_STEP + 0), GET32(blitter_ram, A2_STEP));
+
+ WriteLog(" count = %d x %d\n", GET16(blitter_ram, PIXLINECOUNTER + 2), GET16(blitter_ram, PIXLINECOUNTER));
+
+ WriteLog(" SRCEN = %s\n", (SRCEN ? "1" : "0"));
+ WriteLog(" SRCENZ = %s\n", (SRCENZ ? "1" : "0"));
+ WriteLog(" SRCENX = %s\n", (SRCENX ? "1" : "0"));
+ WriteLog(" DSTEN = %s\n", (DSTEN ? "1" : "0"));
+ WriteLog(" DSTENZ = %s\n", (DSTENZ ? "1" : "0"));
+ WriteLog(" DSTWRZ = %s\n", (DSTWRZ ? "1" : "0"));
+ WriteLog(" CLIPA1 = %s\n", (CLIPA1 ? "1" : "0"));
+ WriteLog(" UPDA1F = %s\n", (UPDA1F ? "1" : "0"));
+ WriteLog(" UPDA1 = %s\n", (UPDA1 ? "1" : "0"));
+ WriteLog(" UPDA2 = %s\n", (UPDA2 ? "1" : "0"));
+ WriteLog(" DSTA2 = %s\n", (DSTA2 ? "1" : "0"));
+ WriteLog(" ZOP = %s %s %s\n", (Z_OP_INF ? "<" : ""), (Z_OP_EQU ? "=" : ""), (Z_OP_SUP ? ">" : ""));
+ WriteLog("--LFUFUNC = %s\n", opStr[(cmd >> 21) & 0x0F]);
+ WriteLog("| PATDSEL = %s (PD=%08X%08X)\n", (PATDSEL ? "1" : "0"), REG(PATTERNDATA), REG(PATTERNDATA + 4));
+ WriteLog("--ADDDSEL = %s\n", (ADDDSEL ? "1" : "0"));
+ WriteLog(" CMPDST = %s\n", (CMPDST ? "1" : "0"));
+ WriteLog(" BCOMPEN = %s\n", (BCOMPEN ? "1" : "0"));
+ WriteLog(" DCOMPEN = %s\n", (DCOMPEN ? "1" : "0"));
+ WriteLog(" TOPBEN = %s\n", (TOPBEN ? "1" : "0"));
+ WriteLog(" TOPNEN = %s\n", (TOPNEN ? "1" : "0"));
+ WriteLog(" BKGWREN = %s\n", (BKGWREN ? "1" : "0"));
+ WriteLog(" GOURD = %s (II=%08X, SD=%08X%08X)\n", (GOURD ? "1" : "0"), REG(INTENSITYINC), REG(SRCDATA), REG(SRCDATA + 4));
+ WriteLog(" GOURZ = %s (ZI=%08X, ZD=%08X%08X, SZ1=%08X%08X, SZ2=%08X%08X)\n", (GOURZ ? "1" : "0"), REG(ZINC), REG(DSTZ), REG(DSTZ + 4),
+ REG(SRCZINT), REG(SRCZINT + 4), REG(SRCZFRAC), REG(SRCZFRAC + 4));
+ WriteLog(" SRCSHADE = %s\n", (SRCSHADE ? "1" : "0"));
+}
+
+
+#ifdef USE_MIDSUMMER_BLITTER
+//
+// Here's an attempt to write a blitter that conforms to the Midsummer specs--since
+// it's supposedly backwards compatible, it should work well...
+//
+//#define LOG_BLITTER_MEMORY_ACCESSES
+
+#define DATINIT (false)
+#define TXTEXT (false)
+#define POLYGON (false)
+
+void BlitterMidsummer(uint32 cmd)
+{
+uint32 outer_loop, inner_loop, a1_addr, a2_addr;
+int32 a1_x, a1_y, a2_x, a2_y, a1_width, a2_width;
+uint8 a1_phrase_mode, a2_phrase_mode;
+
+ a1_addr = REG(A1_BASE) & 0xFFFFFFF8;
+ a2_addr = REG(A2_BASE) & 0xFFFFFFF8;
+ a1_x = (REG(A1_PIXEL) << 16) | (REG(A1_FPIXEL) & 0xFFFF);
+ a1_y = (REG(A1_PIXEL) & 0xFFFF0000) | (REG(A1_FPIXEL) >> 16);
+ uint32 m = (REG(A1_FLAGS) >> 9) & 0x03, e = (REG(A1_FLAGS) >> 11) & 0x0F;
+ a1_width = ((0x04 | m) << e) >> 2;//*/
+ a2_x = (REG(A2_PIXEL) & 0x0000FFFF) << 16;
+ a2_y = (REG(A2_PIXEL) & 0xFFFF0000);
+ m = (REG(A2_FLAGS) >> 9) & 0x03, e = (REG(A2_FLAGS) >> 11) & 0x0F;
+ a2_width = ((0x04 | m) << e) >> 2;//*/
+
+ a1_phrase_mode = a2_phrase_mode = 0;
+
+ if ((blitter_ram[A1_FLAGS + 1] & 0x03) == 0)
+ a1_phrase_mode = 1;
+
+ if ((blitter_ram[A2_FLAGS + 1] & 0x03) == 0)
+ a2_phrase_mode = 1;
+
+#define INNER0 (inner_loop == 0)
+#define OUTER0 (outer_loop == 0)
+
+// $01800005 has SRCENX, may have to investigate further...
+// $00011008 has GOURD & DSTEN.
+// $41802F41 has SRCSHADE, CLIPA1
+/*bool logBlit = false;
+if (cmd != 0x00010200 && cmd != 0x01800001 && cmd != 0x01800005
+ && cmd != 0x00011008 && cmd !=0x41802F41)
+{
+ logBlit = true;
+ LogBlit();
+}//*/
+
+ uint64 srcData = GET64(blitter_ram, SRCDATA), srcXtraData,
+ dstData = GET64(blitter_ram, DSTDATA), writeData;
+ uint32 srcAddr, dstAddr;
+ uint8 bitCount, a1PixelSize, a2PixelSize;
+
+ // JTRM says phrase mode only works for 8BPP or higher, so let's try this....
+ uint32 phraseOffset[8] = { 8, 8, 8, 8, 4, 2, 0, 0 };
+ uint8 pixelShift[8] = { 3, 2, 1, 0, 1, 2, 0, 0 };
+
+ a1PixelSize = (blitter_ram[A1_FLAGS + 3] >> 3) & 0x07;
+ a2PixelSize = (blitter_ram[A2_FLAGS + 3] >> 3) & 0x07;
+
+ outer_loop = GET16(blitter_ram, PIXLINECOUNTER + 0);
+
+ if (outer_loop == 0)
+ outer_loop = 0x10000;
+
+ // We just list the states here and jump from state to state in order to
+ // keep things somewhat clear. Optimization/cleanups later.
+
+//idle: // Blitter is idle, and will not perform any bus activity
+/*
+idle Blitter is off the bus, and no activity takes place.
+if GO if DATINIT goto init_if
+ else goto inner
+*/
+ if (DATINIT)
+ goto init_if;
+ else
+ goto inner;
+
+/*
+inner Inner loop is active, read and write cycles are performed
+*/
+inner: // Run inner loop state machine (asserts step from its idle state)
+ inner_loop = GET16(blitter_ram, PIXLINECOUNTER + 2);
+
+ if (inner_loop == 0)
+ inner_loop = 0x10000;
+
+/*
+------------------------------
+idle: Inactive, blitter is idle or passing round outer loop
+idle Another state in the outer loop is active. No bus transfers are performed.
+if STEP
+ if SRCENX goto sreadx
+ else if TXTEXT goto txtread
+ else if SRCEN goto sread
+ else if DSTEN goto dread
+ else if DSTENZ goto dzread
+ else goto dwrite
+*/
+ if (SRCENX)
+ goto sreadx;
+ else if (TXTEXT)
+ goto txtread;
+ else if (SRCEN)
+ goto sread;
+ else if (DSTEN)
+ goto dread;
+ else if (DSTENZ)
+ goto dzread;
+ else
+ goto dwrite;
+
+/*
+sreadx Extra source data read at the start of an inner loop pass.
+if STEP
+ if SRCENZ goto szreadx
+ else if TXTEXT goto txtread
+ else if SRCEN goto sread
+ else if DSTEN goto dread
+ else if DSTENZ goto dzread
+ else goto dwrite
+*/
+sreadx: // Extra source data read
+ if (SRCENZ)
+ goto szreadx;
+ else if (TXTEXT)
+ goto txtread;
+ else if (SRCEN)
+ goto sread;
+ else if (DSTEN)
+ goto dread;
+ else if (DSTENZ)
+ goto dzread;
+ else
+ goto dwrite;
+
+/*
+szreadx Extra source Z read as the start of an inner loop pass.
+if STEP
+ if TXTEXT goto txtread
+ else goto sread
+*/
+szreadx: // Extra source Z read
+ if (TXTEXT)
+ goto txtread;
+ else
+ goto sread;
+
+/*
+txtread Read texture data from external memory. This state is only used for external texture.
+ TEXTEXT is the condition TEXTMODE=1.
+if STEP
+ if SRCEN goto sread
+ else if DSTEN goto dread
+ else if DSTENZ goto dzread
+ else goto dwrite
+*/
+txtread: // Read external texture data
+ if (SRCEN)
+ goto sread;
+ else if (DSTEN)
+ goto dread;
+ else if (DSTENZ)
+ goto dzread;
+ else
+ goto dwrite;
+
+/*
+sread Source data read.
+if STEP
+ if SRCENZ goto szread
+ else if DSTEN goto dread
+ else if DSTENZ goto dzread
+ else goto dwrite
+*/
+sread: // Source data read
+//The JTRM doesn't really specify the internal structure of the source data read, but I would
+//imagine that if it's in phrase mode that it starts by reading the phrase that the window is
+//pointing at. Likewise, the pixel (if in BPP 1, 2 & 4, chopped) otherwise.. It probably still
+//transfers an entire phrase even in pixel mode.
+//Odd thought: Does it expand, e.g., 1 BPP pixels into 32 BPP internally? Hmm...
+//No.
+/*
+ a1_addr = REG(A1_BASE) & 0xFFFFFFF8;
+ a2_addr = REG(A2_BASE) & 0xFFFFFFF8;
+ a1_zoffs = (REG(A1_FLAGS) >> 6) & 7;
+ a2_zoffs = (REG(A2_FLAGS) >> 6) & 7;
+ xadd_a1_control = (REG(A1_FLAGS) >> 16) & 0x03;
+ xadd_a2_control = (REG(A2_FLAGS) >> 16) & 0x03;
+ a1_pitch = pitchValue[(REG(A1_FLAGS) & 0x03)];
+ a2_pitch = pitchValue[(REG(A2_FLAGS) & 0x03)];
+ n_pixels = REG(PIXLINECOUNTER) & 0xFFFF;
+ n_lines = (REG(PIXLINECOUNTER) >> 16) & 0xFFFF;
+ a1_x = (REG(A1_PIXEL) << 16) | (REG(A1_FPIXEL) & 0xFFFF);
+ a1_y = (REG(A1_PIXEL) & 0xFFFF0000) | (REG(A1_FPIXEL) >> 16);
+ a2_psize = 1 << ((REG(A2_FLAGS) >> 3) & 0x07);
+ a1_psize = 1 << ((REG(A1_FLAGS) >> 3) & 0x07);
+ a1_phrase_mode = 0;
+ a2_phrase_mode = 0;
+ a1_width = ((0x04 | m) << e) >> 2;
+ a2_width = ((0x04 | m) << e) >> 2;
+
+ // write values back to registers
+ WREG(A1_PIXEL, (a1_y & 0xFFFF0000) | ((a1_x >> 16) & 0xFFFF));
+ WREG(A1_FPIXEL, (a1_y << 16) | (a1_x & 0xFFFF));
+ WREG(A2_PIXEL, (a2_y & 0xFFFF0000) | ((a2_x >> 16) & 0xFFFF));
+*/
+ // Calculate the address to be read...
+
+//Need to fix phrase mode calcs here, since they should *step* by eight, not mulitply.
+//Also, need to fix various differing BPP modes here, since offset won't be correct except
+//for 8BPP. !!! FIX !!!
+ srcAddr = (DSTA2 ? a1_addr : a2_addr);
+
+/* if ((DSTA2 ? a1_phrase_mode : a2_phrase_mode) == 1)
+ {
+ srcAddr += (((DSTA2 ? a1_x : a2_x) >> 16)
+ + (((DSTA2 ? a1_y : a2_y) >> 16) * (DSTA2 ? a1_width : a2_width)));
+ }
+ else*/
+ {
+// uint32 pixAddr = ((DSTA2 ? a1_x : a2_x) >> 16)
+// + (((DSTA2 ? a1_y : a2_y) >> 16) * (DSTA2 ? a1_width : a2_width));
+ int32 pixAddr = (int16)((DSTA2 ? a1_x : a2_x) >> 16)
+ + ((int16)((DSTA2 ? a1_y : a2_y) >> 16) * (DSTA2 ? a1_width : a2_width));
+
+ if ((DSTA2 ? a1PixelSize : a2PixelSize) < 3)
+ pixAddr >>= pixelShift[(DSTA2 ? a1PixelSize : a2PixelSize)];
+ else if ((DSTA2 ? a1PixelSize : a2PixelSize) > 3)
+ pixAddr <<= pixelShift[(DSTA2 ? a1PixelSize : a2PixelSize)];
+
+ srcAddr += pixAddr;
+ }
+
+ // And read it!
+
+ if ((DSTA2 ? a1_phrase_mode : a2_phrase_mode) == 1)
+ {
+ srcData = ((uint64)JaguarReadLong(srcAddr, BLITTER) << 32)
+ | (uint64)JaguarReadLong(srcAddr + 4, BLITTER);
+ }
+ else
+ {
+//1,2,&4BPP are wrong here... !!! FIX !!!
+ if ((DSTA2 ? a1PixelSize : a2PixelSize) == 0) // 1 BPP
+ srcData = JaguarReadByte(srcAddr, BLITTER);
+ if ((DSTA2 ? a1PixelSize : a2PixelSize) == 1) // 2 BPP
+ srcData = JaguarReadByte(srcAddr, BLITTER);
+ if ((DSTA2 ? a1PixelSize : a2PixelSize) == 2) // 4 BPP
+ srcData = JaguarReadByte(srcAddr, BLITTER);
+ if ((DSTA2 ? a1PixelSize : a2PixelSize) == 3) // 8 BPP
+ srcData = JaguarReadByte(srcAddr, BLITTER);
+ if ((DSTA2 ? a1PixelSize : a2PixelSize) == 4) // 16 BPP
+ srcData = JaguarReadWord(srcAddr, BLITTER);
+ if ((DSTA2 ? a1PixelSize : a2PixelSize) == 5) // 32 BPP
+ srcData = JaguarReadLong(srcAddr, BLITTER);
+ }
+
+#ifdef LOG_BLITTER_MEMORY_ACCESSES
+if (logBlit)
+ WriteLog("BLITTER: srcAddr=%08X, srcData=%08X %08X\n", srcAddr, (uint32)(srcData >> 32), (uint32)(srcData & 0xFFFFFFFF));
+#endif
+
+ if (SRCENZ)
+ goto szread;
+ else if (DSTEN)
+ goto dread;
+ else if (DSTENZ)
+ goto dzread;
+ else
+ goto dwrite;
+
+szread: // Source Z read
+/*
+szread Source Z read.
+if STEP
+ if DSTEN goto dread
+ else if DSTENZ goto dzread
+ else goto dwrite
+*/
+ if (DSTEN)
+ goto dread;
+ else if (DSTENZ)
+ goto dzread;
+ else
+ goto dwrite;
+
+dread: // Destination data read
+/*
+dread Destination data read.
+if STEP
+ if DSTENZ goto dzread
+ else goto dwrite
+*/
+ // Calculate the destination address to be read...
+
+//Need to fix phrase mode calcs here, since they should *step* by eight, not mulitply.
+//Also, need to fix various differing BPP modes here, since offset won't be correct except
+//for 8BPP. !!! FIX !!!
+ dstAddr = (DSTA2 ? a2_addr : a1_addr);
+
+ {
+// uint32 pixAddr = ((DSTA2 ? a2_x : a1_x) >> 16)
+// + (((DSTA2 ? a2_y : a1_y) >> 16) * (DSTA2 ? a2_width : a1_width));
+ int32 pixAddr = (int16)((DSTA2 ? a2_x : a1_x) >> 16)
+ + ((int16)((DSTA2 ? a2_y : a1_y) >> 16) * (DSTA2 ? a2_width : a1_width));
+
+ if ((DSTA2 ? a2PixelSize : a1PixelSize) < 3)
+ pixAddr >>= pixelShift[(DSTA2 ? a2PixelSize : a1PixelSize)];
+ else if ((DSTA2 ? a2PixelSize : a1PixelSize) > 3)
+ pixAddr <<= pixelShift[(DSTA2 ? a2PixelSize : a1PixelSize)];
+
+ dstAddr += pixAddr;
+ }
+
+ // And read it!
+
+ if ((DSTA2 ? a2_phrase_mode : a1_phrase_mode) == 1)
+ {
+ dstData = ((uint64)JaguarReadLong(srcAddr, BLITTER) << 32)
+ | (uint64)JaguarReadLong(srcAddr + 4, BLITTER);
+ }
+ else
+ {
+//1,2,&4BPP are wrong here... !!! FIX !!!
+ if ((DSTA2 ? a2PixelSize : a1PixelSize) == 0) // 1 BPP
+ dstData = JaguarReadByte(dstAddr, BLITTER);
+ if ((DSTA2 ? a2PixelSize : a1PixelSize) == 1) // 2 BPP
+ dstData = JaguarReadByte(dstAddr, BLITTER);
+ if ((DSTA2 ? a2PixelSize : a1PixelSize) == 2) // 4 BPP
+ dstData = JaguarReadByte(dstAddr, BLITTER);
+ if ((DSTA2 ? a2PixelSize : a1PixelSize) == 3) // 8 BPP
+ dstData = JaguarReadByte(dstAddr, BLITTER);
+ if ((DSTA2 ? a2PixelSize : a1PixelSize) == 4) // 16 BPP
+ dstData = JaguarReadWord(dstAddr, BLITTER);
+ if ((DSTA2 ? a2PixelSize : a1PixelSize) == 5) // 32 BPP
+ dstData = JaguarReadLong(dstAddr, BLITTER);
+ }
+
+#ifdef LOG_BLITTER_MEMORY_ACCESSES
+if (logBlit)
+ WriteLog("BLITTER (dread): dstAddr=%08X, dstData=%08X %08X\n", dstAddr, (uint32)(dstData >> 32), (uint32)(dstData & 0xFFFFFFFF));
+#endif
+
+ if (DSTENZ)
+ goto dzread;
+ else
+ goto dwrite;
+
+dzread: // Destination Z read
+/*
+dzread Destination Z read.
+if STEP goto dwrite
+*/
+ goto dwrite;
+
+dwrite: // Destination data write
+/*
+dwrite Destination write. Every pass round the inner loop must go through this state..
+if STEP
+ if DSTWRZ goto dzwrite
+ else if INNER0 goto idle
+ else if TXTEXT goto txtread
+ else if SRCEN goto sread
+ else if DSTEN goto dread
+ else if DSTENZ goto dzread
+ else goto dwrite
+*/
+/*
+Blit!
+ a1_base = 00100000
+ a1_pitch = 0
+ a1_psize = 16
+ a1_width = 320
+ a1_xadd = 1.000000 (phrase=0)
+ a1_yadd = 0.000000
+ a1_x = 159.000000
+ a1_y = 1.000000
+ a1_zoffs = 0
+ a2_base = 000095D0
+ a2_pitch = 0
+ a2_psize = 16
+ a2_width = 256
+ a2_xadd = 1.000000 (phrase=1)
+ a2_yadd = 0.000000
+ a2_x = 2.000000
+ a2_y = 0.000000
+ a2_mask_x= 0xFFFFFFFF
+ a2_mask_y= 0xFFFFFFFF
+ a2_zoffs = 0
+ count = 2 x 1
+ COMMAND = 00011008
+ SRCEN = 0
+ DSTEN = 1
+ UPDA1F = 0
+ UPDA1 = 0
+ UPDA2 = 0
+ DSTA2 = 0
+--LFUFUNC = LFU_CLEAR
+| PATDSEL = 1 (PD=77C7 7700 7700 7700)
+--ADDDSEL = 0
+ GOURD = 1 (II=00FC 1A00, SD=FF00 0000 0000 0000)
+*/
+
+//Still need to do CLIPA1 and SRCSHADE and GOURD and GOURZ...
+
+ // Check clipping...
+
+ if (CLIPA1)
+ {
+ uint16 x = a1_x >> 16, y = a1_y >> 16;
+
+ if (x >= GET16(blitter_ram, A1_CLIP + 2) || y >= GET16(blitter_ram, A1_CLIP))
+ goto inhibitWrite;
+ }
+
+ // Figure out what gets written...
+
+ if (PATDSEL)
+ {
+ writeData = GET64(blitter_ram, PATTERNDATA);
+//GOURD works properly only in 16BPP mode...
+//SRCDATA holds the intensity fractions...
+//Does GOURD get calc'ed here or somewhere else???
+//Temporary testing kludge...
+//if (GOURD)
+// writeData >>= 48;
+// writeData = 0xFF88;
+//OK, it's not writing an entire strip of pixels... Why?
+//bad incrementing, that's why!
+ }
+ else if (ADDDSEL)
+ {
+ // Apparently this only works with 16-bit pixels. Not sure if it works in phrase mode either.
+//Also, take TOPBEN & TOPNEN into account here as well...
+ writeData = srcData + dstData;
+ }
+ else // LFUFUNC is the default...
+ {
+ writeData = 0;
+
+ if (LFU_NAN)
+ writeData |= ~srcData & ~dstData;
+ if (LFU_NA)
+ writeData |= ~srcData & dstData;
+ if (LFU_AN)
+ writeData |= srcData & ~dstData;
+ if (LFU_A)
+ writeData |= srcData & dstData;
+ }
+
+ // Calculate the address to be written...
+
+ dstAddr = (DSTA2 ? a2_addr : a1_addr);
+
+/* if ((DSTA2 ? a2_phrase_mode : a1_phrase_mode) == 1)
+ {
+//both of these calculate the wrong address because they don't take into account
+//pixel sizes...
+ dstAddr += ((DSTA2 ? a2_x : a1_x) >> 16)
+ + (((DSTA2 ? a2_y : a1_y) >> 16) * (DSTA2 ? a2_width : a1_width));
+ }
+ else*/
+ {
+/* dstAddr += ((DSTA2 ? a2_x : a1_x) >> 16)
+ + (((DSTA2 ? a2_y : a1_y) >> 16) * (DSTA2 ? a2_width : a1_width));*/
+// uint32 pixAddr = ((DSTA2 ? a2_x : a1_x) >> 16)
+// + (((DSTA2 ? a2_y : a1_y) >> 16) * (DSTA2 ? a2_width : a1_width));
+ int32 pixAddr = (int16)((DSTA2 ? a2_x : a1_x) >> 16)
+ + ((int16)((DSTA2 ? a2_y : a1_y) >> 16) * (DSTA2 ? a2_width : a1_width));
+
+ if ((DSTA2 ? a2PixelSize : a1PixelSize) < 3)
+ pixAddr >>= pixelShift[(DSTA2 ? a2PixelSize : a1PixelSize)];
+ else if ((DSTA2 ? a2PixelSize : a1PixelSize) > 3)
+ pixAddr <<= pixelShift[(DSTA2 ? a2PixelSize : a1PixelSize)];
+
+ dstAddr += pixAddr;
+ }
+
+ // And write it!
+
+ if ((DSTA2 ? a2_phrase_mode : a1_phrase_mode) == 1)
+ {
+ JaguarWriteLong(dstAddr, writeData >> 32, BLITTER);
+ JaguarWriteLong(dstAddr + 4, writeData & 0xFFFFFFFF, BLITTER);
+ }
+ else
+ {
+//1,2,&4BPP are wrong here... !!! FIX !!!
+ if ((DSTA2 ? a2PixelSize : a1PixelSize) == 0) // 1 BPP
+ JaguarWriteByte(dstAddr, writeData, BLITTER);
+ if ((DSTA2 ? a2PixelSize : a1PixelSize) == 1) // 2 BPP
+ JaguarWriteByte(dstAddr, writeData, BLITTER);
+ if ((DSTA2 ? a2PixelSize : a1PixelSize) == 2) // 4 BPP
+ JaguarWriteByte(dstAddr, writeData, BLITTER);
+ if ((DSTA2 ? a2PixelSize : a1PixelSize) == 3) // 8 BPP
+ JaguarWriteByte(dstAddr, writeData, BLITTER);
+ if ((DSTA2 ? a2PixelSize : a1PixelSize) == 4) // 16 BPP
+ JaguarWriteWord(dstAddr, writeData, BLITTER);
+ if ((DSTA2 ? a2PixelSize : a1PixelSize) == 5) // 32 BPP
+ JaguarWriteLong(dstAddr, writeData, BLITTER);
+ }
+
+#ifdef LOG_BLITTER_MEMORY_ACCESSES
+if (logBlit)
+ WriteLog("BLITTER: dstAddr=%08X, writeData=%08X %08X\n", dstAddr, (uint32)(writeData >> 32), (uint32)(writeData & 0xFFFFFFFF));
+#endif
+
+inhibitWrite://Should this go here? or on the other side of the X/Y incrementing?
+//Seems OK here... for now.
+
+// Do funky X/Y incrementation here as well... !!! FIX !!!
+
+ // Handle A1 channel stepping
+
+ if ((blitter_ram[A1_FLAGS + 1] & 0x03) == 0)
+ a1_x += phraseOffset[a1PixelSize] << 16;
+ else if ((blitter_ram[A1_FLAGS + 1] & 0x03) == 1)
+ a1_x += (blitter_ram[A1_FLAGS + 1] & 0x08 ? -1 << 16 : 1 << 16);
+/* else if ((blitter_ram[A1_FLAGS + 1] & 0x03) == 2)
+ a1_x += 0 << 16; */
+ else if ((blitter_ram[A1_FLAGS + 1] & 0x03) == 3)
+ {
+//Always add the FINC here??? That was the problem with the BIOS screen... So perhaps.
+ a1_x += GET16(blitter_ram, A1_FINC + 2);
+ a1_y += GET16(blitter_ram, A1_FINC + 0);
+
+ a1_x += GET16(blitter_ram, A1_INC + 2) << 16;
+ a1_y += GET16(blitter_ram, A1_INC + 0) << 16;
+ }
+
+ if ((blitter_ram[A1_FLAGS + 1] & 0x04) && (blitter_ram[A1_FLAGS + 1] & 0x03 != 3))
+ a1_y += (blitter_ram[A1_FLAGS + 1] & 0x10 ? -1 << 16 : 1 << 16);
+
+ // Handle A2 channel stepping
+
+ if ((blitter_ram[A2_FLAGS + 1] & 0x03) == 0)
+ a2_x += phraseOffset[a2PixelSize] << 16;
+ else if ((blitter_ram[A2_FLAGS + 1] & 0x03) == 1)
+ a2_x += (blitter_ram[A2_FLAGS + 1] & 0x08 ? -1 << 16 : 1 << 16);
+/* else if ((blitter_ram[A2_FLAGS + 1] & 0x03) == 2)
+ a2_x += 0 << 16; */
+
+ if (blitter_ram[A2_FLAGS + 1] & 0x04)
+ a2_y += (blitter_ram[A2_FLAGS + 1] & 0x10 ? -1 << 16 : 1 << 16);
+
+//Need to fix this so that it subtracts (saturating, of course) the correct number of pixels
+//in phrase mode... !!! FIX !!! [DONE]
+//Need to fix this so that it counts down the correct item. Does it count the
+//source or the destination phrase mode???
+//It shouldn't matter, because we *should* end up processing the same amount
+//the same number of pixels... Not sure though.
+ if ((DSTA2 ? a2_phrase_mode : a1_phrase_mode) == 1)
+ {
+ if (inner_loop < phraseOffset[DSTA2 ? a2PixelSize : a1PixelSize])
+ inner_loop = 0;
+ else
+ inner_loop -= phraseOffset[DSTA2 ? a2PixelSize : a1PixelSize];
+ }
+ else
+ inner_loop--;
+
+
+ if (DSTWRZ)
+ goto dzwrite;
+ else if (INNER0)
+ goto indone;
+ else if (TXTEXT)
+ goto txtread;
+ else if (SRCEN)
+ goto sread;
+ else if (DSTEN)
+ goto dread;
+ else if (DSTENZ)
+ goto dzread;
+ else
+ goto dwrite;
+
+dzwrite: // Destination Z write
+/*
+dzwrite Destination Z write.
+if STEP
+ if INNER0 goto idle
+ else if TXTEXT goto txtread
+ else if SRCEN goto sread
+ else if DSTEN goto dread
+ else if DSTENZ goto dzread
+ else goto dwrite
+*/
+ if (INNER0)
+ goto indone;
+ else if (TXTEXT)
+ goto txtread;
+ else if (SRCEN)
+ goto sread;
+ else if (DSTEN)
+ goto dread;
+ else if (DSTENZ)
+ goto dzread;
+ else
+ goto dwrite;
+
+/*
+------------------------------
+if INDONE if OUTER0 goto idle
+else if UPDA1F goto a1fupdate
+else if UPDA1 goto a1update
+else if GOURZ.POLYGON goto zfupdate
+else if UPDA2 goto a2update
+else if DATINIT goto init_if
+else restart inner
+*/
+indone:
+ outer_loop--;
+
+
+ if (OUTER0)
+ goto blitter_done;
+ else if (UPDA1F)
+ goto a1fupdate;
+ else if (UPDA1)
+ goto a1update;
+//kill this, for now...
+// else if (GOURZ.POLYGON)
+// goto zfupdate;
+ else if (UPDA2)
+ goto a2update;
+ else if (DATINIT)
+ goto init_if;
+ else
+ goto inner;
+
+a1fupdate: // Update A1 pointer fractions and more (see below)
+/*
+a1fupdate A1 step fraction is added to A1 pointer fraction
+ POLYGON true: A1 step delta X and Y fraction parts are added to the A1
+ step X and Y fraction parts (the value prior to this add is used for
+ the step to pointer add).
+ POLYGON true: inner count step fraction is added to the inner count
+ fraction part
+ POLYGON.GOURD true: the I fraction step is added to the computed
+ intensity fraction parts +
+ POLYGON.GOURD true: the I fraction step delta is added to the I
+ fraction step
+goto a1update
+*/
+/*
+#define A1_PIXEL ((uint32)0x0C) // Integer part of the pixel (Y.i and X.i)
+#define A1_STEP ((uint32)0x10) // Integer part of the step
+#define A1_FSTEP ((uint32)0x14) // Fractional part of the step
+#define A1_FPIXEL ((uint32)0x18) // Fractional part of the pixel (Y.f and X.f)
+*/
+
+// This is all kinda murky. All we have are the Midsummer docs to give us any guidance,
+// and it's incomplete or filled with errors (like above). Aarrrgggghhhhh!
+
+//This isn't right. Is it? I don't think the fractional parts are signed...
+// a1_x += (int32)((int16)GET16(blitter_ram, A1_FSTEP + 2));
+// a1_y += (int32)((int16)GET16(blitter_ram, A1_FSTEP + 0));
+ a1_x += GET16(blitter_ram, A1_FSTEP + 2);
+ a1_y += GET16(blitter_ram, A1_FSTEP + 0);
+
+ goto a1update;
+
+a1update: // Update A1 pointer integers
+/*
+a1update A1 step is added to A1 pointer, with carry from the fractional add
+ POLYGON true: A1 step delta X and Y integer parts are added to the A1
+ step X and Y integer parts, with carry from the corresponding
+ fractional part add (again, the value prior to this add is used for
+ the step to pointer add).
+ POLYGON true: inner count step is added to the inner count, with carry
+ POLYGON.GOURD true: the I step is added to the computed intensities,
+ with carry +
+ POLYGON.GOURD true: the I step delta is added to the I step, with
+ carry the texture X and Y step delta values are added to the X and Y
+ step values.
+if GOURZ.POLYGON goto zfupdate
+else if UPDA2 goto a2update
+else if DATINIT goto init_if
+else restart inner
+*/
+ a1_x += (int32)(GET16(blitter_ram, A1_STEP + 2) << 16);
+ a1_y += (int32)(GET16(blitter_ram, A1_STEP + 0) << 16);
+
+
+//kill this, for now...
+// if (GOURZ.POLYGON)
+ if (false)
+ goto zfupdate;
+ else if (UPDA2)
+ goto a2update;
+ else if (DATINIT)
+ goto init_if;
+ else
+ goto inner;
+
+zfupdate: // Update computed Z step fractions
+/*
+zfupdate the Z fraction step is added to the computed Z fraction parts +
+ the Z fraction step delta is added to the Z fraction step
+goto zupdate
+*/
+ goto zupdate;
+
+zupdate: // Update computed Z step integers
+/*
+zupdate the Z step is added to the computed Zs, with carry +
+ the Z step delta is added to the Z step, with carry
+if UPDA2 goto a2update
+else if DATINIT goto init_if
+else restart inner
+*/
+ if (UPDA2)
+ goto a2update;
+ else if (DATINIT)
+ goto init_if;
+ else
+ goto inner;
+
+a2update: // Update A2 pointer
+/*
+a2update A2 step is added to the A2 pointer
+if DATINIT goto init_if
+else restart inner
+*/
+ a2_x += (int32)(GET16(blitter_ram, A2_STEP + 2) << 16);
+ a2_y += (int32)(GET16(blitter_ram, A2_STEP + 0) << 16);
+
+
+ if (DATINIT)
+ goto init_if;
+ else
+ goto inner;
+
+init_if: // Initialise intensity fractions and texture X
+/*
+init_if Initialise the fractional part of the computed intensity fields, from
+ the increment and step registers. The texture X integer and fractional
+ parts can also be initialised.
+goto init_ii
+*/
+ goto init_ii;
+
+init_ii: // Initialise intensity integers and texture Y
+/*
+init_ii Initialise the integer part of the computed intensity, and texture Y
+ integer and fractional parts
+if GOURZ goto init_zf
+else goto inner
+*/
+ if (GOURZ)
+ goto init_zf;
+ else
+ goto inner;
+
+init_zf: // Initialise Z fractions
+/*
+init_zf Initialise the fractional part of the computed Z fields.
+goto init_zi
+*/
+ goto init_zi;
+
+init_zi: // Initialise Z integers
+/*
+init_zi Initialise the integer part of the computed Z fields.
+goto inner
+*/
+ goto inner;
+
+
+/*
+The outer loop state machine fires off the inner loop, and controls the updating
+process between passes through the inner loop.
+
++ -- these functions are irrelevant if the DATINIT function is enabled, which it
+ will normally be.
+
+All these states will complete in one clock cycle, with the exception of the idle
+state, which means the blitter is quiescent; and the inner state, which takes as
+long as is required to complete one strip of pixels. It is therefore possible for
+the blitter to spend a maximum of nine clock cycles of inactivity between passes
+through the inner loop.
+*/
+
+blitter_done:
+ {}
+}
+#endif
+
+
+//
+// Here's attempt #2--taken from the Oberon chip specs!
+//
+
+#ifdef USE_MIDSUMMER_BLITTER_MKII
+
+void ADDRGEN(uint32 &, uint32 &, bool, bool,
+ uint16, uint16, uint32, uint8, uint8, uint8, uint8,
+ uint16, uint16, uint32, uint8, uint8, uint8, uint8);
+void ADDARRAY(uint16 * addq, uint8 daddasel, uint8 daddbsel, uint8 daddmode,
+ uint64 dstd, uint32 iinc, uint8 initcin[], uint64 initinc, uint16 initpix,
+ uint32 istep, uint64 patd, uint64 srcd, uint64 srcz1, uint64 srcz2,
+ uint32 zinc, uint32 zstep);
+void ADD16SAT(uint16 &r, uint8 &co, uint16 a, uint16 b, uint8 cin, bool sat, bool eightbit, bool hicinh);
+void ADDAMUX(int16 &adda_x, int16 &adda_y, uint8 addasel, int16 a1_step_x, int16 a1_step_y,
+ int16 a1_stepf_x, int16 a1_stepf_y, int16 a2_step_x, int16 a2_step_y,
+ int16 a1_inc_x, int16 a1_inc_y, int16 a1_incf_x, int16 a1_incf_y, uint8 adda_xconst,
+ bool adda_yconst, bool addareg, bool suba_x, bool suba_y);
+void ADDBMUX(int16 &addb_x, int16 &addb_y, uint8 addbsel, int16 a1_x, int16 a1_y,
+ int16 a2_x, int16 a2_y, int16 a1_frac_x, int16 a1_frac_y);
+void DATAMUX(int16 &data_x, int16 &data_y, uint32 gpu_din, int16 addq_x, int16 addq_y, bool addqsel);
+void ADDRADD(int16 &addq_x, int16 &addq_y, bool a1fracldi,
+ uint16 adda_x, uint16 adda_y, uint16 addb_x, uint16 addb_y, uint8 modx, bool suba_x, bool suba_y);
+void DATA(uint64 &wdata, uint8 &dcomp, uint8 &zcomp, bool &nowrite,
+ bool big_pix, bool cmpdst, uint8 daddasel, uint8 daddbsel, uint8 daddmode, bool daddq_sel, uint8 data_sel,
+ uint8 dbinh, uint8 dend, uint8 dstart, uint64 dstd, uint32 iinc, uint8 lfu_func, uint64 &patd, bool patdadd,
+ bool phrase_mode, uint64 srcd, bool srcdread, bool srczread, bool srcz2add, uint8 zmode,
+ bool bcompen, bool bkgwren, bool dcompen, uint8 icount, uint8 pixsize,
+ uint64 &srcz, uint64 dstz, uint32 zinc);
+void COMP_CTRL(uint8 &dbinh, bool &nowrite,
+ bool bcompen, bool big_pix, bool bkgwren, uint8 dcomp, bool dcompen, uint8 icount,
+ uint8 pixsize, bool phrase_mode, uint8 srcd, uint8 zcomp);
+#define VERBOSE_BLITTER_LOGGING
+bool logBlit = false;
+
+void BlitterMidsummer2(void)
+{
+ // Here's what the specs say the state machine does. Note that this can probably be
+ // greatly simplified (also, it's different from what John has in his Oberon docs):
+//Will remove stuff that isn't in Jaguar I once fully described (stuff like texture won't
+//be described here at all)...
+
+ uint32 cmd = GET32(blitter_ram, COMMAND);
+
+logBlit = false;
+if (
+ cmd != 0x00010200 && // PATDSEL
+ cmd != 0x01800001 // SRCEN LFUFUNC=C
+ && cmd != 0x01800005
+//Boot ROM ATARI letters:
+ && cmd != 0x00011008 // DSTEN GOURD PATDSEL
+//Boot ROM spinning cube:
+ && cmd != 0x41802F41 // SRCEN CLIP_A1 UPDA1 UPDA1F UPDA2 DSTA2 GOURZ ZMODE=0 LFUFUNC=C SRCSHADE
+//T2K intro screen:
+ && cmd != 0x01800E01 // SRCEN UPDA1 UPDA2 DSTA2 LFUFUNC=C
+//T2K TEMPEST letters:
+ && cmd != 0x09800741 // SRCEN CLIP_A1 UPDA1 UPDA1F UPDA2 LFUFUNC=C DCOMPEN
+//Static letters on Cybermorph intro screen:
+ && cmd != 0x09800609 // SRCEN DSTEN UPDA1 UPDA2 LFUFUNC=C DCOMPEN
+//Static pic on title screen:
+ && cmd != 0x01800601 // SRCEN UPDA1 UPDA2 LFUFUNC=C
+//Turning letters on Cybermorph intro screen:
+// && cmd != 0x09800F41 // SRCEN CLIP_A1 UPDA1 UPDA1F UPDA2 DSTA2 LFUFUNC=C DCOMPEN
+ && cmd != 0x00113078 // DSTEN DSTENZ DSTWRZ CLIP_A1 GOURD GOURZ PATDSEL ZMODE=4
+ && cmd != 0x09900F39 // SRCEN DSTEN DSTENZ DSTWRZ UPDA1 UPDA1F UPDA2 DSTA2 ZMODE=4 LFUFUNC=C DCOMPEN
+ && cmd != 0x09800209 // SRCEN DSTEN UPDA1 LFUFUNC=C DCOMPEN
+ && cmd != 0x00011200 // UPDA1 GOURD PATDSEL
+//Start of Hover Strike (clearing screen):
+ && cmd != 0x00010000 // PATDSEL
+//Hover Strike text:
+ && cmd != 0x1401060C // SRCENX DSTEN UPDA1 UPDA2 PATDSEL BCOMPEN BKGWREN
+//Hover Strike 3D stuff
+ && cmd != 0x01902839 // SRCEN DSTEN DSTENZ DSTWRZ DSTA2 GOURZ ZMODE=4 LFUFUNC=C
+//Hover Strike darkening on intro to play (briefing) screen
+ && cmd != 0x00020208 // DSTEN UPDA1 ADDDSEL
+//Trevor McFur stuff:
+ && cmd != 0x05810601 // SRCEN UPDA1 UPDA2 PATDSEL BCOMPEN
+ && cmd != 0x01800201 // SRCEN UPDA1 LFUFUNC=C
+//T2K:
+ && cmd != 0x00011000 // GOURD PATDSEL
+ && cmd != 0x00011040 // CLIP_A1 GOURD PATDSEL
+//Checkered flag:
+ && cmd != 0x01800000 // LFUFUNC=C
+ && cmd != 0x01800401 //
+ && cmd != 0x01800040 //
+ && cmd != 0x00020008 //
+// && cmd != 0x09800F41 // SRCEN CLIP_A1 UPDA1 UPDA1F UPDA2 DSTA2 LFUFUNC=C DCOMPEN
+ )
+ logBlit = true;//*/
+//logBlit = true;
+if (blit_start_log == 0) // Wait for the signal...
+ logBlit = false;//*/
+/*
+Some T2K unique blits:
+logBlit = F, cmd = 00010200 *
+logBlit = F, cmd = 00011000
+logBlit = F, cmd = 00011040
+logBlit = F, cmd = 01800005 *
+logBlit = F, cmd = 09800741 *
+
+Hover Strike mission selection screen:
+Blit! (CMD = 01902839) // SRCEN DSTEN DSTENZ DSTWRZ DSTA2 GOURZ ZMODE=4 LFUFUNC=C
+
+Checkered Flag blits in the screw up zone:
+Blit! (CMD = 01800001) // SRCEN LFUFUNC=C
+Blit! (CMD = 01800000) // LFUFUNC=C
+Blit! (CMD = 00010000) // PATDSEL
+
+Wolfenstein 3D in the fuckup zone:
+Blit! (CMD = 01800000) // LFUFUNC=C
+*/
+
+//printf("logBlit = %s, cmd = %08X\n", (logBlit ? "T" : "F"), cmd);
+//fflush(stdout);
+//logBlit = true;
+
+/*
+Blit! (CMD = 00011040)
+Flags: CLIP_A1 GOURD PATDSEL
+ count = 18 x 1
+ a1_base = 00100000, a2_base = 0081F6A8
+ a1_x = 00A7, a1_y = 0014, a1_frac_x = 0000, a1_frac_y = 0000, a2_x = 0001, a2_y = 0000
+ a1_step_x = FE80, a1_step_y = 0001, a1_stepf_x = 0000, a1_stepf_y = 0000, a2_step_x = FFF8, a2_step_y = 0001
+ a1_inc_x = 0001, a1_inc_y = 0000, a1_incf_x = 0000, a1_incf_y = 0000
+ a1_win_x = 0180, a1_win_y = 0118, a2_mask_x = 0000, a2_mask_y = 0000
+ a2_mask=F a1add=+phr/+0 a2add=+phr/+0
+ a1_pixsize = 4, a2_pixsize = 4
+*/
+//Testing T2K...
+/*logBlit = false;
+if (cmd == 0x00011040
+ && (GET16(blitter_ram, A1_PIXEL + 2) == 0x00A7) && (GET16(blitter_ram, A1_PIXEL + 0) == 0x0014)
+ && (GET16(blitter_ram, A2_PIXEL + 2) == 0x0001) && (GET16(blitter_ram, A2_PIXEL + 0) == 0x0000)
+ && (GET16(blitter_ram, PIXLINECOUNTER + 2) == 18))
+ logBlit = true;*/
+
+ // Line states passed in via the command register
+
+ bool srcen = (SRCEN), srcenx = (SRCENX), srcenz = (SRCENZ),
+ dsten = (DSTEN), dstenz = (DSTENZ), dstwrz = (DSTWRZ), clip_a1 = (CLIPA1),
+ upda1 = (UPDA1), upda1f = (UPDA1F), upda2 = (UPDA2), dsta2 = (DSTA2),
+ gourd = (GOURD), gourz = (GOURZ), topben = (TOPBEN), topnen = (TOPNEN),
+ patdsel = (PATDSEL), adddsel = (ADDDSEL), cmpdst = (CMPDST), bcompen = (BCOMPEN),
+ dcompen = (DCOMPEN), bkgwren = (BKGWREN), srcshade = (SRCSHADE);
+
+ uint8 zmode = (cmd & 0x01C0000) >> 18, lfufunc = (cmd & 0x1E00000) >> 21;
+//Missing: BUSHI
+//Where to find various lines:
+// clip_a1 -> inner
+// gourd -> dcontrol, inner, outer, state
+// gourz -> dcontrol, inner, outer, state
+// cmpdst -> blit, data, datacomp, state
+// bcompen -> acontrol, inner, mcontrol, state
+// dcompen -> inner, state
+// bkgwren -> inner, state
+// srcshade -> dcontrol, inner, state
+// adddsel -> dcontrol
+//NOTE: ADDDSEL takes precedence over PATDSEL, PATDSEL over LFU_FUNC
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+char zfs[512], lfus[512];
+zfs[0] = lfus[0] = 0;
+if (dstwrz || dstenz || gourz)
+ sprintf(zfs, " ZMODE=%X", zmode);
+if (!(patdsel || adddsel))
+ sprintf(lfus, " LFUFUNC=%X", lfufunc);
+printf("\nBlit! (CMD = %08X)\nFlags:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", cmd,
+ (srcen ? " SRCEN" : ""), (srcenx ? " SRCENX" : ""), (srcenz ? " SRCENZ" : ""),
+ (dsten ? " DSTEN" : ""), (dstenz ? " DSTENZ" : ""), (dstwrz ? " DSTWRZ" : ""),
+ (clip_a1 ? " CLIP_A1" : ""), (upda1 ? " UPDA1" : ""), (upda1f ? " UPDA1F" : ""),
+ (upda2 ? " UPDA2" : ""), (dsta2 ? " DSTA2" : ""), (gourd ? " GOURD" : ""),
+ (gourz ? " GOURZ" : ""), (topben ? " TOPBEN" : ""), (topnen ? " TOPNEN" : ""),
+ (patdsel ? " PATDSEL" : ""), (adddsel ? " ADDDSEL" : ""), zfs, lfus, (cmpdst ? " CMPDST" : ""),
+ (bcompen ? " BCOMPEN" : ""), (dcompen ? " DCOMPEN" : ""), (bkgwren ? " BKGWREN" : ""),
+ (srcshade ? " SRCSHADE" : ""));
+printf(" count = %d x %d\n", GET16(blitter_ram, PIXLINECOUNTER + 2), GET16(blitter_ram, PIXLINECOUNTER));
+fflush(stdout);
+}
+#endif
+
+ // Lines that don't exist in Jaguar I (and will never be asserted)
+
+ bool polygon = false, datinit = false, a1_stepld = false, a2_stepld = false, ext_int = false;
+ bool istepadd = false, istepfadd = false, finneradd = false, inneradd = false;
+ bool zstepfadd = false, zstepadd = false;
+
+ // Various state lines (initial state--basically the reset state of the FDSYNCs)
+
+ bool go = true, idle = true, inner = false, a1fupdate = false, a1update = false,
+ zfupdate = false, zupdate = false, a2update = false, init_if = false, init_ii = false,
+ init_zf = false, init_zi = false;
+
+ bool outer0 = false, indone = false;
+
+ bool idlei, inneri, a1fupdatei, a1updatei, zfupdatei, zupdatei, a2updatei, init_ifi, init_iii,
+ init_zfi, init_zii;
+
+ bool notgzandp = !(gourz && polygon);
+
+ // Various registers set up by user
+
+ uint16 ocount = GET16(blitter_ram, PIXLINECOUNTER);
+ uint8 a1_pitch = blitter_ram[A1_FLAGS + 3] & 0x03;
+ uint8 a2_pitch = blitter_ram[A2_FLAGS + 3] & 0x03;
+ uint8 a1_pixsize = (blitter_ram[A1_FLAGS + 3] & 0x38) >> 3;
+ uint8 a2_pixsize = (blitter_ram[A2_FLAGS + 3] & 0x38) >> 3;
+ uint8 a1_zoffset = (GET16(blitter_ram, A1_FLAGS + 2) >> 6) & 0x07;
+ uint8 a2_zoffset = (GET16(blitter_ram, A2_FLAGS + 2) >> 6) & 0x07;
+ uint8 a1_width = (blitter_ram[A1_FLAGS + 2] >> 1) & 0x3F;
+ uint8 a2_width = (blitter_ram[A2_FLAGS + 2] >> 1) & 0x3F;
+ bool a2_mask = blitter_ram[A2_FLAGS + 2] & 0x80;
+ uint8 a1addx = blitter_ram[A1_FLAGS + 1] & 0x03, a2addx = blitter_ram[A2_FLAGS + 1] & 0x03;
+ bool a1addy = blitter_ram[A1_FLAGS + 1] & 0x04, a2addy = blitter_ram[A2_FLAGS + 1] & 0x04;
+ bool a1xsign = blitter_ram[A1_FLAGS + 1] & 0x08, a2xsign = blitter_ram[A2_FLAGS + 1] & 0x08;
+ bool a1ysign = blitter_ram[A1_FLAGS + 1] & 0x10, a2ysign = blitter_ram[A2_FLAGS + 1] & 0x10;
+ uint32 a1_base = GET32(blitter_ram, A1_BASE) & 0xFFFFFFF8; // Phrase aligned by ignoring bottom 3 bits
+ uint32 a2_base = GET32(blitter_ram, A2_BASE) & 0xFFFFFFF8;
+
+ uint16 a1_win_x = GET16(blitter_ram, A1_CLIP + 2) & 0x7FFF;
+ uint16 a1_win_y = GET16(blitter_ram, A1_CLIP + 0) & 0x7FFF;
+ int16 a1_x = (int16)GET16(blitter_ram, A1_PIXEL + 2);
+ int16 a1_y = (int16)GET16(blitter_ram, A1_PIXEL + 0);
+ int16 a1_step_x = (int16)GET16(blitter_ram, A1_STEP + 2);
+ int16 a1_step_y = (int16)GET16(blitter_ram, A1_STEP + 0);
+ uint16 a1_stepf_x = GET16(blitter_ram, A1_FSTEP + 2);
+ uint16 a1_stepf_y = GET16(blitter_ram, A1_FSTEP + 0);
+ uint16 a1_frac_x = GET16(blitter_ram, A1_FPIXEL + 2);
+ uint16 a1_frac_y = GET16(blitter_ram, A1_FPIXEL + 0);
+ int16 a1_inc_x = (int16)GET16(blitter_ram, A1_INC + 2);
+ int16 a1_inc_y = (int16)GET16(blitter_ram, A1_INC + 0);
+ uint16 a1_incf_x = GET16(blitter_ram, A1_FINC + 2);
+ uint16 a1_incf_y = GET16(blitter_ram, A1_FINC + 0);
+
+ int16 a2_x = (int16)GET16(blitter_ram, A2_PIXEL + 2);
+ int16 a2_y = (int16)GET16(blitter_ram, A2_PIXEL + 0);
+ uint16 a2_mask_x = GET16(blitter_ram, A2_MASK + 2);
+ uint16 a2_mask_y = GET16(blitter_ram, A2_MASK + 0);
+ int16 a2_step_x = (int16)GET16(blitter_ram, A2_STEP + 2);
+ int16 a2_step_y = (int16)GET16(blitter_ram, A2_STEP + 0);
+
+ uint64 srcd1 = GET64(blitter_ram, SRCDATA);
+ uint64 srcd2 = 0;
+ uint64 dstd = GET64(blitter_ram, DSTDATA);
+ uint64 patd = GET64(blitter_ram, PATTERNDATA);
+ uint32 iinc = GET32(blitter_ram, INTENSITYINC);
+ uint64 srcz1 = GET64(blitter_ram, SRCZINT);
+ uint64 srcz2 = GET64(blitter_ram, SRCZFRAC);
+ uint64 dstz = GET64(blitter_ram, DSTZ);
+ uint32 zinc = GET32(blitter_ram, ZINC);
+ uint32 collision = GET32(blitter_ram, COLLISIONCTRL);// 0=RESUME, 1=ABORT, 2=STOPEN
+
+ uint8 pixsize = (dsta2 ? a2_pixsize : a1_pixsize); // From ACONTROL
+
+//Testing Trevor McFur--I *think* it's the circle on the lower RHS of the screen...
+/*logBlit = false;
+if (cmd == 0x05810601 && (GET16(blitter_ram, PIXLINECOUNTER + 2) == 96)
+ && (GET16(blitter_ram, PIXLINECOUNTER + 0) == 72))
+ logBlit = true;//*/
+//Testing...
+//if (cmd == 0x1401060C) patd = 0xFFFFFFFFFFFFFFFFLL;
+//if (cmd == 0x1401060C) patd = 0x00000000000000FFLL;
+//If it's still not working (bcompen-patd) then see who's writing what to patd and where...
+//Still not OK. Check to see who's writing what to where in patd!
+//It looks like M68K is writing to the top half of patd... Hmm...
+/*
+----> M68K wrote 0000 to byte 15737344 of PATTERNDATA...
+--> M68K wrote 00 to byte 0 of PATTERNDATA...
+--> M68K wrote 00 to byte 1 of PATTERNDATA...
+----> M68K wrote 00FF to byte 15737346 of PATTERNDATA...
+--> M68K wrote 00 to byte 2 of PATTERNDATA...
+--> M68K wrote FF to byte 3 of PATTERNDATA...
+logBlit = F, cmd = 1401060C
+
+Wren0 := ND6 (wren\[0], gpua\[5], gpua\[6..8], bliten, gpu_memw);
+Wren1 := ND6 (wren\[1], gpua[5], gpua\[6..8], bliten, gpu_memw);
+Wren2 := ND6 (wren\[2], gpua\[5], gpua[6], gpua\[7..8], bliten, gpu_memw);
+Wren3 := ND6 (wren\[3], gpua[5], gpua[6], gpua\[7..8], bliten, gpu_memw);
+
+--> 0 000x xx00
+Dec0 := D38GH (a1baseld, a1flagld, a1winld, a1ptrld, a1stepld, a1stepfld, a1fracld, a1incld, gpua[2..4], wren\[0]);
+--> 0 001x xx00
+Dec1 := D38GH (a1incfld, a2baseld, a2flagld, a2maskld, a2ptrldg, a2stepld, cmdldt, countldt, gpua[2..4], wren\[1]);
+--> 0 010x xx00
+Dec2 := D38GH (srcd1ldg[0..1], dstdldg[0..1], dstzldg[0..1], srcz1ldg[0...1], gpua[2..4], wren\[2]);
+--> 0 011x xx00
+Dec3 := D38GH (srcz2ld[0..1], patdld[0..1], iincld, zincld, stopld, intld[0], gpua[2..4], wren\[3]);
+
+wren[3] is asserted when gpu address bus = 0 011x xx00
+patdld[0] -> 0 0110 1000 -> $F02268 (lo 32 bits)
+patdld[1] -> 0 0110 1100 -> $F0226C (hi 32 bits)
+
+So... It's reversed! The data organization of the patd register is [low 32][high 32]! !!! FIX !!! [DONE]
+And fix all the other 64 bit registers [DONE]
+*/
+/*if (cmd == 0x1401060C)
+{
+ printf("logBlit = %s, cmd = %08X\n", (logBlit ? "T" : "F"), cmd);
+ fflush(stdout);
+}*/
+/*logBlit = false;
+if ((cmd == 0x00010200) && (GET16(blitter_ram, PIXLINECOUNTER + 2) == 9))
+ logBlit = true;
+
+; Pink altimeter bar
+
+Blit! (00110000 <- 000BF010) count: 9 x 23, A1/2_FLAGS: 000042E2/00010020 [cmd: 00010200]
+ CMD -> src: dst: misc: a1ctl: UPDA1 mode: ity: PATDSEL z-op: op: LFU_CLEAR ctrl:
+ A1 step values: -10 (X), 1 (Y)
+ A1 -> pitch: 4 phrases, depth: 16bpp, z-off: 3, width: 320 (21), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 1 (00), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 262/132, A2 x/y: 129/0
+;x-coord is 257 in pic, so add 5
+;20 for ship, 33 for #... Let's see if we can find 'em!
+
+; Black altimeter bar
+
+Blit! (00110000 <- 000BF010) count: 5 x 29, A1/2_FLAGS: 000042E2/00010020 [cmd: 00010200]
+ CMD -> src: dst: misc: a1ctl: UPDA1 mode: ity: PATDSEL z-op: op: LFU_CLEAR ctrl:
+ A1 step values: -8 (X), 1 (Y)
+ A1 -> pitch: 4 phrases, depth: 16bpp, z-off: 3, width: 320 (21), addctl: XADDPHR YADD0 XSIGNADD YSIGNADD
+ A2 -> pitch: 1 phrases, depth: 16bpp, z-off: 0, width: 1 (00), addctl: XADDPIX YADD0 XSIGNADD YSIGNADD
+ A1 x/y: 264/126, A2 x/y: 336/0
+
+Here's the pink bar--note that it's phrase mode without dread, so how does this work???
+Not sure, but I *think* that somehow it MUXes the data at the write site in on the left or right side
+of the write data when masked in phrase mode. I'll have to do some tracing to see if this is the mechanism
+it uses or not...
+
+Blit! (CMD = 00010200)
+Flags: UPDA1 PATDSEL
+ count = 9 x 11
+ a1_base = 00110010, a2_base = 000BD7E0
+ a1_x = 0106, a1_y = 0090, a1_frac_x = 0000, a1_frac_y = 8000, a2_x = 025A, a2_y = 0000
+ a1_step_x = FFF6, a1_step_y = 0001, a1_stepf_x = 5E00, a1_stepf_y = D100, a2_step_x = FFF7, a2_step_y = 0001
+ a1_inc_x = 0001, a1_inc_y = FFFF, a1_incf_x = 0000, a1_incf_y = E000
+ a1_win_x = 0000, a1_win_y = 0000, a2_mask_x = 0000, a2_mask_y = 0000
+ a2_mask=F a1add=+phr/+0 a2add=+1/+0
+ a1_pixsize = 4, a2_pixsize = 4
+ srcd=BAC673AC2C92E578 dstd=0000000000000000 patd=74C074C074C074C0 iinc=0002E398
+ srcz1=7E127E12000088DA srcz2=DBE06DF000000000 dstz=0000000000000000 zinc=FFFE4840, coll=0
+ Phrase mode is ON
+ [in=T a1f=F a1=F zf=F z=F a2=F iif=F iii=F izf=F izi=F]
+ Entering INNER state...
+ Entering DWRITE state...
+ Dest write address/pix address: 0016A830/0 [dstart=20 dend=40 pwidth=8 srcshift=0][daas=0 dabs=0 dam=7 ds=0 daq=F] [7400000074C074C0] (icount=0007, inc=2)
+ Entering A1_ADD state [a1_x=0106, a1_y=0090, addasel=0, addbsel=0, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering DWRITE state...
+ Dest write address/pix address: 0016A850/0 [dstart=0 dend=40 pwidth=8 srcshift=0][daas=0 dabs=0 dam=7 ds=0 daq=F] [74C074C074C074C0] (icount=0003, inc=4)
+ Entering A1_ADD state [a1_x=0108, a1_y=0090, addasel=0, addbsel=0, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering DWRITE state...
+ Dest write address/pix address: 0016A870/0 [dstart=0 dend=30 pwidth=8 srcshift=0][daas=0 dabs=0 dam=7 ds=0 daq=F] [74C074C074C00000] (icount=FFFF, inc=4)
+ Entering A1_ADD state [a1_x=010C, a1_y=0090, addasel=0, addbsel=0, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering IDLE_INNER state...
+ Leaving INNER state... (ocount=000A)
+ [in=F a1f=F a1=T zf=F z=F a2=F iif=F iii=F izf=F izi=F]
+ Entering A1UPDATE state... (272/144 -> 262/145)
+ [in=T a1f=F a1=F zf=F z=F a2=F iif=F iii=F izf=F izi=F]
+ Entering INNER state...
+*/
+
+ // Bugs in Jaguar I
+
+ a2addy = a1addy; // A2 channel Y add bit is tied to A1's
+
+//if (logBlit && (ocount > 20)) logBlit = false;
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" a1_base = %08X, a2_base = %08X\n", a1_base, a2_base);
+printf(" a1_x = %04X, a1_y = %04X, a1_frac_x = %04X, a1_frac_y = %04X, a2_x = %04X, a2_y = %04X\n", (uint16)a1_x, (uint16)a1_y, a1_frac_x, a1_frac_y, (uint16)a2_x, (uint16)a2_y);
+printf(" a1_step_x = %04X, a1_step_y = %04X, a1_stepf_x = %04X, a1_stepf_y = %04X, a2_step_x = %04X, a2_step_y = %04X\n", (uint16)a1_step_x, (uint16)a1_step_y, a1_stepf_x, a1_stepf_y, (uint16)a2_step_x, (uint16)a2_step_y);
+printf(" a1_inc_x = %04X, a1_inc_y = %04X, a1_incf_x = %04X, a1_incf_y = %04X\n", (uint16)a1_inc_x, (uint16)a1_inc_y, a1_incf_x, a1_incf_y);
+printf(" a1_win_x = %04X, a1_win_y = %04X, a2_mask_x = %04X, a2_mask_y = %04X\n", a1_win_x, a1_win_y, a2_mask_x, a2_mask_y);
+char x_add_str[4][4] = { "phr", "1", "0", "inc" };
+printf(" a2_mask=%s a1add=%s%s/%s%s a2add=%s%s/%s%s\n", (a2_mask ? "T" : "F"), (a1xsign ? "-" : "+"), x_add_str[a1addx],
+ (a1ysign ? "-" : "+"), (a1addy ? "1" : "0"), (a2xsign ? "-" : "+"), x_add_str[a2addx],
+ (a2ysign ? "-" : "+"), (a2addy ? "1" : "0"));
+printf(" a1_pixsize = %u, a2_pixsize = %u\n", a1_pixsize, a2_pixsize);
+printf(" srcd=%08X%08X dstd=%08X%08X patd=%08X%08X iinc=%08X\n",
+ (uint32)(srcd1 >> 32), (uint32)(srcd1 & 0xFFFFFFFF),
+ (uint32)(dstd >> 32), (uint32)(dstd & 0xFFFFFFFF),
+ (uint32)(patd >> 32), (uint32)(patd & 0xFFFFFFFF), iinc);
+printf(" srcz1=%08X%08X srcz2=%08X%08X dstz=%08X%08X zinc=%08X, coll=%X\n",
+ (uint32)(srcz1 >> 32), (uint32)(srcz1 & 0xFFFFFFFF),
+ (uint32)(srcz2 >> 32), (uint32)(srcz2 & 0xFFFFFFFF),
+ (uint32)(dstz >> 32), (uint32)(dstz & 0xFFFFFFFF), zinc, collision);
+}
+#endif
+
+ // Various state lines set up by user
+
+ bool phrase_mode = ((!dsta2 && a1addx == 0) || (dsta2 && a2addx == 0) ? true : false); // From ACONTROL
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Phrase mode is %s\n", (phrase_mode ? "ON" : "off"));
+fflush(stdout);
+}
+#endif
+//logBlit = false;
+
+ // Stopgap vars to simulate various lines
+
+ uint16 a1FracCInX = 0, a1FracCInY = 0;
+
+ while (true)
+ {
+ // IDLE
+
+ if ((idle && !go) || (inner && outer0 && indone))
+ {
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Entering IDLE state...\n");
+fflush(stdout);
+}
+#endif
+ idlei = true;
+
+//Instead of a return, let's try breaking out of the loop...
+break;
+// return;
+ }
+ else
+ idlei = false;
+
+ // INNER LOOP ACTIVE
+/*
+ Entering DWRITE state... (icount=0000, inc=4)
+ Entering IDLE_INNER state...
+ Leaving INNER state... (ocount=00EF)
+ [in=T a1f=F a1=T zf=F z=F a2=F iif=F iii=F izf=F izi=F]
+ Entering INNER state...
+Now:
+ [in=F a1f=F a1=F zf=F z=F a2=F iif=F iii=F izf=F izi=F]
+*/
+
+ if ((idle && go && !datinit)
+ || (inner && !indone)
+ || (inner && indone && !outer0 && !upda1f && !upda1 && notgzandp && !upda2 && !datinit)
+ || (a1update && !upda2 && notgzandp && !datinit)
+ || (zupdate && !upda2 && !datinit)
+ || (a2update && !datinit)
+ || (init_ii && !gourz)
+ || (init_zi))
+ {
+ inneri = true;
+ }
+ else
+ inneri = false;
+
+ // A1 FRACTION UPDATE
+
+ if (inner && indone && !outer0 && upda1f)
+ {
+ a1fupdatei = true;
+ }
+ else
+ a1fupdatei = false;
+
+ // A1 POINTER UPDATE
+
+ if ((a1fupdate)
+ || (inner && indone && !outer0 && !upda1f && upda1))
+ {
+ a1updatei = true;
+ }
+ else
+ a1updatei = false;
+
+ // Z FRACTION UPDATE
+
+ if ((a1update && gourz && polygon)
+ || (inner && indone && !outer0 && !upda1f && !upda1 && gourz && polygon))
+ {
+ zfupdatei = true;
+ }
+ else
+ zfupdatei = false;
+
+ // Z INTEGER UPDATE
+
+ if (zfupdate)
+ {
+ zupdatei = true;
+ }
+ else
+ zupdatei = false;
+
+ // A2 POINTER UPDATE
+
+ if ((a1update && upda2 && notgzandp)
+ || (zupdate && upda2)
+ || (inner && indone && !outer0 && !upda1f && notgzandp && !upda1 && upda2))
+ {
+ a2updatei = true;
+ }
+ else
+ a2updatei = false;
+
+ // INITIALIZE INTENSITY FRACTION
+
+ if ((zupdate && !upda2 && datinit)
+ || (a1update && !upda2 && datinit && notgzandp)
+ || (inner && indone && !outer0 && !upda1f && !upda1 && notgzandp && !upda2 && datinit)
+ || (a2update && datinit)
+ || (idle && go && datinit))
+ {
+ init_ifi = true;
+ }
+ else
+ init_ifi = false;
+
+ // INITIALIZE INTENSITY INTEGER
+
+ if (init_if)
+ {
+ init_iii = true;
+ }
+ else
+ init_iii = false;
+
+ // INITIALIZE Z FRACTION
+
+ if (init_ii && gourz)
+ {
+ init_zfi = true;
+ }
+ else
+ init_zfi = false;
+
+ // INITIALIZE Z INTEGER
+
+ if (init_zf)
+ {
+ init_zii = true;
+ }
+ else
+ init_zii = false;
+
+// Here we move the fooi into their foo counterparts in order to simulate the moving
+// of data into the various FDSYNCs... Each time we loop we simulate one clock cycle...
+
+ idle = idlei;
+ inner = inneri;
+ a1fupdate = a1fupdatei;
+ a1update = a1updatei;
+ zfupdate = zfupdatei; // *
+ zupdate = zupdatei; // *
+ a2update = a2updatei;
+ init_if = init_ifi; // *
+ init_ii = init_iii; // *
+ init_zf = init_zfi; // *
+ init_zi = init_zii; // *
+// * denotes states that will never assert for Jaguar I
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" [in=%c a1f=%c a1=%c zf=%c z=%c a2=%c iif=%c iii=%c izf=%c izi=%c]\n",
+ (inner ? 'T' : 'F'), (a1fupdate ? 'T' : 'F'), (a1update ? 'T' : 'F'), (zfupdate ? 'T' : 'F'),
+ (zupdate ? 'T' : 'F'), (a2update ? 'T' : 'F'), (init_if ? 'T' : 'F'), (init_ii ? 'T' : 'F'),
+ (init_zf ? 'T' : 'F'), (init_zi ? 'T' : 'F'));
+fflush(stdout);
+}
+#endif
+
+// Now, depending on how we want to handle things, we could either put the implementation
+// of the various pieces up above, or handle them down below here.
+
+// Let's try postprocessing for now...
+
+ if (inner)
+ {
+ indone = false;
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Entering INNER state...\n");
+fflush(stdout);
+}
+#endif
+ uint16 icount = GET16(blitter_ram, PIXLINECOUNTER + 2);
+ bool idle_inner = true, step = true, sreadx = false, szreadx = false, sread = false,
+ szread = false, dread = false, dzread = false, dwrite = false, dzwrite = false;
+ bool inner0 = false;
+ bool idle_inneri, sreadxi, szreadxi, sreadi, szreadi, dreadi, dzreadi, dwritei, dzwritei;
+
+ // State lines that will never assert in Jaguar I
+
+ bool textext = false, txtread = false;
+
+//other stuff
+uint8 srcshift = 0;
+bool sshftld = true; // D flipflop (D -> Q): instart -> sshftld
+//NOTE: sshftld probably is only asserted at the beginning of the inner loop. !!! FIX !!!
+/*
+Blit! (CMD = 01800005)
+Flags: SRCEN SRCENX LFUFUNC=C
+ count = 626 x 1
+ a1_base = 00037290, a2_base = 000095D0
+ a1_x = 0000, a1_y = 0000, a2_x = 0002, a2_y = 0000
+ a1_pixsize = 4, a2_pixsize = 4
+ srcd=0000000000000000, dstd=0000000000000000, patd=0000000000000000
+ Phrase mode is ON
+ [in=T a1f=F a1=F zf=F z=F a2=F iif=F iii=F izf=F izi=F]
+ Entering INNER state...
+ Entering SREADX state... [dstart=0 dend=20 pwidth=8 srcshift=20]
+ Source extra read address/pix address: 000095D4/0 [0000001C00540038]
+ Entering A2_ADD state [a2_x=0002, a2_y=0000, addasel=0, addbsel=1, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering SREAD state... [dstart=0 dend=20 pwidth=8 srcshift=0]
+ Source read address/pix address: 000095D8/0 [0054003800009814]
+ Entering A2_ADD state [a2_x=0004, a2_y=0000, addasel=0, addbsel=1, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering DWRITE state...
+ Dest write address/pix address: 00037290/0 [dstart=0 dend=20 pwidth=8 srcshift=0] (icount=026E, inc=4)
+ Entering A1_ADD state [a1_x=0000, a1_y=0000, addasel=0, addbsel=0, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering SREAD state... [dstart=0 dend=20 pwidth=8 srcshift=0]
+ Source read address/pix address: 000095E0/0 [00009968000377C7]
+ Entering A2_ADD state [a2_x=0008, a2_y=0000, addasel=0, addbsel=1, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering DWRITE state...
+ Dest write address/pix address: 00037298/0 [dstart=0 dend=20 pwidth=8 srcshift=0] (icount=026A, inc=4)
+ Entering A1_ADD state [a1_x=0004, a1_y=0000, addasel=0, addbsel=0, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+*/
+
+// while (!idle_inner)
+ while (true)
+ {
+ // IDLE
+
+ if ((idle_inner && !step)
+ || (dzwrite && step && inner0)
+ || (dwrite && step && !dstwrz && inner0))
+ {
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Entering IDLE_INNER state...\n");
+fflush(stdout);
+}
+#endif
+ idle_inneri = true;
+break;
+ }
+ else
+ idle_inneri = false;
+
+ // EXTRA SOURCE DATA READ
+
+ if ((idle_inner && step && srcenx)
+ || (sreadx && !step))
+ {
+ sreadxi = true;
+ }
+ else
+ sreadxi = false;
+
+ // EXTRA SOURCE ZED READ
+
+ if ((sreadx && step && srcenz)
+ || (szreadx && !step))
+ {
+ szreadxi = true;
+ }
+ else
+ szreadxi = false;
+
+ // TEXTURE DATA READ (not implemented because not in Jaguar I)
+
+ // SOURCE DATA READ
+
+ if ((szreadx && step && !textext)
+ || (sreadx && step && !srcenz && srcen)
+ || (idle_inner && step && !srcenx && !textext && srcen)
+ || (dzwrite && step && !inner0 && !textext && srcen)
+ || (dwrite && step && !dstwrz && !inner0 && !textext && srcen)
+ || (txtread && step && srcen)
+ || (sread && !step))
+ {
+ sreadi = true;
+ }
+ else
+ sreadi = false;
+
+ // SOURCE ZED READ
+
+ if ((sread && step && srcenz)
+ || (szread && !step))
+ {
+ szreadi = true;
+ }
+ else
+ szreadi = false;
+
+ // DESTINATION DATA READ
+
+ if ((szread && step && dsten)
+ || (sread && step && !srcenz && dsten)
+ || (sreadx && step && !srcenz && !textext && !srcen && dsten)
+ || (idle_inner && step && !srcenx && !textext && !srcen && dsten)
+ || (dzwrite && step && !inner0 && !textext && !srcen && dsten)
+ || (dwrite && step && !dstwrz && !inner0 && !textext && !srcen && dsten)
+ || (txtread && step && !srcen && dsten)
+ || (dread && !step))
+ {
+ dreadi = true;
+ }
+ else
+ dreadi = false;
+
+ // DESTINATION ZED READ
+
+ if ((dread && step && dstenz)
+ || (szread && step && !dsten && dstenz)
+ || (sread && step && !srcenz && !dsten && dstenz)
+ || (sreadx && step && !srcenz && !textext && !srcen && !dsten && dstenz)
+ || (idle_inner && step && !srcenx && !textext && !srcen && !dsten && dstenz)
+ || (dzwrite && step && !inner0 && !textext && !srcen && !dsten && dstenz)
+ || (dwrite && step && !dstwrz && !inner0 && !textext && !srcen && !dsten && dstenz)
+ || (txtread && step && !srcen && !dsten && dstenz)
+ || (dzread && !step))
+ {
+ dzreadi = true;
+ }
+ else
+ dzreadi = false;
+
+ // DESTINATION DATA WRITE
+
+ if ((dzread && step)
+ || (dread && step && !dstenz)
+ || (szread && step && !dsten && !dstenz)
+ || (sread && step && !srcenz && !dsten && !dstenz)
+ || (txtread && step && !srcen && !dsten && !dstenz)
+ || (sreadx && step && !srcenz && !textext && !srcen && !dsten && !dstenz)
+ || (idle_inner && step && !srcenx && !textext && !srcen && !dsten && !dstenz)
+ || (dzwrite && step && !inner0 && !textext && !srcen && !dsten && !dstenz)
+ || (dwrite && step && !dstwrz && !inner0 && !textext && !srcen && !dsten && !dstenz)
+ || (dwrite && !step))
+ {
+ dwritei = true;
+ }
+ else
+ dwritei = false;
+
+ // DESTINATION ZED WRITE
+
+ if ((dzwrite && !step)
+ || (dwrite && step && dstwrz))
+ {
+ dzwritei = true;
+ }
+ else
+ dzwritei = false;
+
+//Kludge: A QnD way to make sure that sshftld is asserted only for the first
+// cycle of the inner loop...
+sshftld = idle_inner;
+
+// Here we move the fooi into their foo counterparts in order to simulate the moving
+// of data into the various FDSYNCs... Each time we loop we simulate one clock cycle...
+
+ idle_inner = idle_inneri;
+ sreadx = sreadxi;
+ szreadx = szreadxi;
+ sread = sreadi;
+ szread = szreadi;
+ dread = dreadi;
+ dzread = dzreadi;
+ dwrite = dwritei;
+ dzwrite = dzwritei;
+
+// Here's a few more decodes--not sure if they're supposed to go here or not...
+
+ bool srca_addi = (sreadxi && !srcenz) || (sreadi && !srcenz) || szreadxi || szreadi;
+
+ bool dsta_addi = (dwritei && !dstwrz) || dzwritei;
+
+ bool gensrc = sreadxi || szreadxi || sreadi || szreadi;
+ bool gendst = dreadi || dzreadi || dwritei || dzwritei;
+ bool gena2i = (gensrc && !dsta2) || (gendst && dsta2);
+
+ bool zaddr = szreadx || szread || dzread || dzwrite;
+
+// Some stuff from MCONTROL.NET--not sure if this is the correct use of this decode or not...
+/*Fontread\ := OND1 (fontread\, sread[1], sreadx[1], bcompen);
+Fontread := INV1 (fontread, fontread\);
+Justt := NAN3 (justt, fontread\, phrase_mode, tactive\);
+Justify := TS (justify, justt, busen);*/
+bool fontread = (sread || sreadx) && bcompen;
+bool justify = !(!fontread && phrase_mode /*&& tactive*/);
+
+/* Generate inner loop update enables */
+/*
+A1_addi := MX2 (a1_addi, dsta_addi, srca_addi, dsta2);
+A2_addi := MX2 (a2_addi, srca_addi, dsta_addi, dsta2);
+A1_add := FD1 (a1_add, a1_add\, a1_addi, clk);
+A2_add := FD1 (a2_add, a2_add\, a2_addi, clk);
+A2_addb := BUF1 (a2_addb, a2_add);
+*/
+ bool a1_add = (dsta2 ? srca_addi : dsta_addi);
+ bool a2_add = (dsta2 ? dsta_addi : srca_addi);
+
+/* Address adder input A register selection
+000 A1 step integer part
+001 A1 step fraction part
+010 A1 increment integer part
+011 A1 increment fraction part
+100 A2 step
+
+bit 2 = a2update
+bit 1 = /a2update . (a1_add . a1addx[0..1])
+bit 0 = /a2update . ( a1fupdate
+ + a1_add . atick[0] . a1addx[0..1])
+The /a2update term on bits 0 and 1 is redundant.
+Now look-ahead based
+*/
+ uint8 addasel = (a1fupdate || (a1_add && a1addx == 3) ? 0x01 : 0x00);
+ addasel |= (a1_add && a1addx == 3 ? 0x02 : 0x00);
+ addasel |= (a2update ? 0x04 : 0x00);
+/* Address adder input A X constant selection
+adda_xconst[0..2] generate a power of 2 in the range 1-64 or all
+zeroes when they are all 1
+Remember - these are pixels, so to add one phrase the pixel size
+has to be taken into account to get the appropriate value.
+for A1
+ if a1addx[0..1] are 00 set 6 - pixel size
+ if a1addx[0..1] are 01 set the value 000
+ if a1addx[0..1] are 10 set the value 111
+similarly for A2
+JLH: Also, 11 will likewise set the value to 111
+*/
+ uint8 a1_xconst = 6 - a1_pixsize, a2_xconst = 6 - a2_pixsize;
+
+ if (a1addx == 1)
+ a1_xconst = 0;
+ else if (a1addx & 0x02)
+ a1_xconst = 7;
+
+ if (a2addx == 1)
+ a2_xconst = 0;
+ else if (a2addx & 0x02)
+ a2_xconst = 7;
+
+ uint8 adda_xconst = (a2_add ? a2_xconst : a1_xconst);
+/* Address adder input A Y constant selection
+22 June 94 - This was erroneous, because only the a1addy bit was reflected here.
+Therefore, the selection has to be controlled by a bug fix bit.
+JLH: Bug fix bit in Jaguar II--not in Jaguar I!
+*/
+ bool adda_yconst = a1addy;
+/* Address adder input A register versus constant selection
+given by a1_add . a1addx[0..1]
+ + a1update
+ + a1fupdate
+ + a2_add . a2addx[0..1]
+ + a2update
+*/
+ bool addareg = ((a1_add && a1addx == 3) || a1update || a1fupdate
+ || (a2_add && a2addx == 3) || a2update ? true : false);
+/* The adders can be put into subtract mode in add pixel size
+mode when the corresponding flags are set */
+ bool suba_x = ((a1_add && a1xsign && a1addx == 1) || (a2_add && a2xsign && a2addx == 1) ? true : false);
+ bool suba_y = ((a1_add && a1addy && a1ysign) || (a2_add && a2addy && a2ysign) ? true : false);
+/* Address adder input B selection
+00 A1 pointer
+01 A2 pointer
+10 A1 fraction
+11 Zero
+
+Bit 1 = a1fupdate
+ + (a1_add . atick[0] . a1addx[0..1])
+ + a1fupdate . a1_stepld
+ + a1update . a1_stepld
+ + a2update . a2_stepld
+Bit 0 = a2update + a2_add
+ + a1fupdate . a1_stepld
+ + a1update . a1_stepld
+ + a2update . a2_stepld
+*/
+ uint8 addbsel = (a2update || a2_add || (a1fupdate && a1_stepld)
+ || (a1update && a1_stepld) || (a2update && a2_stepld) ? 0x01 : 0x00);
+ addbsel |= (a1fupdate || (a1_add && a1addx == 3) || (a1fupdate && a1_stepld)
+ || (a1update && a1_stepld) || (a2update && a2_stepld) ? 0x02 : 0x00);
+
+/* The modulo bits are used to align X onto a phrase boundary when
+it is being updated by one phrase
+000 no mask
+001 mask bit 0
+010 mask bits 1-0
+..
+110 mask bits 5-0
+
+Masking is enabled for a1 when a1addx[0..1] is 00, and the value
+is 6 - the pixel size (again!)
+*/
+ uint8 maska1 = (a1_add && a1addx == 0 ? 6 - a1_pixsize : 0);
+ uint8 maska2 = (a2_add && a2addx == 0 ? 6 - a2_pixsize : 0);
+ uint8 modx = (a2_add ? maska2 : maska1);
+/* Generate load strobes for the increment updates */
+
+/*A1pldt := NAN2 (a1pldt, atick[1], a1_add);
+A1ptrldi := NAN2 (a1ptrldi, a1update\, a1pldt);
+
+A1fldt := NAN4 (a1fldt, atick[0], a1_add, a1addx[0..1]);
+A1fracldi := NAN2 (a1fracldi, a1fupdate\, a1fldt);
+
+A2pldt := NAN2 (a2pldt, atick[1], a2_add);
+A2ptrldi := NAN2 (a2ptrldi, a2update\, a2pldt);*/
+ bool a1fracldi = a1fupdate || (a1_add && a1addx == 3);
+
+// Some more from DCONTROL...
+// atick[] just MAY be important here! We're assuming it's true and dropping the term...
+// That will probably screw up some of the lower terms that seem to rely on the timing of it...
+#warning srcdreadd is not properly initialized!
+bool srcdreadd = false; // Set in INNER.NET
+//Shadeadd\ := NAN2H (shadeadd\, dwrite, srcshade);
+//Shadeadd := INV2 (shadeadd, shadeadd\);
+bool shadeadd = dwrite && srcshade;
+/* Data adder control, input A selection
+000 Destination data
+001 Initialiser pixel value
+100 Source data - computed intensity fraction
+101 Pattern data - computed intensity
+110 Source zed 1 - computed zed
+111 Source zed 2 - computed zed fraction
+
+Bit 0 = dwrite . gourd . atick[1]
+ + dzwrite . gourz . atick[0]
+ + istepadd
+ + zstepfadd
+ + init_if + init_ii + init_zf + init_zi
+Bit 1 = dzwrite . gourz . (atick[0] + atick[1])
+ + zstepadd
+ + zstepfadd
+Bit 2 = (gourd + gourz) . /(init_if + init_ii + init_zf + init_zi)
+ + dwrite . srcshade
+*/
+uint8 daddasel = ((dwrite && gourd) || (dzwrite && gourz) || istepadd || zstepfadd
+ || init_if || init_ii || init_zf || init_zi ? 0x01 : 0x00);
+daddasel |= ((dzwrite && gourz) || zstepadd || zstepfadd ? 0x02 : 0x00);
+daddasel |= (((gourd || gourz) && !(init_if || init_ii || init_zf || init_zi))
+ || (dwrite && srcshade) ? 0x04 : 0x00);
+/* Data adder control, input B selection
+0000 Source data
+0001 Data initialiser increment
+0100 Bottom 16 bits of I increment repeated four times
+0101 Top 16 bits of I increment repeated four times
+0110 Bottom 16 bits of Z increment repeated four times
+0111 Top 16 bits of Z increment repeated four times
+1100 Bottom 16 bits of I step repeated four times
+1101 Top 16 bits of I step repeated four times
+1110 Bottom 16 bits of Z step repeated four times
+1111 Top 16 bits of Z step repeated four times
+
+Bit 0 = dwrite . gourd . atick[1]
+ + dzwrite . gourz . atick[1]
+ + dwrite . srcshade
+ + istepadd
+ + zstepadd
+ + init_if + init_ii + init_zf + init_zi
+Bit 1 = dzwrite . gourz . (atick[0] + atick[1])
+ + zstepadd
+ + zstepfadd
+Bit 2 = dwrite . gourd . (atick[0] + atick[1])
+ + dzwrite . gourz . (atick[0] + atick[1])
+ + dwrite . srcshade
+ + istepadd + istepfadd + zstepadd + zstepfadd
+Bit 3 = istepadd + istepfadd + zstepadd + zstepfadd
+*/
+uint8 daddbsel = ((dwrite && gourd) || (dzwrite && gourz) || (dwrite && srcshade)
+ || istepadd || zstepadd || init_if || init_ii || init_zf || init_zi ? 0x01 : 0x00);
+daddbsel |= ((dzwrite && gourz) || zstepadd || zstepfadd ? 0x02 : 0x00);
+daddbsel |= ((dwrite && gourd) || (dzwrite && gourz) || (dwrite && srcshade)
+ || istepadd || istepfadd || zstepadd || zstepfadd ? 0x04 : 0x00);
+daddbsel |= (istepadd && istepfadd && zstepadd && zstepfadd ? 0x08 : 0x00);
+/* Data adder mode control
+000 16-bit normal add
+001 16-bit saturating add with carry
+010 8-bit saturating add with carry, carry into top byte is
+ inhibited (YCrCb)
+011 8-bit saturating add with carry, carry into top byte and
+ between top nybbles is inhibited (CRY)
+100 16-bit normal add with carry
+101 16-bit saturating add
+110 8-bit saturating add, carry into top byte is inhibited
+111 8-bit saturating add, carry into top byte and between top
+ nybbles is inhibited
+
+The first five are used for Gouraud calculations, the latter three
+for adding source and destination data
+
+Bit 0 = dzwrite . gourz . atick[1]
+ + dwrite . gourd . atick[1] . /topnen . /topben . /ext_int
+ + dwrite . gourd . atick[1] . topnen . topben . /ext_int
+ + zstepadd
+ + istepadd . /topnen . /topben . /ext_int
+ + istepadd . topnen . topben . /ext_int
+ + /gourd . /gourz . /topnen . /topben
+ + /gourd . /gourz . topnen . topben
+ + shadeadd . /topnen . /topben
+ + shadeadd . topnen . topben
+ + init_ii . /topnen . /topben . /ext_int
+ + init_ii . topnen . topben . /ext_int
+ + init_zi
+
+Bit 1 = dwrite . gourd . atick[1] . /topben . /ext_int
+ + istepadd . /topben . /ext_int
+ + /gourd . /gourz . /topben
+ + shadeadd . /topben
+ + init_ii . /topben . /ext_int
+
+Bit 2 = /gourd . /gourz
+ + shadeadd
+ + dwrite . gourd . atick[1] . ext_int
+ + istepadd . ext_int
+ + init_ii . ext_int
+*/
+uint8 daddmode = ((dzwrite && gourz) || (dwrite && gourd && !topnen && !topben && !ext_int)
+ || (dwrite && gourd && topnen && topben && !ext_int) || zstepadd
+ || (istepadd && !topnen && !topben && !ext_int)
+ || (istepadd && topnen && topben && !ext_int) || (!gourd && !gourz && !topnen && !topben)
+ || (!gourd && !gourz && topnen && topben) || (shadeadd && !topnen && !topben)
+ || (shadeadd && topnen && topben) || (init_ii && !topnen && !topben && !ext_int)
+ || (init_ii && topnen && topben && !ext_int) || init_zi ? 0x01 : 0x00);
+daddmode |= ((dwrite && gourd && !topben && !ext_int) || (istepadd && !topben && !ext_int)
+ || (!gourd && !gourz && !topben) || (shadeadd && !topben)
+ || (init_ii && !topben && !ext_int) ? 0x02 : 0x00);
+daddmode |= ((!gourd && !gourz) || shadeadd || (dwrite && gourd && ext_int)
+ || (istepadd && ext_int) || (init_ii && ext_int) ? 0x04 : 0x00);
+/* Data add load controls
+Pattern fraction (dest data) is loaded on
+ dwrite . gourd . atick[0]
+ + istepfadd . /datinit
+ + init_if
+Pattern data is loaded on
+ dwrite . gourd . atick[1]
+ + istepadd . /datinit . /datinit
+ + init_ii
+Source z1 is loaded on
+ dzwrite . gourz . atick[1]
+ + zstepadd . /datinit . /datinit
+ + init_zi
+Source z2 is loaded on
+ dzwrite . gourz . atick[0]
+ + zstepfadd
+ + init_zf
+Texture map shaded data is loaded on
+ srcdreadd . srcshade
+*/
+bool patfadd = (dwrite && gourd) || (istepfadd && !datinit) || init_if;
+bool patdadd = (dwrite && gourd) || (istepadd && !datinit) || init_ii;
+bool srcz1add = (dzwrite && gourz) || (zstepadd && !datinit) || init_zi;
+bool srcz2add = (dzwrite && gourz) || zstepfadd || init_zf;
+bool srcshadd = srcdreadd && srcshade;
+bool daddq_sel = patfadd || patdadd || srcz1add || srcz2add || srcshadd;
+/* Select write data
+This has to be controlled from stage 1 of the pipe-line, delayed
+by one tick, as the write occurs in the cycle after the ack.
+
+00 pattern data
+01 lfu data
+10 adder output
+11 source zed
+
+Bit 0 = /patdsel . /adddsel
+ + dzwrite1d
+Bit 1 = adddsel
+ + dzwrite1d
+*/
+uint8 data_sel = ((!patdsel && !adddsel) || dzwrite ? 0x01 : 0x00)
+ | (adddsel || dzwrite ? 0x02 : 0x00);
+
+uint32 address, pixAddr;
+ADDRGEN(address, pixAddr, gena2i, zaddr,
+ a1_x, a1_y, a1_base, a1_pitch, a1_pixsize, a1_width, a1_zoffset,
+ a2_x, a2_y, a2_base, a2_pitch, a2_pixsize, a2_width, a2_zoffset);
+
+//Here's my guess as to how the addresses get truncated to phrase boundaries in phrase mode...
+if (!justify)
+ address &= 0xFFFFF8;
+
+/* Generate source alignment shift
+ -------------------------------
+The source alignment shift for data move is the difference between
+the source and destination X pointers, multiplied by the pixel
+size. Only the low six bits of the pointers are of interest, as
+pixel sizes are always a power of 2 and window rows are always
+phrase aligned.
+
+When not in phrase mode, the top 3 bits of the shift value are
+set to zero (2/26).
+
+Source shifting is also used to extract bits for bit-to-byte
+expansion in phrase mode. This involves only the bottom three
+bits of the shift value, and is based on the offset within the
+phrase of the destination X pointer, in pixels.
+
+Source shifting is disabled when srcen is not set.
+*/
+uint8 dstxp = (dsta2 ? a2_x : a1_x) & 0x3F;
+uint8 srcxp = (dsta2 ? a1_x : a2_x) & 0x3F;
+uint8 shftv = ((dstxp - srcxp) << pixsize) & 0x3F;
+/* The phrase mode alignment count is given by the phrase offset
+of the first pixel, for bit to byte expansion */
+uint8 pobb = 0;
+
+if (pixsize == 3)
+ pobb = dstxp & 0x07;
+if (pixsize == 4)
+ pobb = dstxp & 0x03;
+if (pixsize == 5)
+ pobb = dstxp & 0x01;
+
+bool pobbsel = phrase_mode && bcompen;
+uint8 loshd = (pobbsel ? pobb : shftv) & 0x07;
+uint8 shfti = (srcen || pobbsel ? (sshftld ? loshd : srcshift & 0x07) : 0);
+/* Enable for high bits is srcen . phrase_mode */
+shfti |= (srcen && phrase_mode ? (sshftld ? shftv & 0x38 : srcshift & 0x38) : 0);
+srcshift = shfti;
+
+ if (sreadx)
+ {
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Entering SREADX state...");
+//printf(" [dstart=%X dend=%X pwidth=%X srcshift=%X]\n", dstart, dend, pwidth, srcshift);
+fflush(stdout);
+}
+#endif
+//uint32 srcAddr, pixAddr;
+//ADDRGEN(srcAddr, pixAddr, gena2i, zaddr,
+// a1_x, a1_y, a1_base, a1_pitch, a1_pixsize, a1_width, a1_zoffset,
+// a2_x, a2_y, a2_base, a2_pitch, a2_pixsize, a2_width, a2_zoffset);
+ srcd2 = srcd1;
+ srcd1 = ((uint64)JaguarReadLong(address + 0, BLITTER) << 32)
+ | (uint64)JaguarReadLong(address + 4, BLITTER);
+//Kludge to take pixel size into account...
+//Hmm. If we're not in phrase mode, this is most likely NOT going to be used...
+//Actually, it would be--because of BCOMPEN expansion, for example...
+if (!phrase_mode)
+{
+ if (bcompen)
+ srcd1 >>= 56;
+ else
+ {
+ if (pixsize == 5)
+ srcd1 >>= 32;
+ else if (pixsize == 4)
+ srcd1 >>= 48;
+ else
+ srcd1 >>= 56;
+ }
+}//*/
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Source extra read address/pix address: %08X/%1X [%08X%08X]\n", address, pixAddr,
+ (uint32)(srcd1 >> 32), (uint32)(srcd1 & 0xFFFFFFFF));
+fflush(stdout);
+}
+#endif
+ }
+
+ if (szreadx)
+ {
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Entering SZREADX state...");
+fflush(stdout);
+}
+#endif
+ srcz2 = srcz1;
+ srcz1 = ((uint64)JaguarReadLong(address, BLITTER) << 32) | (uint64)JaguarReadLong(address + 4, BLITTER);
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+ printf(" Src Z extra read address/pix address: %08X/%1X [%08X%08X]\n", address, pixAddr,
+ (uint32)(dstz >> 32), (uint32)(dstz & 0xFFFFFFFF));
+ fflush(stdout);
+}
+#endif
+ }
+
+ if (sread)
+ {
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Entering SREAD state...");
+//printf(" [dstart=%X dend=%X pwidth=%X srcshift=%X]\n", dstart, dend, pwidth, srcshift);
+fflush(stdout);
+}
+#endif
+//uint32 srcAddr, pixAddr;
+//ADDRGEN(srcAddr, pixAddr, gena2i, zaddr,
+// a1_x, a1_y, a1_base, a1_pitch, a1_pixsize, a1_width, a1_zoffset,
+// a2_x, a2_y, a2_base, a2_pitch, a2_pixsize, a2_width, a2_zoffset);
+srcd2 = srcd1;
+srcd1 = ((uint64)JaguarReadLong(address, BLITTER) << 32) | (uint64)JaguarReadLong(address + 4, BLITTER);
+//Kludge to take pixel size into account...
+if (!phrase_mode)
+{
+ if (bcompen)
+ srcd1 >>= 56;
+ else
+ {
+ if (pixsize == 5)
+ srcd1 >>= 32;
+ else if (pixsize == 4)
+ srcd1 >>= 48;
+ else
+ srcd1 >>= 56;
+ }
+}
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Source read address/pix address: %08X/%1X [%08X%08X]\n", address, pixAddr,
+ (uint32)(srcd1 >> 32), (uint32)(srcd1 & 0xFFFFFFFF));
+fflush(stdout);
+}
+#endif
+ }
+
+ if (szread)
+ {
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Entering SZREAD state...");
+fflush(stdout);
+}
+#endif
+ srcz2 = srcz1;
+ srcz1 = ((uint64)JaguarReadLong(address, BLITTER) << 32) | (uint64)JaguarReadLong(address + 4, BLITTER);
+//Kludge to take pixel size into account... I believe that it only has to take 16BPP mode into account. Not sure tho.
+if (!phrase_mode && pixsize == 4)
+ srcz1 >>= 48;
+
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+ printf(" Src Z read address/pix address: %08X/%1X [%08X%08X]\n", address, pixAddr,
+ (uint32)(dstz >> 32), (uint32)(dstz & 0xFFFFFFFF));
+ fflush(stdout);
+}
+#endif
+ }
+
+ if (dread)
+ {
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Entering DREAD state...");
+fflush(stdout);
+}
+#endif
+//uint32 dstAddr, pixAddr;
+//ADDRGEN(dstAddr, pixAddr, gena2i, zaddr,
+// a1_x, a1_y, a1_base, a1_pitch, a1_pixsize, a1_width, a1_zoffset,
+// a2_x, a2_y, a2_base, a2_pitch, a2_pixsize, a2_width, a2_zoffset);
+dstd = ((uint64)JaguarReadLong(address, BLITTER) << 32) | (uint64)JaguarReadLong(address + 4, BLITTER);
+//Kludge to take pixel size into account...
+if (!phrase_mode)
+{
+ if (pixsize == 5)
+ dstd >>= 32;
+ else if (pixsize == 4)
+ dstd >>= 48;
+ else
+ dstd >>= 56;
+}
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Dest read address/pix address: %08X/%1X [%08X%08X]\n", address, pixAddr,
+ (uint32)(dstd >> 32), (uint32)(dstd & 0xFFFFFFFF));
+fflush(stdout);
+}
+#endif
+ }
+
+ if (dzread)
+ {
+// Is Z always 64 bit read? Or sometimes 16 bit (dependent on phrase_mode)?
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+ printf(" Entering DZREAD state...");
+ fflush(stdout);
+}
+#endif
+ dstz = ((uint64)JaguarReadLong(address, BLITTER) << 32) | (uint64)JaguarReadLong(address + 4, BLITTER);
+//Kludge to take pixel size into account... I believe that it only has to take 16BPP mode into account. Not sure tho.
+if (!phrase_mode && pixsize == 4)
+ dstz >>= 48;
+
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+ printf(" Dest Z read address/pix address: %08X/%1X [%08X%08X]\n", address, pixAddr,
+ (uint32)(dstz >> 32), (uint32)(dstz & 0xFFFFFFFF));
+ fflush(stdout);
+}
+#endif
+ }
+
+// These vars should probably go further up in the code... !!! FIX !!!
+// We can't preassign these unless they're static...
+//uint64 srcz = 0; // These are assigned to shut up stupid compiler warnings--dwrite is ALWAYS asserted
+//bool winhibit = false;
+uint64 srcz;
+bool winhibit;
+//NOTE: SRCSHADE requires GOURZ to be set to work properly--another Jaguar I bug
+ if (dwrite)
+ {
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Entering DWRITE state...");
+fflush(stdout);
+}
+#endif
+//Counter is done on the dwrite state...! (We'll do it first, since it affects dstart/dend calculations.)
+//Here's the voodoo for figuring the correct amount of pixels in phrase mode (or not):
+ int8 inct = -((dsta2 ? a2_x : a1_x) & 0x07); // From INNER_CNT
+ uint8 inc = 0;
+ inc = (!phrase_mode || (phrase_mode && (inct & 0x01)) ? 0x01 : 0x00);
+ inc |= (phrase_mode && (((pixsize == 3 || pixsize == 4) && (inct & 0x02)) || pixsize == 5 && !(inct & 0x01)) ? 0x02 : 0x00);
+ inc |= (phrase_mode && ((pixsize == 3 && (inct & 0x04)) || (pixsize == 4 && !(inct & 0x03))) ? 0x04 : 0x00);
+ inc |= (phrase_mode && pixsize == 3 && !(inct & 0x07) ? 0x08 : 0x00);
+
+ uint16 oldicount = icount; // Save icount to detect underflow...
+ icount -= inc;
+
+ if (icount == 0 || ((icount & 0x8000) && !(oldicount & 0x8000)))
+ inner0 = true;
+// X/Y stepping is also done here, I think...No. It's done when a1_add or a2_add is asserted...
+
+//*********************************************************************************
+//Start & end write mask computations...
+//*********************************************************************************
+
+uint8 dstart = 0;
+
+if (pixsize == 3)
+ dstart = (dstxp & 0x07) << 3;
+if (pixsize == 4)
+ dstart = (dstxp & 0x03) << 4;
+if (pixsize == 5)
+ dstart = (dstxp & 0x01) << 5;
+
+dstart = (phrase_mode ? dstart : pixAddr & 0x07);
+
+//This is the other Jaguar I bug... Normally, should ALWAYS select a1_x here.
+uint16 dstxwr = (dsta2 ? a2_x : a1_x) & 0x7FFE;
+uint16 pseq = dstxwr ^ (a1_win_x & 0x7FFE);
+pseq = (pixsize == 5 ? pseq : pseq & 0x7FFC);
+pseq = ((pixsize & 0x06) == 4 ? pseq : pseq & 0x7FF8);
+bool penden = clip_a1 && (pseq == 0);
+uint8 window_mask = 0;
+
+if (pixsize == 3)
+ window_mask = (a1_win_x & 0x07) << 3;
+if (pixsize == 4)
+ window_mask = (a1_win_x & 0x03) << 4;
+if (pixsize == 5)
+ window_mask = (a1_win_x & 0x01) << 5;
+
+window_mask = (penden ? window_mask : 0);
+
+/*
+ Entering SREADX state... [dstart=0 dend=20 pwidth=8 srcshift=20]
+ Source extra read address/pix address: 000095D0/0 [000004E40000001C]
+ Entering A2_ADD state [a2_x=0002, a2_y=0000, addasel=0, addbsel=1, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering SREAD state... [dstart=0 dend=20 pwidth=8 srcshift=20]
+ Source read address/pix address: 000095D8/0 [0054003800009814]
+ Entering A2_ADD state [a2_x=0004, a2_y=0000, addasel=0, addbsel=1, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering DWRITE state...
+ Dest write address/pix address: 00037290/0 [dstart=0 dend=20 pwidth=8 srcshift=20][daas=0 dabs=0 dam=7 ds=1 daq=F] [0000001C00000000] (icount=026E, inc=4)
+ Entering A1_ADD state [a1_x=0000, a1_y=0000, addasel=0, addbsel=0, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+
+(icount=026E, inc=4)
+icount & 0x03 = 0x02
+ << 4 = 0x20
+
+window_mask = 0x1000
+
+Therefore, it chooses the inner_mask over the window_mask every time! Argh!
+This is because we did this wrong:
+Innerm[3-5] := AN2 (inner_mask[3-5], imb[3-5], inner0);
+NOTE! This doesn't fix the problem because inner0 is asserted too late to help here. !!! FIX !!! [Should be DONE]
+*/
+
+/* The mask to be used if within one phrase of the end of the inner
+loop, similarly */
+uint8 inner_mask = 0;
+
+if (pixsize == 3)
+ inner_mask = (icount & 0x07) << 3;
+if (pixsize == 4)
+ inner_mask = (icount & 0x03) << 4;
+if (pixsize == 5)
+ inner_mask = (icount & 0x01) << 5;
+if (!inner0)
+ inner_mask = 0;
+/* The actual mask used should be the lesser of the window masks and
+the inner mask, where is all cases 000 means 1000. */
+window_mask = (window_mask == 0 ? 0x40 : window_mask);
+inner_mask = (inner_mask == 0 ? 0x40 : inner_mask);
+uint8 emask = (window_mask > inner_mask ? inner_mask : window_mask);
+/* The mask to be used for the pixel size, to which must be added
+the bit offset */
+uint8 pma = pixAddr + (1 << pixsize);
+/* Select the mask */
+uint8 dend = (phrase_mode ? emask : pma);
+
+/* The cycle width in phrase mode is normally one phrase. However,
+at the start and end it may be narrower. The start and end masks
+are used to generate this. The width is given by:
+
+ 8 - start mask - (8 - end mask)
+= end mask - start mask
+
+This is only used for writes in phrase mode.
+Start and end from the address level of the pipeline are used.
+*/
+uint8 pwidth = (((dend | dstart) & 0x07) == 0 ? 0x08 : (dend - dstart) & 0x07);
+
+//uint32 dstAddr, pixAddr;
+//ADDRGEN(dstAddr, pixAddr, gena2i, zaddr,
+// a1_x, a1_y, a1_base, a1_pitch, a1_pixsize, a1_width, a1_zoffset,
+// a2_x, a2_y, a2_base, a2_pitch, a2_pixsize, a2_width, a2_zoffset);
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+ printf(" Dest write address/pix address: %08X/%1X", address, pixAddr);
+ fflush(stdout);
+}
+#endif
+
+//More testing... This is almost certainly wrong, but how else does this work???
+//Seems to kinda work... But still, this doesn't seem to make any sense!
+if (phrase_mode && !dsten)
+ dstd = ((uint64)JaguarReadLong(address, BLITTER) << 32) | (uint64)JaguarReadLong(address + 4, BLITTER);
+
+//Testing only... for now...
+//This is wrong because the write data is a combination of srcd and dstd--either run
+//thru the LFU or in PATDSEL or ADDDSEL mode. [DONE now, thru DATA module]
+// Precedence is ADDDSEL > PATDSEL > LFU.
+//Also, doesn't take into account the start & end masks, or the phrase width...
+//Now it does!
+
+// srcd2 = xxxx xxxx 0123 4567, srcd = 8901 2345 xxxx xxxx, srcshift = $20 (32)
+uint64 srcd = (srcd2 << (64 - srcshift)) | (srcd1 >> srcshift);
+//bleh, ugly ugly ugly
+if (srcshift == 0)
+ srcd = srcd1;
+
+//NOTE: This only works with pixel sizes less than 8BPP...
+//DOUBLE NOTE: Still need to do regression testing to ensure that this doesn't break other stuff... !!! CHECK !!!
+if (!phrase_mode && srcshift != 0)
+ srcd = ((srcd2 & 0xFF) << (8 - srcshift)) | ((srcd1 & 0xFF) >> srcshift);
+
+//Z DATA() stuff done here... And it has to be done before any Z shifting....
+//Note that we need to have phrase mode start/end support here... (Not since we moved it from dzwrite...!)
+/*
+Here are a couple of Cybermorph blits with Z:
+$00113078 // DSTEN DSTENZ DSTWRZ CLIP_A1 GOURD GOURZ PATDSEL ZMODE=4
+$09900F39 // SRCEN DSTEN DSTENZ DSTWRZ UPDA1 UPDA1F UPDA2 DSTA2 ZMODE=4 LFUFUNC=C DCOMPEN
+
+We're having the same phrase mode overwrite problem we had with the pixels.... !!! FIX !!!
+Odd. It's equating 0 with 0... Even though ZMODE is $04 (less than)!
+*/
+if (gourz)
+{
+/*
+void ADDARRAY(uint16 * addq, uint8 daddasel, uint8 daddbsel, uint8 daddmode,
+ uint64 dstd, uint32 iinc, uint8 initcin[], uint64 initinc, uint16 initpix,
+ uint32 istep, uint64 patd, uint64 srcd, uint64 srcz1, uint64 srcz2,
+ uint32 zinc, uint32 zstep)
+*/
+ uint16 addq[4];
+ uint8 initcin[4] = { 0, 0, 0, 0 };
+ ADDARRAY(addq, 7/*daddasel*/, 6/*daddbsel*/, 0/*daddmode*/, 0, 0, initcin, 0, 0, 0, 0, 0, srcz1, srcz2, zinc, 0);
+ srcz2 = ((uint64)addq[3] << 48) | ((uint64)addq[2] << 32) | ((uint64)addq[1] << 16) | (uint64)addq[0];
+ ADDARRAY(addq, 6/*daddasel*/, 7/*daddbsel*/, 1/*daddmode*/, 0, 0, initcin, 0, 0, 0, 0, 0, srcz1, srcz2, zinc, 0);
+ srcz1 = ((uint64)addq[3] << 48) | ((uint64)addq[2] << 32) | ((uint64)addq[1] << 16) | (uint64)addq[0];
+
+#if 0//def VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+ printf("\n[srcz1=%08X%08X, srcz2=%08X%08X, zinc=%08X",
+ (uint32)(srcz1 >> 32), (uint32)(srcz1 & 0xFFFFFFFF),
+ (uint32)(srcz2 >> 32), (uint32)(srcz2 & 0xFFFFFFFF), zinc);
+ fflush(stdout);
+}
+#endif
+}
+
+uint8 zSrcShift = srcshift & 0x30;
+srcz = (srcz2 << (64 - zSrcShift)) | (srcz1 >> zSrcShift);
+//bleh, ugly ugly ugly
+if (zSrcShift == 0)
+ srcz = srcz1;
+
+#if 0//def VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+ printf(" srcz=%08X%08X]\n", (uint32)(srcz >> 32), (uint32)(srcz & 0xFFFFFFFF));
+ fflush(stdout);
+}
+#endif
+
+//When in SRCSHADE mode, it adds the IINC to the read source (from LFU???)
+//According to following line, it gets LFU mode. But does it feed the source into the LFU
+//after the add?
+//Dest write address/pix address: 0014E83E/0 [dstart=0 dend=10 pwidth=8 srcshift=0][daas=4 dabs=5 dam=7 ds=1 daq=F] [0000000000006505] (icount=003F, inc=1)
+//Let's try this:
+if (srcshade)
+{
+//NOTE: This is basically doubling the work done by DATA--since this is what
+// ADDARRAY is loaded with when srschshade is enabled... !!! FIX !!!
+// Also note that it doesn't work properly unless GOURZ is set--there's the clue!
+ uint16 addq[4];
+ uint8 initcin[4] = { 0, 0, 0, 0 };
+ ADDARRAY(addq, 4/*daddasel*/, 5/*daddbsel*/, 7/*daddmode*/, dstd, iinc, initcin, 0, 0, 0, patd, srcd, 0, 0, 0, 0);
+ srcd = ((uint64)addq[3] << 48) | ((uint64)addq[2] << 32) | ((uint64)addq[1] << 16) | (uint64)addq[0];
+}
+//Seems to work... Not 100% sure tho.
+//end try this
+
+//Temporary kludge, to see if the fractional pattern does anything...
+//This works, BTW
+//But it seems to mess up in Cybermorph... the shading should be smooth but it isn't...
+//Seems the carry out is lost again... !!! FIX !!! [DONE--see below]
+if (patfadd)
+{
+ uint16 addq[4];
+ uint8 initcin[4] = { 0, 0, 0, 0 };
+ ADDARRAY(addq, 4/*daddasel*/, 4/*daddbsel*/, 0/*daddmode*/, dstd, iinc, initcin, 0, 0, 0, patd, srcd, 0, 0, 0, 0);
+ srcd1 = ((uint64)addq[3] << 48) | ((uint64)addq[2] << 32) | ((uint64)addq[1] << 16) | (uint64)addq[0];
+}
+
+//Note that we still don't take atick[0] & [1] into account here, so this will skip half of the data needed... !!! FIX !!!
+//Not yet enumerated: dbinh, srcdread, srczread
+//Also, should do srcshift on the z value in phrase mode... !!! FIX !!! [DONE]
+//As well as add a srcz variable we can set external to this state... !!! FIX !!! [DONE]
+
+uint64 wdata;
+uint8 dcomp, zcomp;
+DATA(wdata, dcomp, zcomp, winhibit,
+ true, cmpdst, daddasel, daddbsel, daddmode, daddq_sel, data_sel, 0/*dbinh*/,
+ dend, dstart, dstd, iinc, lfufunc, patd, patdadd,
+ phrase_mode, srcd, false/*srcdread*/, false/*srczread*/, srcz2add, zmode,
+ bcompen, bkgwren, dcompen, icount & 0x07, pixsize,
+ srcz, dstz, zinc);
+/*
+Seems that the phrase mode writes with DCOMPEN and DSTEN are corrupting inside of DATA: !!! FIX !!!
+It's fairly random as well. 7CFE -> 7DFE, 7FCA -> 78CA, 7FA4 -> 78A4, 7F88 -> 8F88
+It could be related to an uninitialized variable, like the zmode bug...
+[DONE]
+It was a bug in the dech38el data--it returned $FF for ungated instead of $00...
+
+Blit! (CMD = 09800609)
+Flags: SRCEN DSTEN UPDA1 UPDA2 LFUFUNC=C DCOMPEN
+ count = 10 x 12
+ a1_base = 00110000, a2_base = 0010B2A8
+ a1_x = 004B, a1_y = 00D8, a1_frac_x = 0000, a1_frac_y = 0000, a2_x = 0704, a2_y = 0000
+ a1_step_x = FFF3, a1_step_y = 0001, a1_stepf_x = 0000, a1_stepf_y = 0000, a2_step_x = FFFC, a2_step_y = 0000
+ a1_inc_x = 0000, a1_inc_y = 0000, a1_incf_x = 0000, a1_incf_y = 0000
+ a1_win_x = 0000, a1_win_y = 0000, a2_mask_x = 0000, a2_mask_y = 0000
+ a2_mask=F a1add=+phr/+0 a2add=+phr/+0
+ a1_pixsize = 4, a2_pixsize = 4
+ srcd=0000000000000000 dstd=0000000000000000 patd=0000000000000000 iinc=00000000
+ srcz1=0000000000000000 srcz2=0000000000000000 dstz=0000000000000000 zinc=00000000, coll=0
+ Phrase mode is ON
+ [in=T a1f=F a1=F zf=F z=F a2=F iif=F iii=F izf=F izi=F]
+ Entering INNER state...
+ Entering SREAD state... Source read address/pix address: 0010C0B0/0 [0000000078047804]
+ Entering A2_ADD state [a2_x=0704, a2_y=0000, addasel=0, addbsel=1, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering DREAD state...
+ Dest read address/pix address: 00197240/0 [0000000000000028]
+ Entering DWRITE state...
+ Dest write address/pix address: 00197240/0 [dstart=30 dend=40 pwidth=8 srcshift=30][daas=0 dabs=0 dam=7 ds=1 daq=F] [0000000000000028] (icount=0009, inc=1)
+ Entering A1_ADD state [a1_x=004B, a1_y=00D8, addasel=0, addbsel=0, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering SREAD state... Source read address/pix address: 0010C0B8/0 [7804780478047804]
+ Entering A2_ADD state [a2_x=0708, a2_y=0000, addasel=0, addbsel=1, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering DREAD state...
+ Dest read address/pix address: 00197260/0 [0028000000200008]
+ Entering DWRITE state...
+ Dest write address/pix address: 00197260/0 [dstart=0 dend=40 pwidth=8 srcshift=30][daas=0 dabs=0 dam=7 ds=1 daq=F] [0028780478047804] (icount=0005, inc=4)
+ Entering A1_ADD state [a1_x=004C, a1_y=00D8, addasel=0, addbsel=0, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering SREAD state... Source read address/pix address: 0010C0C0/0 [0000000000000000]
+ Entering A2_ADD state [a2_x=070C, a2_y=0000, addasel=0, addbsel=1, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering DREAD state...
+ Dest read address/pix address: 00197280/0 [0008001800180018]
+ Entering DWRITE state...
+ Dest write address/pix address: 00197280/0 [dstart=0 dend=40 pwidth=8 srcshift=30][daas=0 dabs=0 dam=7 ds=1 daq=F] [7804780478040018] (icount=0001, inc=4)
+ Entering A1_ADD state [a1_x=0050, a1_y=00D8, addasel=0, addbsel=0, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering SREAD state... Source read address/pix address: 0010C0C8/0 [000078047BFE7BFE]
+ Entering A2_ADD state [a2_x=0710, a2_y=0000, addasel=0, addbsel=1, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering DREAD state...
+ Dest read address/pix address: 001972A0/0 [0008002000000000]
+ Entering DWRITE state...
+ Dest write address/pix address: 001972A0/0 [dstart=0 dend=10 pwidth=8 srcshift=30][daas=0 dabs=0 dam=7 ds=1 daq=F] [0008002000000000] (icount=FFFD, inc=4)
+ Entering A1_ADD state [a1_x=0054, a1_y=00D8, addasel=0, addbsel=0, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering IDLE_INNER state...
+*/
+
+//Why isn't this taken care of in DATA? Because, DATA is modifying its local copy instead of the one used here.
+//!!! FIX !!! [DONE]
+//if (patdadd)
+// patd = wdata;
+
+//if (patfadd)
+// srcd1 = wdata;
+
+/*
+DEF ADDRCOMP (
+ a1_outside // A1 pointer is outside window bounds
+ :OUT;
+INT16/ a1_x
+INT16/ a1_y
+INT15/ a1_win_x
+INT15/ a1_win_y
+ :IN);
+BEGIN
+
+// The address is outside if negative, or if greater than or equal
+// to the window size
+
+A1_xcomp := MAG_15 (a1xgr, a1xeq, a1xlt, a1_x{0..14}, a1_win_x{0..14});
+A1_ycomp := MAG_15 (a1ygr, a1yeq, a1ylt, a1_y{0..14}, a1_win_y{0..14});
+A1_outside := OR6 (a1_outside, a1_x{15}, a1xgr, a1xeq, a1_y{15}, a1ygr, a1yeq);
+*/
+//NOTE: There seems to be an off-by-one bug here in the clip_a1 section... !!! FIX !!!
+// Actually, seems to be related to phrase mode writes...
+// Or is it? Could be related to non-15-bit compares as above?
+if (clip_a1 && ((a1_x & 0x8000) || (a1_y & 0x8000) || (a1_x >= a1_win_x) || (a1_y >= a1_win_y)))
+ winhibit = true;
+
+if (!winhibit)
+{
+ if (phrase_mode)
+ {
+ JaguarWriteLong(address + 0, wdata >> 32, BLITTER);
+ JaguarWriteLong(address + 4, wdata & 0xFFFFFFFF, BLITTER);
+ }
+ else
+ {
+ if (pixsize == 5)
+ JaguarWriteLong(address, wdata & 0xFFFFFFFF, BLITTER);
+ else if (pixsize == 4)
+ JaguarWriteWord(address, wdata & 0x0000FFFF, BLITTER);
+ else
+ JaguarWriteByte(address, wdata & 0x000000FF, BLITTER);
+ }
+}
+
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+ printf(" [%08X%08X]%s", (uint32)(wdata >> 32), (uint32)(wdata & 0xFFFFFFFF), (winhibit ? "[X]" : ""));
+ printf(" (icount=%04X, inc=%u)\n", icount, (uint16)inc);
+ printf(" [dstart=%X dend=%X pwidth=%X srcshift=%X]", dstart, dend, pwidth, srcshift);
+ printf("[daas=%X dabs=%X dam=%X ds=%X daq=%s]\n", daddasel, daddbsel, daddmode, data_sel, (daddq_sel ? "T" : "F"));
+ fflush(stdout);
+}
+#endif
+ }
+
+ if (dzwrite)
+ {
+// OK, here's the big insight: When NOT in GOURZ mode, srcz1 & 2 function EXACTLY the same way that
+// srcd1 & 2 work--there's an implicit shift from srcz1 to srcz2 whenever srcz1 is read.
+// OTHERWISE, srcz1 is the integer for the computed Z and srcz2 is the fractional part.
+// Writes to srcz1 & 2 follow the same pattern as the other 64-bit registers--low 32 at the low address,
+// high 32 at the high address (little endian!).
+// NOTE: GOURZ is still not properly supported. Check patd/patf handling...
+// Phrase mode start/end masks are not properly supported either...
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+ printf(" Entering DZWRITE state...");
+ printf(" Dest Z write address/pix address: %08X/%1X [%08X%08X]\n", address, pixAddr,
+ (uint32)(srcz >> 32), (uint32)(srcz & 0xFFFFFFFF));
+ fflush(stdout);
+}
+#endif
+//This is not correct... !!! FIX !!!
+//Should be OK now... We'll see...
+//Nope. Having the same starstep write problems in phrase mode as we had with pixels... !!! FIX !!!
+//This is not causing the problem in Hover Strike... :-/
+//The problem was with the SREADX not shifting. Still problems with Z comparisons & other text in pregame screen...
+if (!winhibit)
+{
+ if (phrase_mode)
+ {
+ JaguarWriteLong(address + 0, srcz >> 32, BLITTER);
+ JaguarWriteLong(address + 4, srcz & 0xFFFFFFFF, BLITTER);
+ }
+ else
+ {
+ if (pixsize == 4)
+ JaguarWriteWord(address, srcz & 0x0000FFFF, BLITTER);
+ }
+}//*/
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+// printf(" [%08X%08X]\n", (uint32)(srcz >> 32), (uint32)(srcz & 0xFFFFFFFF));
+// fflush(stdout);
+//printf(" [dstart=%X dend=%X pwidth=%X srcshift=%X]", dstart, dend, pwidth, srcshift);
+ printf(" [dstart=? dend=? pwidth=? srcshift=%X]", srcshift);
+ printf("[daas=%X dabs=%X dam=%X ds=%X daq=%s]\n", daddasel, daddbsel, daddmode, data_sel, (daddq_sel ? "T" : "F"));
+ fflush(stdout);
+}
+#endif
+ }
+
+/*
+This is because the address generator was using only 15 bits of the X when it should have
+used 16!
+
+There's a slight problem here: The X pointer isn't wrapping like it should when it hits
+the edge of the window... Notice how the X isn't reset at the edge of the window:
+
+Blit! (CMD = 00010000)
+Flags: PATDSEL
+ count = 160 x 261
+ a1_base = 000E8008, a2_base = 0001FA68
+ a1_x = 0000, a1_y = 0000, a1_frac_x = 0000, a1_frac_y = 0000, a2_x = 0000, a2_y = 0000
+ a1_step_x = 0000, a1_step_y = 0000, a1_stepf_x = 0000, a1_stepf_y = 0000, a2_step_x = 0000, a2_step_y = 0000
+ a1_inc_x = 0000, a1_inc_y = 0000, a1_incf_x = 0000, a1_incf_y = 0000
+ a1_win_x = 0000, a1_win_y = 0000, a2_mask_x = 0000, a2_mask_y = 0000
+ a2_mask=F a1add=+phr/+0 a2add=+phr/+0
+ a1_pixsize = 5, a2_pixsize = 5
+ srcd=7717771777177717 dstd=0000000000000000 patd=7730773077307730 iinc=00000000
+ srcz1=0000000000000000 srcz2=0000000000000000 dstz=0000000000000000 zinc=00000000, coll=0
+ Phrase mode is ON
+ [in=T a1f=F a1=F zf=F z=F a2=F iif=F iii=F izf=F izi=F]
+ Entering INNER state...
+ Entering DWRITE state... Dest write address/pix address: 000E8008/0 [7730773077307730] (icount=009E, inc=2)
+ srcz=0000000000000000][dcomp=AA zcomp=00 dbinh=00]
+[srcz=0000000000000000 dstz=0000000000000000 zwdata=0000000000000000 mask=7FFF]
+ [dstart=0 dend=40 pwidth=8 srcshift=0][daas=0 dabs=0 dam=7 ds=0 daq=F]
+ Entering A1_ADD state [a1_x=0000, a1_y=0000, addasel=0, addbsel=0, modx=1, addareg=F, adda_xconst=1, adda_yconst=0]...
+ Entering DWRITE state... Dest write address/pix address: 000E8018/0 [7730773077307730] (icount=009C, inc=2)
+ srcz=0000000000000000][dcomp=AA zcomp=00 dbinh=00]
+[srcz=0000000000000000 dstz=0000000000000000 zwdata=0000000000000000 mask=7FFF]
+ [dstart=0 dend=40 pwidth=8 srcshift=0][daas=0 dabs=0 dam=7 ds=0 daq=F]
+ Entering A1_ADD state [a1_x=0002, a1_y=0000, addasel=0, addbsel=0, modx=1, addareg=F, adda_xconst=1, adda_yconst=0]...
+
+...
+
+ Entering A1_ADD state [a1_x=009C, a1_y=0000, addasel=0, addbsel=0, modx=1, addareg=F, adda_xconst=1, adda_yconst=0]...
+ Entering DWRITE state... Dest write address/pix address: 000E84F8/0 [7730773077307730] (icount=0000, inc=2)
+ srcz=0000000000000000][dcomp=AA zcomp=00 dbinh=00]
+[srcz=0000000000000000 dstz=0000000000000000 zwdata=0000000000000000 mask=7FFF]
+ [dstart=0 dend=40 pwidth=8 srcshift=0][daas=0 dabs=0 dam=7 ds=0 daq=F]
+ Entering A1_ADD state [a1_x=009E, a1_y=0000, addasel=0, addbsel=0, modx=1, addareg=F, adda_xconst=1, adda_yconst=0]...
+ Entering IDLE_INNER state...
+
+ Leaving INNER state... (ocount=0104)
+ [in=T a1f=F a1=F zf=F z=F a2=F iif=F iii=F izf=F izi=F]
+
+ Entering INNER state...
+ Entering DWRITE state... Dest write address/pix address: 000E8508/0 [7730773077307730] (icount=009E, inc=2)
+ srcz=0000000000000000][dcomp=AA zcomp=00 dbinh=00]
+[srcz=0000000000000000 dstz=0000000000000000 zwdata=0000000000000000 mask=7FFF]
+ [dstart=0 dend=40 pwidth=8 srcshift=0][daas=0 dabs=0 dam=7 ds=0 daq=F]
+ Entering A1_ADD state [a1_x=00A0, a1_y=0000, addasel=0, addbsel=0, modx=1, addareg=F, adda_xconst=1, adda_yconst=0]...
+ Entering DWRITE state... Dest write address/pix address: 000E8518/0 [7730773077307730] (icount=009C, inc=2)
+ srcz=0000000000000000][dcomp=AA zcomp=00 dbinh=00]
+[srcz=0000000000000000 dstz=0000000000000000 zwdata=0000000000000000 mask=7FFF]
+ [dstart=0 dend=40 pwidth=8 srcshift=0][daas=0 dabs=0 dam=7 ds=0 daq=F]
+ Entering A1_ADD state [a1_x=00A2, a1_y=0000, addasel=0, addbsel=0, modx=1, addareg=F, adda_xconst=1, adda_yconst=0]...
+
+*/
+
+ if (a1_add)
+ {
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+//printf(" Entering A1_ADD state [addasel=%X, addbsel=%X, modx=%X, addareg=%s, adda_xconst=%u, adda_yconst=%s]...\n", addasel, addbsel, modx, (addareg ? "T" : "F"), adda_xconst, (adda_yconst ? "1" : "0"));
+printf(" Entering A1_ADD state [a1_x=%04X, a1_y=%04X, addasel=%X, addbsel=%X, modx=%X, addareg=%s, adda_xconst=%u, adda_yconst=%s]....\n", a1_x, a1_y, addasel, addbsel, modx, (addareg ? "T" : "F"), adda_xconst, (adda_yconst ? "1" : "0"));
+fflush(stdout);
+}
+#endif
+int16 adda_x, adda_y, addb_x, addb_y, data_x, data_y, addq_x, addq_y;
+ADDAMUX(adda_x, adda_y, addasel, a1_step_x, a1_step_y, a1_stepf_x, a1_stepf_y, a2_step_x, a2_step_y,
+ a1_inc_x, a1_inc_y, a1_incf_x, a1_incf_y, adda_xconst, adda_yconst, addareg, suba_x, suba_y);
+ADDBMUX(addb_x, addb_y, addbsel, a1_x, a1_y, a2_x, a2_y, a1_frac_x, a1_frac_y);
+ADDRADD(addq_x, addq_y, a1fracldi, adda_x, adda_y, addb_x, addb_y, modx, suba_x, suba_y);
+
+#if 0//def VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" [adda_x=%d, adda_y=%d, addb_x=%d, addb_y=%d, addq_x=%d, addq_y=%d]\n", adda_x, adda_y, addb_x, addb_y, addq_x, addq_y);
+fflush(stdout);
+}
+#endif
+//Now, write to what???
+//a2ptrld comes from a2ptrldi...
+//I believe it's addbsel that determines the writeback...
+// This is where atick[0] & [1] come in, in determining which part (fractional, integer)
+// gets written to...
+//a1_x = addq_x;
+//a1_y = addq_y;
+//Kludge, to get A1 channel increment working...
+if (a1addx == 3)
+{
+ a1_frac_x = addq_x, a1_frac_y = addq_y;
+
+addasel = 2, addbsel = 0, a1fracldi = false;
+ADDAMUX(adda_x, adda_y, addasel, a1_step_x, a1_step_y, a1_stepf_x, a1_stepf_y, a2_step_x, a2_step_y,
+ a1_inc_x, a1_inc_y, a1_incf_x, a1_incf_y, adda_xconst, adda_yconst, addareg, suba_x, suba_y);
+ADDBMUX(addb_x, addb_y, addbsel, a1_x, a1_y, a2_x, a2_y, a1_frac_x, a1_frac_y);
+ADDRADD(addq_x, addq_y, a1fracldi, adda_x, adda_y, addb_x, addb_y, modx, suba_x, suba_y);
+
+ a1_x = addq_x, a1_y = addq_y;
+}
+else
+ a1_x = addq_x, a1_y = addq_y;
+ }
+
+ if (a2_add)
+ {
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+//printf(" Entering A2_ADD state [addasel=%X, addbsel=%X, modx=%X, addareg=%s, adda_xconst=%u, adda_yconst=%s]...\n", addasel, addbsel, modx, (addareg ? "T" : "F"), adda_xconst, (adda_yconst ? "1" : "0"));
+printf(" Entering A2_ADD state [a2_x=%04X, a2_y=%04X, addasel=%X, addbsel=%X, modx=%X, addareg=%s, adda_xconst=%u, adda_yconst=%s]....\n", a2_x, a2_y, addasel, addbsel, modx, (addareg ? "T" : "F"), adda_xconst, (adda_yconst ? "1" : "0"));
+fflush(stdout);
+}
+#endif
+//void ADDAMUX(int16 &adda_x, int16 &adda_y, uint8 addasel, int16 a1_step_x, int16 a1_step_y,
+// int16 a1_stepf_x, int16 a1_stepf_y, int16 a2_step_x, int16 a2_step_y,
+// int16 a1_inc_x, int16 a1_inc_y, int16 a1_incf_x, int16 a1_incf_y, uint8 adda_xconst,
+// bool adda_yconst, bool addareg, bool suba_x, bool suba_y)
+//void ADDBMUX(int16 &addb_x, int16 &addb_y, uint8 addbsel, int16 a1_x, int16 a1_y,
+// int16 a2_x, int16 a2_y, int16 a1_frac_x, int16 a1_frac_y)
+//void ADDRADD(int16 &addq_x, int16 &addq_y, bool a1fracldi,
+// int16 adda_x, int16 adda_y, int16 addb_x, int16 addb_y, uint8 modx, bool suba_x, bool suba_y)
+//void DATAMUX(int16 &data_x, int16 &data_y, uint32 gpu_din, int16 addq_x, int16 addq_y, bool addqsel)
+int16 adda_x, adda_y, addb_x, addb_y, data_x, data_y, addq_x, addq_y;
+ADDAMUX(adda_x, adda_y, addasel, a1_step_x, a1_step_y, a1_stepf_x, a1_stepf_y, a2_step_x, a2_step_y,
+ a1_inc_x, a1_inc_y, a1_incf_x, a1_incf_y, adda_xconst, adda_yconst, addareg, suba_x, suba_y);
+ADDBMUX(addb_x, addb_y, addbsel, a1_x, a1_y, a2_x, a2_y, a1_frac_x, a1_frac_y);
+ADDRADD(addq_x, addq_y, a1fracldi, adda_x, adda_y, addb_x, addb_y, modx, suba_x, suba_y);
+
+#if 0//def VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" [adda_x=%d, adda_y=%d, addb_x=%d, addb_y=%d, addq_x=%d, addq_y=%d]\n", adda_x, adda_y, addb_x, addb_y, addq_x, addq_y);
+fflush(stdout);
+}
+#endif
+//Now, write to what???
+//a2ptrld comes from a2ptrldi...
+//I believe it's addbsel that determines the writeback...
+a2_x = addq_x;
+a2_y = addq_y;
+ }
+ }
+/*
+Flags: SRCEN CLIP_A1 UPDA1 UPDA1F UPDA2 DSTA2 GOURZ ZMODE=0 LFUFUNC=C SRCSHADE
+ count = 64 x 55
+ a1_base = 0015B000, a2_base = 0014B000
+ a1_x = 0000, a1_y = 0000, a1_frac_x = 8000, a1_frac_y = 8000, a2_x = 001F, a2_y = 0038
+ a1_step_x = FFFFFFC0, a1_step_y = 0001, a1_stepf_x = 0000, a1_stepf_y = 2AAA, a2_step_x = FFFFFFC0, a2_step_y = 0001
+ a1_inc_x = 0001, a1_inc_y = 0000, a1_incf_x = 0000, a1_incf_y = 0000
+ a1_win_x = 0040, a1_win_y = 0040, a2_mask_x = 0000, a2_mask_y = 0000
+ a2_mask=F a1add=+inc/+0 a2add=+1/+0
+ a1_pixsize = 4, a2_pixsize = 4
+ srcd=FF00FF00FF00FF00 dstd=0000000000000000 patd=0000000000000000 iinc=00000000
+ srcz1=0000000000000000 srcz2=0000000000000000 dstz=0000000000000000 zinc=00000000, col=0
+ Phrase mode is off
+ [in=T a1f=F a1=F zf=F z=F a2=F iif=F iii=F izf=F izi=F]
+ Entering INNER state...
+ Entering SREAD state... Source read address/pix address: 0015B000/0 [6505650565056505]
+ Entering A1_ADD state [a1_x=0000, a1_y=0000, addasel=3, addbsel=2, modx=0, addareg=T, adda_xconst=7, adda_yconst=0]...
+ Entering DWRITE state...
+ Dest write address/pix address: 0014E83E/0 [dstart=0 dend=10 pwidth=8 srcshift=0][daas=4 dabs=5 dam=7 ds=1 daq=F] [0000000000006505] (icount=003F, inc=1)
+ Entering A2_ADD state [a2_x=001F, a2_y=0038, addasel=0, addbsel=1, modx=0, addareg=F, adda_xconst=0, adda_yconst=0]...
+ Entering SREAD state... Source read address/pix address: 0015B000/0 [6505650565056505]
+ Entering A1_ADD state [a1_x=FFFF8000, a1_y=FFFF8000, addasel=3, addbsel=2, modx=0, addareg=T, adda_xconst=7, adda_yconst=0]...
+ Entering DWRITE state...
+ Dest write address/pix address: 0014E942/0 [dstart=0 dend=10 pwidth=8 srcshift=0][daas=4 dabs=5 dam=7 ds=1 daq=F] [0000000000006505] (icount=003E, inc=1)
+ Entering A2_ADD state [a2_x=0021, a2_y=0039, addasel=0, addbsel=1, modx=0, addareg=F, adda_xconst=0, adda_yconst=0]...
+ Entering SREAD state... Source read address/pix address: 0015B000/0 [6505650565056505]
+ Entering A1_ADD state [a1_x=FFFF8000, a1_y=FFFF8000, addasel=3, addbsel=2, modx=0, addareg=T, adda_xconst=7, adda_yconst=0]...
+ Entering DWRITE state...
+ Dest write address/pix address: 0014EA46/0 [dstart=0 dend=10 pwidth=8 srcshift=0][daas=4 dabs=5 dam=7 ds=1 daq=F] [0000000000006505] (icount=003D, inc=1)
+ Entering A2_ADD state [a2_x=0023, a2_y=003A, addasel=0, addbsel=1, modx=0, addareg=F, adda_xconst=0, adda_yconst=0]...
+ Entering SREAD state... Source read address/pix address: 0015B000/0 [6505650565056505]
+ Entering A1_ADD state [a1_x=FFFF8000, a1_y=FFFF8000, addasel=3, addbsel=2, modx=0, addareg=T, adda_xconst=7, adda_yconst=0]...
+ Entering DWRITE state...
+ Dest write address/pix address: 0014EB4A/0 [dstart=0 dend=10 pwidth=8 srcshift=0][daas=4 dabs=5 dam=7 ds=1 daq=F] [0000000000006505] (icount=003C, inc=1)
+ Entering A2_ADD state [a2_x=0025, a2_y=003B, addasel=0, addbsel=1, modx=0, addareg=F, adda_xconst=0, adda_yconst=0]...
+ ...
+ Entering SREAD state... Source read address/pix address: 0015B000/0 [6505650565056505]
+ Entering A1_ADD state [a1_x=FFFF8000, a1_y=FFFF8000, addasel=3, addbsel=2, modx=0, addareg=T, adda_xconst=7, adda_yconst=0]...
+ Entering DWRITE state...
+ Dest write address/pix address: 0015283A/0 [dstart=0 dend=10 pwidth=8 srcshift=0][daas=4 dabs=5 dam=7 ds=1 daq=F] [0000000000006505] (icount=0000, inc=1)
+ Entering A2_ADD state [a2_x=009D, a2_y=0077, addasel=0, addbsel=1, modx=0, addareg=F, adda_xconst=0, adda_yconst=0]...
+ Entering IDLE_INNER state...
+ Leaving INNER state... (ocount=0036)
+ [in=F a1f=T a1=F zf=F z=F a2=F iif=F iii=F izf=F izi=F]
+ Entering A1FUPDATE state...
+ [in=F a1f=F a1=T zf=F z=F a2=F iif=F iii=F izf=F izi=F]
+ Entering A1UPDATE state... (-32768/-32768 -> 32704/-32767)
+ [in=F a1f=F a1=F zf=F z=F a2=T iif=F iii=F izf=F izi=F]
+ Entering A2UPDATE state... (159/120 -> 95/121)
+ [in=T a1f=F a1=F zf=F z=F a2=F iif=F iii=F izf=F izi=F]
+ Entering INNER state...
+*/
+
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Leaving INNER state...");
+fflush(stdout);
+}
+#endif
+ indone = true;
+// The outer counter is updated here as well on the clock cycle...
+
+/* the inner loop is started whenever another state is about to
+cause the inner state to go active */
+//Instart := ND7 (instart, innert[0], innert[2..7]);
+
+//Actually, it's done only when inner gets asserted without the 2nd line of conditions
+//(inner AND !indone)
+//fixed now...
+//Since we don't get here until the inner loop is finished (indone = true) we can get
+//away with doing it here...!
+ ocount--;
+
+ if (ocount == 0)
+ outer0 = true;
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" (ocount=%04X)\n", ocount);
+fflush(stdout);
+}
+#endif
+ }
+
+ if (a1fupdate)
+ {
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Entering A1FUPDATE state...\n");
+fflush(stdout);
+}
+#endif
+ uint32 a1_frac_xt = (uint32)a1_frac_x + (uint32)a1_stepf_x;
+ uint32 a1_frac_yt = (uint32)a1_frac_y + (uint32)a1_stepf_y;
+ a1FracCInX = a1_frac_xt >> 16;
+ a1FracCInY = a1_frac_yt >> 16;
+ a1_frac_x = (uint16)(a1_frac_xt & 0xFFFF);
+ a1_frac_y = (uint16)(a1_frac_yt & 0xFFFF);
+ }
+
+ if (a1update)
+ {
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Entering A1UPDATE state... (%d/%d -> ", a1_x, a1_y);
+fflush(stdout);
+}
+#endif
+ a1_x += a1_step_x + a1FracCInX;
+ a1_y += a1_step_y + a1FracCInY;
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf("%d/%d)\n", a1_x, a1_y);
+fflush(stdout);
+}
+#endif
+ }
+
+ if (a2update)
+ {
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" Entering A2UPDATE state... (%d/%d -> ", a2_x, a2_y);
+fflush(stdout);
+}
+#endif
+ a2_x += a2_step_x;
+ a2_y += a2_step_y;
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf("%d/%d)\n", a2_x, a2_y);
+fflush(stdout);
+}
+#endif
+ }
+ }
+
+// We never get here! !!! FIX !!!
+
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+ printf("Done!\na1_x=%04X a1_y=%04X a1_frac_x=%04X a1_frac_y=%04X a2_x=%04X a2_y%04X\n",
+ GET16(blitter_ram, A1_PIXEL + 2),
+ GET16(blitter_ram, A1_PIXEL + 0),
+ GET16(blitter_ram, A1_FPIXEL + 2),
+ GET16(blitter_ram, A1_FPIXEL + 0),
+ GET16(blitter_ram, A2_PIXEL + 2),
+ GET16(blitter_ram, A2_PIXEL + 0));
+ fflush(stdout);
+}
+#endif
+
+ // Write values back to registers (in real blitter, these are continuously updated)
+ SET16(blitter_ram, A1_PIXEL + 2, a1_x);
+ SET16(blitter_ram, A1_PIXEL + 0, a1_y);
+ SET16(blitter_ram, A1_FPIXEL + 2, a1_frac_x);
+ SET16(blitter_ram, A1_FPIXEL + 0, a1_frac_y);
+ SET16(blitter_ram, A2_PIXEL + 2, a2_x);
+ SET16(blitter_ram, A2_PIXEL + 0, a2_y);
+
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+ printf("Writeback!\na1_x=%04X a1_y=%04X a1_frac_x=%04X a1_frac_y=%04X a2_x=%04X a2_y%04X\n",
+ GET16(blitter_ram, A1_PIXEL + 2),
+ GET16(blitter_ram, A1_PIXEL + 0),
+ GET16(blitter_ram, A1_FPIXEL + 2),
+ GET16(blitter_ram, A1_FPIXEL + 0),
+ GET16(blitter_ram, A2_PIXEL + 2),
+ GET16(blitter_ram, A2_PIXEL + 0));
+ fflush(stdout);
+}
+#endif
+}
+
+/*
+ int16 a1_x = (int16)GET16(blitter_ram, A1_PIXEL + 2);
+ int16 a1_y = (int16)GET16(blitter_ram, A1_PIXEL + 0);
+ uint16 a1_frac_x = GET16(blitter_ram, A1_FPIXEL + 2);
+ uint16 a1_frac_y = GET16(blitter_ram, A1_FPIXEL + 0);
+ int16 a2_x = (int16)GET16(blitter_ram, A2_PIXEL + 2);
+ int16 a2_y = (int16)GET16(blitter_ram, A2_PIXEL + 0);
+
+Seems that the ending a1_x should be written between blits, but it doesn't seem to be...
+
+Blit! (CMD = 01800000)
+Flags: LFUFUNC=C
+ count = 28672 x 1
+ a1_base = 00050000, a2_base = 00070000
+ a1_x = 0000, a1_y = 0000, a1_frac_x = 49CD, a1_frac_y = 0000, a2_x = 0033, a2_y = 0001
+ a1_step_x = 0000, a1_step_y = 0000, a1_stepf_x = 939A, a1_stepf_y = 0000, a2_step_x = 0000, a2_step_y = 0000
+ a1_inc_x = 0000, a1_inc_y = 0000, a1_incf_x = 0000, a1_incf_y = 0000
+ a1_win_x = 0100, a1_win_y = 0020, a2_mask_x = 0000, a2_mask_y = 0000
+ a2_mask=F a1add=+phr/+0 a2add=+phr/+0
+ a1_pixsize = 4, a2_pixsize = 3
+ srcd=DEDEDEDEDEDEDEDE dstd=0000000000000000 patd=0000000000000000 iinc=00000000
+ srcz1=0000000000000000 srcz2=0000000000000000 dstz=0000000000000000 zinc=00000000, coll=0
+ Phrase mode is ON
+
+Blit! (CMD = 01800000)
+Flags: LFUFUNC=C
+ count = 28672 x 1
+ a1_base = 00050000, a2_base = 00070000
+ a1_x = 0000, a1_y = 0000, a1_frac_x = 49CD, a1_frac_y = 0000, a2_x = 0033, a2_y = 0001
+ a1_step_x = 0000, a1_step_y = 0000, a1_stepf_x = 939A, a1_stepf_y = 0000, a2_step_x = 0000, a2_step_y = 0000
+ a1_inc_x = 0000, a1_inc_y = 0000, a1_incf_x = 0000, a1_incf_y = 0000
+ a1_win_x = 0100, a1_win_y = 0020, a2_mask_x = 0000, a2_mask_y = 0000
+ a2_mask=F a1add=+phr/+0 a2add=+phr/+0
+ a1_pixsize = 4, a2_pixsize = 3
+ srcd=D6D6D6D6D6D6D6D6 dstd=0000000000000000 patd=0000000000000000 iinc=00000000
+ srcz1=0000000000000000 srcz2=0000000000000000 dstz=0000000000000000 zinc=00000000, coll=0
+ Phrase mode is ON
+*/
+
+
+
+// Various pieces of the blitter puzzle are teased out here...
+
+
+
+/*
+DEF ADDRGEN (
+INT24/ address // byte address
+ pixa[0..2] // bit part of address, un-pipe-lined
+ :OUT;
+INT16/ a1_x
+INT16/ a1_y
+INT21/ a1_base
+ a1_pitch[0..1]
+ a1_pixsize[0..2]
+ a1_width[0..5]
+ a1_zoffset[0..1]
+INT16/ a2_x
+INT16/ a2_y
+INT21/ a2_base
+ a2_pitch[0..1]
+ a2_pixsize[0..2]
+ a2_width[0..5]
+ a2_zoffset[0..1]
+ apipe // load address pipe-line latch
+ clk // co-processor clock
+ gena2 // generate A2 as opposed to A1
+ zaddr // generate Z address
+ :IN);
+*/
+
+void ADDRGEN(uint32 &address, uint32 &pixa, bool gena2, bool zaddr,
+ uint16 a1_x, uint16 a1_y, uint32 a1_base, uint8 a1_pitch, uint8 a1_pixsize, uint8 a1_width, uint8 a1_zoffset,
+ uint16 a2_x, uint16 a2_y, uint32 a2_base, uint8 a2_pitch, uint8 a2_pixsize, uint8 a2_width, uint8 a2_zoffset)
+{
+// uint16 x = (gena2 ? a2_x : a1_x) & 0x7FFF;
+ uint16 x = (gena2 ? a2_x : a1_x) & 0xFFFF; // Actually uses all 16 bits to generate address...!
+ uint16 y = (gena2 ? a2_y : a1_y) & 0x0FFF;
+ uint8 width = (gena2 ? a2_width : a1_width);
+ uint8 pixsize = (gena2 ? a2_pixsize : a1_pixsize);
+ uint8 pitch = (gena2 ? a2_pitch : a1_pitch);
+ uint32 base = (gena2 ? a2_base : a1_base) >> 3;//Only upper 21 bits are passed around the bus? Seems like it...
+ uint8 zoffset = (gena2 ? a2_zoffset : a1_zoffset);
+
+ uint32 ytm = ((uint32)y << 2) + (width & 0x02 ? (uint32)y << 1 : 0) + (width & 0x01 ? (uint32)y : 0);
+
+ uint32 ya = (ytm << (width >> 2)) >> 2;
+
+ uint32 pa = ya + x;
+
+ /*uint32*/ pixa = pa << pixsize;
+
+ uint8 pt = ((pitch & 0x01) && !(pitch & 0x02) ? 0x01 : 0x00)
+ | (!(pitch & 0x01) && (pitch & 0x02) ? 0x02 : 0x00);
+// uint32 phradr = pixa << pt;
+ uint32 phradr = (pixa >> 6) << pt;
+ uint32 shup = (pitch == 0x03 ? (pixa >> 6) : 0);
+
+ uint8 za = (zaddr ? zoffset : 0) & 0x03;
+// uint32 addr = za + (phradr & 0x07) + (shup << 1) + base;
+ uint32 addr = za + phradr + (shup << 1) + base;
+ /*uint32*/ address = ((pixa & 0x38) >> 3) | ((addr & 0x1FFFFF) << 3);
+#if 0//def VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+printf(" [gena2=%s, x=%04X, y=%04X, w=%1X, pxsz=%1X, ptch=%1X, b=%08X, zoff=%1X]\n", (gena2 ? "T" : "F"), x, y, width, pixsize, pitch, base, zoffset);
+printf(" [ytm=%X, ya=%X, pa=%X, pixa=%X, pt=%X, phradr=%X, shup=%X, za=%X, addr=%X, address=%X]\n", ytm, ya, pa, pixa, pt, phradr, shup, za, addr, address);
+fflush(stdout);
+}
+#endif
+ pixa &= 0x07;
+/*
+ Entering INNER state...
+ [gena2=T, x=0002, y=0000, w=20, pxsz=4, ptch=0, b=000012BA, zoff=0]
+ [ytm=0, ya=0, pa=2, pixa=20, pt=0, phradr=0, shup=0, za=0, addr=12BA, address=95D4]
+ Entering SREADX state... [dstart=0 dend=20 pwidth=8 srcshift=20]
+ Source extra read address/pix address: 000095D4/0 [0000001C00540038]
+ Entering A2_ADD state [a2_x=0002, a2_y=0000, addasel=0, addbsel=1, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ [gena2=T, x=0004, y=0000, w=20, pxsz=4, ptch=0, b=000012BA, zoff=0]
+ [ytm=0, ya=0, pa=4, pixa=40, pt=0, phradr=1, shup=0, za=0, addr=12BB, address=95D8]
+ Entering SREAD state... [dstart=0 dend=20 pwidth=8 srcshift=0]
+ Source read address/pix address: 000095D8/0 [0054003800009814]
+ Entering A2_ADD state [a2_x=0004, a2_y=0000, addasel=0, addbsel=1, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ [gena2=F, x=0000, y=0000, w=20, pxsz=4, ptch=0, b=00006E52, zoff=0]
+ [ytm=0, ya=0, pa=0, pixa=0, pt=0, phradr=0, shup=0, za=0, addr=6E52, address=37290]
+ Entering DWRITE state...
+ Dest write address/pix address: 00037290/0 [dstart=0 dend=20 pwidth=8 srcshift=0] (icount=026E, inc=4)
+ Entering A1_ADD state [a1_x=0000, a1_y=0000, addasel=0, addbsel=0, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ [gena2=T, x=0008, y=0000, w=20, pxsz=4, ptch=0, b=000012BA, zoff=0]
+ [ytm=0, ya=0, pa=8, pixa=80, pt=0, phradr=2, shup=0, za=0, addr=12BC, address=95E0]
+*/
+/*
+Obviously wrong:
+ Entering SREAD state...
+ [gena2=T, x=0004, y=0000, w=20, pxsz=4, ptch=0, b=000010AC, zoff=0]
+ [ytm=0, ya=0, pa=4, pixa=0, pt=0, phradr=40, shup=0, za=0, addr=10AC, address=8560]
+ Source read address/pix address: 00008560/0 [8C27981B327E00F0]
+
+2nd pass (still wrong):
+ Entering SREAD state...
+ [gena2=T, x=0004, y=0000, w=20, pxsz=4, ptch=0, b=000010AC, zoff=0]
+ [ytm=0, ya=0, pa=4, pixa=0, pt=0, phradr=40, shup=0, za=0, addr=10EC, address=8760]
+ Source read address/pix address: 00008760/0 [00E06DC04581880C]
+
+Correct!:
+ Entering SREAD state...
+ [gena2=T, x=0004, y=0000, w=20, pxsz=4, ptch=0, b=000010AC, zoff=0]
+ [ytm=0, ya=0, pa=4, pixa=0, pt=0, phradr=1, shup=0, za=0, addr=10AD, address=8568]
+ Source read address/pix address: 00008568/0 [6267981A327C00F0]
+
+OK, now we're back into incorrect (or is it?):
+ Entering SREADX state... [dstart=0 dend=20 pwidth=8 srcshift=20]
+ Source extra read address/pix address: 000095D4/0 [0000 001C 0054 0038]
+ Entering A2_ADD state [a2_x=0002, a2_y=0000, addasel=0, addbsel=1, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+ Entering SREAD state... [dstart=0 dend=20 pwidth=8 srcshift=0]
+ Source read address/pix address: 000095D8/0 [0054 0038 0000 9814]
+ Entering A2_ADD state [a2_x=0004, a2_y=0000, addasel=0, addbsel=1, modx=2, addareg=F, adda_xconst=2, adda_yconst=0]...
+I think this may be correct...!
+*/
+}
+
+/*
+// source and destination address update conditions
+
+Sraat0 := AN2 (sraat[0], sreadxi, srcenz\);
+Sraat1 := AN2 (sraat[1], sreadi, srcenz\);
+Srca_addi := OR4 (srca_addi, szreadxi, szreadi, sraat[0..1]);
+Srca_add := FD1Q (srca_add, srca_addi, clk);
+
+Dstaat := AN2 (dstaat, dwritei, dstwrz\);
+Dsta_addi := OR2 (dsta_addi, dzwritei, dstaat);
+// Dsta_add := FD1Q (dsta_add, dsta_addi, clk);
+
+// source and destination address generate conditions
+
+Gensrc := OR4 (gensrc, sreadxi, szreadxi, sreadi, szreadi);
+Gendst := OR4 (gendst, dreadi, dzreadi, dwritei, dzwritei);
+Dsta2\ := INV1 (dsta2\, dsta2);
+Gena2t0 := NAN2 (gena2t[0], gensrc, dsta2\);
+Gena2t1 := NAN2 (gena2t[1], gendst, dsta2);
+Gena2i := NAN2 (gena2i, gena2t[0..1]);
+Gena2 := FD1QU (gena2, gena2i, clk);
+
+Zaddr := OR4 (zaddr, szreadx, szread, dzread, dzwrite);
+*/
+
+/*void foo(void)
+{
+ // Basically, the above translates to:
+ bool srca_addi = (sreadxi && !srcenz) || (sreadi && !srcenz) || szreadxi || szreadi;
+
+ bool dsta_addi = (dwritei && !dstwrz) || dzwritei;
+
+ bool gensrc = sreadxi || szreadxi || sreadi || szreadi;
+ bool gendst = dreadi || szreadi || dwritei || dzwritei;
+ bool gena2i = (gensrc && !dsta2) || (gendst && dsta2);
+
+ bool zaddr = szreadx || szread || dzread || dzwrite;
+}*/
+
+/*
+// source data reads
+
+Srcdpset\ := NAN2 (srcdpset\, readreq, sread);
+Srcdpt1 := NAN2 (srcdpt[1], srcdpend, srcdack\);
+Srcdpt2 := NAN2 (srcdpt[2], srcdpset\, srcdpt[1]);
+Srcdpend := FD2Q (srcdpend, srcdpt[2], clk, reset\);
+
+Srcdxpset\ := NAN2 (srcdxpset\, readreq, sreadx);
+Srcdxpt1 := NAN2 (srcdxpt[1], srcdxpend, srcdxack\);
+Srcdxpt2 := NAN2 (srcdxpt[2], srcdxpset\, srcdxpt[1]);
+Srcdxpend := FD2Q (srcdxpend, srcdxpt[2], clk, reset\);
+
+Sdpend := OR2 (sdpend, srcdxpend, srcdpend);
+Srcdreadt := AN2 (srcdreadt, sdpend, read_ack);
+
+//2/9/92 - enhancement?
+//Load srcdread on the next tick as well to modify it in srcshade
+
+Srcdreadd := FD1Q (srcdreadd, srcdreadt, clk);
+Srcdread := AOR1 (srcdread, srcshade, srcdreadd, srcdreadt);
+
+// source zed reads
+
+Srczpset\ := NAN2 (srczpset\, readreq, szread);
+Srczpt1 := NAN2 (srczpt[1], srczpend, srczack\);
+Srczpt2 := NAN2 (srczpt[2], srczpset\, srczpt[1]);
+Srczpend := FD2Q (srczpend, srczpt[2], clk, reset\);
+
+Srczxpset\ := NAN2 (srczxpset\, readreq, szreadx);
+Srczxpt1 := NAN2 (srczxpt[1], srczxpend, srczxack\);
+Srczxpt2 := NAN2 (srczxpt[2], srczxpset\, srczxpt[1]);
+Srczxpend := FD2Q (srczxpend, srczxpt[2], clk, reset\);
+
+Szpend := OR2 (szpend, srczpend, srczxpend);
+Srczread := AN2 (srczread, szpend, read_ack);
+
+// destination data reads
+
+Dstdpset\ := NAN2 (dstdpset\, readreq, dread);
+Dstdpt0 := NAN2 (dstdpt[0], dstdpend, dstdack\);
+Dstdpt1 := NAN2 (dstdpt[1], dstdpset\, dstdpt[0]);
+Dstdpend := FD2Q (dstdpend, dstdpt[1], clk, reset\);
+Dstdread := AN2 (dstdread, dstdpend, read_ack);
+
+// destination zed reads
+
+Dstzpset\ := NAN2 (dstzpset\, readreq, dzread);
+Dstzpt0 := NAN2 (dstzpt[0], dstzpend, dstzack\);
+Dstzpt1 := NAN2 (dstzpt[1], dstzpset\, dstzpt[0]);
+Dstzpend := FD2Q (dstzpend, dstzpt[1], clk, reset\);
+Dstzread := AN2 (dstzread, dstzpend, read_ack);
+*/
+
+/*void foo2(void)
+{
+ // Basically, the above translates to:
+ bool srcdpend = (readreq && sread) || (srcdpend && !srcdack);
+ bool srcdxpend = (readreq && sreadx) || (srcdxpend && !srcdxack);
+ bool sdpend = srcxpend || srcdpend;
+ bool srcdread = ((sdpend && read_ack) && srcshade) || (sdpend && read_ack);//the latter term is lookahead
+
+}*/
+
+////////////////////////////////////////////////////////////////////////////////////////////
+////////////////////////////////////////////////////////////////////////////////////////////
+// Here's an important bit: The source data adder logic. Need to track down the inputs!!! //
+////////////////////////////////////////////////////////////////////////////////////////////
+////////////////////////////////////////////////////////////////////////////////////////////
+
+/*
+DEF ADDARRAY (
+INT16/ addq[0..3]
+ :OUT;
+ clk
+ daddasel[0..2] // data adder input A selection
+ daddbsel[0..3]
+ daddmode[0..2]
+INT32/ dstd[0..1]
+INT32/ iinc
+ initcin[0..3] // carry into the adders from the initializers
+ initinc[0..63] // the initialisation increment
+ initpix[0..15] // Data initialiser pixel value
+INT32/ istep
+INT32/ patd[0..1]
+INT32/ srcdlo
+INT32/ srcdhi
+INT32/ srcz1[0..1]
+INT32/ srcz2[0..1]
+ reset\
+INT32/ zinc
+INT32/ zstep
+ :IN);
+*/
+void ADDARRAY(uint16 * addq, uint8 daddasel, uint8 daddbsel, uint8 daddmode,
+ uint64 dstd, uint32 iinc, uint8 initcin[], uint64 initinc, uint16 initpix,
+ uint32 istep, uint64 patd, uint64 srcd, uint64 srcz1, uint64 srcz2,
+ uint32 zinc, uint32 zstep)
+{
+ uint32 initpix2 = ((uint32)initpix << 16) | initpix;
+ uint32 addalo[8], addahi[8];
+ addalo[0] = dstd & 0xFFFFFFFF;
+ addalo[1] = initpix2;
+ addalo[2] = 0;
+ addalo[3] = 0;
+ addalo[4] = srcd & 0xFFFFFFFF;
+ addalo[5] = patd & 0xFFFFFFFF;
+ addalo[6] = srcz1 & 0xFFFFFFFF;
+ addalo[7] = srcz2 & 0xFFFFFFFF;
+ addahi[0] = dstd >> 32;
+ addahi[1] = initpix2;
+ addahi[2] = 0;
+ addahi[3] = 0;
+ addahi[4] = srcd >> 32;
+ addahi[5] = patd >> 32;
+ addahi[6] = srcz1 >> 32;
+ addahi[7] = srcz2 >> 32;
+ uint16 adda[4];
+ adda[0] = addalo[daddasel] & 0xFFFF;
+ adda[1] = addalo[daddasel] >> 16;
+ adda[2] = addahi[daddasel] & 0xFFFF;
+ adda[3] = addahi[daddasel] >> 16;
+
+ uint16 wordmux[8];
+ wordmux[0] = iinc & 0xFFFF;
+ wordmux[1] = iinc >> 16;
+ wordmux[2] = zinc & 0xFFFF;
+ wordmux[3] = zinc >> 16;;
+ wordmux[4] = istep & 0xFFFF;
+ wordmux[5] = istep >> 16;;
+ wordmux[6] = zstep & 0xFFFF;
+ wordmux[7] = zstep >> 16;;
+ uint16 word = wordmux[((daddbsel & 0x08) >> 1) | (daddbsel & 0x03)];
+ uint16 addb[4];
+ bool dbsel2 = daddbsel & 0x04;
+ bool iincsel = (daddbsel & 0x01) && !(daddbsel & 0x04);
+
+ if (!dbsel2 && !iincsel)
+ addb[0] = srcd & 0xFFFF,
+ addb[1] = (srcd >> 16) & 0xFFFF,
+ addb[2] = (srcd >> 32) & 0xFFFF,
+ addb[3] = (srcd >> 48) & 0xFFFF;
+ else if (dbsel2 && !iincsel)
+ addb[0] = addb[1] = addb[2] = addb[3] = word;
+ else if (!dbsel2 && iincsel)
+ addb[0] = initinc & 0xFFFF,
+ addb[1] = (initinc >> 16) & 0xFFFF,
+ addb[2] = (initinc >> 32) & 0xFFFF,
+ addb[3] = (initinc >> 48) & 0xFFFF;
+ else
+ addb[0] = addb[1] = addb[2] = addb[3] = 0;
+
+ uint8 cinsel = (daddmode >= 1 && daddmode <= 4 ? 1 : 0);
+
+static uint8 co[4];//These are preserved between calls...
+ uint8 cin[4];
+
+ for(int i=0; i<4; i++)
+ cin[i] = initcin[i] | (co[i] & cinsel);
+
+ bool eightbit = daddmode & 0x02;
+ bool sat = daddmode & 0x03;
+ bool hicinh = ((daddmode & 0x03) == 0x03);
+
+//Note that the carry out is saved between calls to this function...
+ for(int i=0; i<4; i++)
+ ADD16SAT(addq[i], co[i], adda[i], addb[i], cin[i], sat, eightbit, hicinh);
+}
+
+/*
+DEF ADD16SAT (
+INT16/ r // result
+ co // carry out
+ :IO;
+INT16/ a
+INT16/ b
+ cin
+ sat
+ eightbit
+ hicinh
+ :IN);
+*/
+void ADD16SAT(uint16 &r, uint8 &co, uint16 a, uint16 b, uint8 cin, bool sat, bool eightbit, bool hicinh)
+{
+/*if (logBlit)
+{
+ printf("--> [sat=%s 8b=%s hicinh=%s] %04X + %04X (+ %u) = ", (sat ? "T" : "F"), (eightbit ? "T" : "F"), (hicinh ? "T" : "F"), a, b, cin);
+ fflush(stdout);
+}*/
+ uint8 carry[4];
+ uint32 qt = (a & 0xFF) + (b & 0xFF) + cin;
+ carry[0] = (qt & 0x0100 ? 1 : 0);
+ uint16 q = qt & 0x00FF;
+ carry[1] = (carry[0] && !eightbit ? carry[0] : 0);
+ qt = (a & 0x0F00) + (b & 0x0F00) + (carry[1] << 8);
+ carry[2] = (qt & 0x1000 ? 1 : 0);
+ q |= qt & 0x0F00;
+ carry[3] = (carry[2] && !hicinh ? carry[2] : 0);
+ qt = (a & 0xF000) + (b & 0xF000) + (carry[3] << 12);
+ co = (qt & 0x10000 ? 1 : 0);
+ q |= qt & 0xF000;
+
+ uint8 btop = (eightbit ? (b & 0x0080) >> 7 : (b & 0x8000) >> 15);
+ uint8 ctop = (eightbit ? carry[0] : co);
+
+ bool saturate = sat && (btop ^ ctop);
+ bool hisaturate = saturate && !eightbit;
+/*if (logBlit)
+{
+ printf("bt=%u ct=%u s=%u hs=%u] ", btop, ctop, saturate, hisaturate);
+ fflush(stdout);
+}*/
+
+ r = (saturate ? (ctop ? 0x00FF : 0x0000) : q & 0x00FF);
+ r |= (hisaturate ? (ctop ? 0xFF00 : 0x0000) : q & 0xFF00);
+/*if (logBlit)
+{
+ printf("%04X (co=%u)\n", r, co);
+ fflush(stdout);
+}*/
+}
+
+/** ADDAMUX - Address adder input A selection *******************
+
+This module generates the data loaded into the address adder input A. This is
+the update value, and can be one of four registers : A1 step, A2 step, A1
+increment and A1 fraction. It can complement these values to perform
+subtraction, and it can generate constants to increment / decrement the window
+pointers.
+
+addasel[0..2] select the register to add
+
+000 A1 step integer part
+001 A1 step fraction part
+010 A1 increment integer part
+011 A1 increment fraction part
+100 A2 step
+
+adda_xconst[0..2] generate a power of 2 in the range 1-64 or all zeroes when
+they are all 1.
+
+addareg selects register value to be added as opposed to constant
+value.
+
+suba_x, suba_y complement the X and Y values
+
+*/
+
+/*
+DEF ADDAMUX (
+INT16/ adda_x
+INT16/ adda_y
+ :OUT;
+ addasel[0..2]
+INT16/ a1_step_x
+INT16/ a1_step_y
+INT16/ a1_stepf_x
+INT16/ a1_stepf_y
+INT16/ a2_step_x
+INT16/ a2_step_y
+INT16/ a1_inc_x
+INT16/ a1_inc_y
+INT16/ a1_incf_x
+INT16/ a1_incf_y
+ adda_xconst[0..2]
+ adda_yconst
+ addareg
+ suba_x
+ suba_y :IN);
+*/
+void ADDAMUX(int16 &adda_x, int16 &adda_y, uint8 addasel, int16 a1_step_x, int16 a1_step_y,
+ int16 a1_stepf_x, int16 a1_stepf_y, int16 a2_step_x, int16 a2_step_y,
+ int16 a1_inc_x, int16 a1_inc_y, int16 a1_incf_x, int16 a1_incf_y, uint8 adda_xconst,
+ bool adda_yconst, bool addareg, bool suba_x, bool suba_y)
+{
+
+/*INT16/ addac_x, addac_y, addar_x, addar_y, addart_x, addart_y,
+INT16/ addas_x, addas_y, suba_x16, suba_y16
+:LOCAL;
+BEGIN
+
+Zero := TIE0 (zero);*/
+
+/* Multiplex the register terms */
+
+/*Addaselb[0-2] := BUF8 (addaselb[0-2], addasel[0-2]);
+Addart_x := MX4 (addart_x, a1_step_x, a1_stepf_x, a1_inc_x, a1_incf_x, addaselb[0..1]);
+Addar_x := MX2 (addar_x, addart_x, a2_step_x, addaselb[2]);
+Addart_y := MX4 (addart_y, a1_step_y, a1_stepf_y, a1_inc_y, a1_incf_y, addaselb[0..1]);
+Addar_y := MX2 (addar_y, addart_y, a2_step_y, addaselb[2]);*/
+
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ int16 xterm[4], yterm[4];
+ xterm[0] = a1_step_x, xterm[1] = a1_stepf_x, xterm[2] = a1_inc_x, xterm[3] = a1_incf_x;
+ yterm[0] = a1_step_y, yterm[1] = a1_stepf_y, yterm[2] = a1_inc_y, yterm[3] = a1_incf_y;
+ int16 addar_x = (addasel & 0x04 ? a2_step_x : xterm[addasel & 0x03]);
+ int16 addar_y = (addasel & 0x04 ? a2_step_y : yterm[addasel & 0x03]);
+//////////////////////////////////////////////////////////////////////////////////////
+
+/* Generate a constant value - this is a power of 2 in the range
+0-64, or zero. The control bits are adda_xconst[0..2], when they
+are all 1 the result is 0.
+Constants for Y can only be 0 or 1 */
+
+/*Addac_xlo := D38H (addac_x[0..6], unused[0], adda_xconst[0..2]);
+Unused[0] := DUMMY (unused[0]);
+
+Addac_x := JOIN (addac_x, addac_x[0..6], zero, zero, zero, zero, zero, zero, zero, zero, zero);
+Addac_y := JOIN (addac_y, adda_yconst, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero,
+ zero, zero, zero, zero, zero);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ int16 addac_x = (adda_xconst == 0x07 ? 0 : 1 << adda_xconst);
+ int16 addac_y = (adda_yconst ? 0x01 : 0);
+//////////////////////////////////////////////////////////////////////////////////////
+
+/* Select between constant value and register value */
+
+/*Addas_x := MX2 (addas_x, addac_x, addar_x, addareg);
+Addas_y := MX2 (addas_y, addac_y, addar_y, addareg);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ int16 addas_x = (addareg ? addar_x : addac_x);
+ int16 addas_y = (addareg ? addar_y : addac_y);
+//////////////////////////////////////////////////////////////////////////////////////
+
+/* Complement these values (complement flag gives adder carry in)*/
+
+/*Suba_x16 := JOIN (suba_x16, suba_x, suba_x, suba_x, suba_x, suba_x, suba_x, suba_x, suba_x, suba_x,
+ suba_x, suba_x, suba_x, suba_x, suba_x, suba_x, suba_x);
+Suba_y16 := JOIN (suba_y16, suba_y, suba_y, suba_y, suba_y, suba_y, suba_y, suba_y, suba_y, suba_y,
+ suba_y, suba_y, suba_y, suba_y, suba_y, suba_y, suba_y);
+Adda_x := EO (adda_x, suba_x16, addas_x);
+Adda_y := EO (adda_y, suba_y16, addas_y);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ adda_x = addas_x ^ (suba_x ? 0xFFFF : 0x0000);
+ adda_y = addas_y ^ (suba_y ? 0xFFFF : 0x0000);
+//////////////////////////////////////////////////////////////////////////////////////
+
+//END;
+}
+
+/** ADDBMUX - Address adder input B selection *******************
+
+This module selects the register to be updated by the address
+adder. This can be one of three registers, the A1 and A2
+pointers, or the A1 fractional part. It can also be zero, so that the step
+registers load directly into the pointers.
+*/
+
+/*DEF ADDBMUX (
+INT16/ addb_x
+INT16/ addb_y
+ :OUT;
+ addbsel[0..1]
+INT16/ a1_x
+INT16/ a1_y
+INT16/ a2_x
+INT16/ a2_y
+INT16/ a1_frac_x
+INT16/ a1_frac_y
+ :IN);
+INT16/ zero16 :LOCAL;
+BEGIN*/
+void ADDBMUX(int16 &addb_x, int16 &addb_y, uint8 addbsel, int16 a1_x, int16 a1_y,
+ int16 a2_x, int16 a2_y, int16 a1_frac_x, int16 a1_frac_y)
+{
+
+/*Zero := TIE0 (zero);
+Zero16 := JOIN (zero16, zero, zero, zero, zero, zero, zero, zero,
+ zero, zero, zero, zero, zero, zero, zero, zero, zero);
+Addbselb[0-1] := BUF8 (addbselb[0-1], addbsel[0-1]);
+Addb_x := MX4 (addb_x, a1_x, a2_x, a1_frac_x, zero16, addbselb[0..1]);
+Addb_y := MX4 (addb_y, a1_y, a2_y, a1_frac_y, zero16, addbselb[0..1]);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ int16 xterm[4], yterm[4];
+ xterm[0] = a1_x, xterm[1] = a2_x, xterm[2] = a1_frac_x, xterm[3] = 0;
+ yterm[0] = a1_y, yterm[1] = a2_y, yterm[2] = a1_frac_y, yterm[3] = 0;
+ addb_x = xterm[addbsel & 0x03];
+ addb_y = yterm[addbsel & 0x03];
+//////////////////////////////////////////////////////////////////////////////////////
+
+//END;
+}
+
+/** DATAMUX - Address local data bus selection ******************
+
+Select between the adder output and the input data bus
+*/
+
+/*DEF DATAMUX (
+INT16/ data_x
+INT16/ data_y
+ :OUT;
+INT32/ gpu_din
+INT16/ addq_x
+INT16/ addq_y
+ addqsel
+ :IN);
+
+INT16/ gpu_lo, gpu_hi
+:LOCAL;
+BEGIN*/
+void DATAMUX(int16 &data_x, int16 &data_y, uint32 gpu_din, int16 addq_x, int16 addq_y, bool addqsel)
+{
+/*Gpu_lo := JOIN (gpu_lo, gpu_din{0..15});
+Gpu_hi := JOIN (gpu_hi, gpu_din{16..31});
+
+Addqselb := BUF8 (addqselb, addqsel);
+Data_x := MX2 (data_x, gpu_lo, addq_x, addqselb);
+Data_y := MX2 (data_y, gpu_hi, addq_y, addqselb);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ data_x = (addqsel ? addq_x : (int16)(gpu_din & 0xFFFF));
+ data_y = (addqsel ? addq_y : (int16)(gpu_din >> 16));
+//////////////////////////////////////////////////////////////////////////////////////
+
+//END;
+}
+
+/******************************************************************
+addradd
+29/11/90
+
+Blitter Address Adder
+---------------------
+The blitter address adder is a pair of sixteen bit adders, one
+each for X and Y. The multiplexing of the input terms is
+performed elsewhere, but this adder can also perform modulo
+arithmetic to align X-addresses onto phrase boundaries.
+
+modx[0..2] take values
+000 no mask
+001 mask bit 0
+010 mask bits 1-0
+..
+110 mask bits 5-0
+
+******************************************************************/
+
+/*IMPORT duplo, tosh;
+
+DEF ADDRADD (
+INT16/ addq_x
+INT16/ addq_y
+ :OUT;
+ a1fracldi // propagate address adder carry
+INT16/ adda_x
+INT16/ adda_y
+INT16/ addb_x
+INT16/ addb_y
+ clk[0] // co-processor clock
+ modx[0..2]
+ suba_x
+ suba_y
+ :IN);
+
+BEGIN
+
+Zero := TIE0 (zero);*/
+void ADDRADD(int16 &addq_x, int16 &addq_y, bool a1fracldi,
+ uint16 adda_x, uint16 adda_y, uint16 addb_x, uint16 addb_y, uint8 modx, bool suba_x, bool suba_y)
+{
+
+/* Perform the addition */
+
+/*Adder_x := ADD16 (addqt_x[0..15], co_x, adda_x{0..15}, addb_x{0..15}, ci_x);
+Adder_y := ADD16 (addq_y[0..15], co_y, adda_y{0..15}, addb_y{0..15}, ci_y);*/
+
+/* latch carry and propagate if required */
+
+/*Cxt0 := AN2 (cxt[0], co_x, a1fracldi);
+Cxt1 := FD1Q (cxt[1], cxt[0], clk[0]);
+Ci_x := EO (ci_x, cxt[1], suba_x);
+
+yt0 := AN2 (cyt[0], co_y, a1fracldi);
+Cyt1 := FD1Q (cyt[1], cyt[0], clk[0]);
+Ci_y := EO (ci_y, cyt[1], suba_y);*/
+
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+//I'm sure the following will generate a bunch of warnings, but will have to do for now.
+ static uint16 co_x = 0, co_y = 0; // Carry out has to propogate between function calls...
+ uint16 ci_x = co_x ^ (suba_x ? 1 : 0);
+ uint16 ci_y = co_y ^ (suba_y ? 1 : 0);
+ uint32 addqt_x = adda_x + addb_x + ci_x;
+ uint32 addqt_y = adda_y + addb_y + ci_y;
+ co_x = ((addqt_x & 0x10000) && a1fracldi ? 1 : 0);
+ co_y = ((addqt_y & 0x10000) && a1fracldi ? 1 : 0);
+//////////////////////////////////////////////////////////////////////////////////////
+
+/* Mask low bits of X to 0 if required */
+
+/*Masksel := D38H (unused[0], masksel[0..4], maskbit[5], unused[1], modx[0..2]);
+
+Maskbit[0-4] := OR2 (maskbit[0-4], masksel[0-4], maskbit[1-5]);
+
+Mask[0-5] := MX2 (addq_x[0-5], addqt_x[0-5], zero, maskbit[0-5]);
+
+Addq_x := JOIN (addq_x, addq_x[0..5], addqt_x[6..15]);
+Addq_y := JOIN (addq_y, addq_y[0..15]);*/
+
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ int16 mask[8] = { 0xFFFF, 0xFFFE, 0xFFFC, 0xFFF8, 0xFFF0, 0xFFE0, 0xFFC0, 0x0000 };
+ addq_x = addqt_x & mask[modx];
+ addq_y = addqt_y & 0xFFFF;
+//////////////////////////////////////////////////////////////////////////////////////
+
+//Unused[0-1] := DUMMY (unused[0-1]);
+
+//END;
+}
+
+/*
+DEF DATA (
+ wdata[0..63] // co-processor write data bus
+ :BUS;
+ dcomp[0..7] // data byte equal flags
+ srcd[0..7] // bits to use for bit to byte expansion
+ zcomp[0..3] // output from Z comparators
+ :OUT;
+ a1_x[0..1] // low two bits of A1 X pointer
+ big_pix // pixel organisation is big-endian
+ blitter_active // blitter is active
+ clk // co-processor clock
+ cmpdst // compare dest rather than source
+ colorld // load the pattern color fields
+ daddasel[0..2] // data adder input A selection
+ daddbsel[0..3] // data adder input B selection
+ daddmode[0..2] // data adder mode
+ daddq_sel // select adder output vs. GPU data
+ data[0..63] // co-processor read data bus
+ data_ena // enable write data
+ data_sel[0..1] // select data to write
+ dbinh\[0..7] // byte oriented changed data inhibits
+ dend[0..5] // end of changed write data zone
+ dpipe[0..1] // load computed data pipe-line latch
+ dstart[0..5] // start of changed write data zone
+ dstdld[0..1] // dest data load (two halves)
+ dstzld[0..1] // dest zed load (two halves)
+ ext_int // enable extended precision intensity calculations
+INT32/ gpu_din // GPU data bus
+ iincld // I increment load
+ iincldx // alternate I increment load
+ init_if // initialise I fraction phase
+ init_ii // initialise I integer phase
+ init_zf // initialise Z fraction phase
+ intld[0..3] // computed intensities load
+ istepadd // intensity step integer add
+ istepfadd // intensity step fraction add
+ istepld // I step load
+ istepdld // I step delta load
+ lfu_func[0..3] // LFU function code
+ patdadd // pattern data gouraud add
+ patdld[0..1] // pattern data load (two halves)
+ pdsel[0..1] // select pattern data type
+ phrase_mode // phrase write mode
+ reload // transfer contents of double buffers
+ reset\ // system reset
+ srcd1ld[0..1] // source register 1 load (two halves)
+ srcdread // source data read load enable
+ srczread // source zed read load enable
+ srcshift[0..5] // source alignment shift
+ srcz1ld[0..1] // source zed 1 load (two halves)
+ srcz2add // zed fraction gouraud add
+ srcz2ld[0..1] // source zed 2 load (two halves)
+ textrgb // texture mapping in RGB mode
+ txtd[0..63] // data from the texture unit
+ zedld[0..3] // computed zeds load
+ zincld // Z increment load
+ zmode[0..2] // Z comparator mode
+ zpipe[0..1] // load computed zed pipe-line latch
+ zstepadd // zed step integer add
+ zstepfadd // zed step fraction add
+ zstepld // Z step load
+ zstepdld // Z step delta load
+ :IN);
+*/
+
+void DATA(uint64 &wdata, uint8 &dcomp, uint8 &zcomp, bool &nowrite,
+ bool big_pix, bool cmpdst, uint8 daddasel, uint8 daddbsel, uint8 daddmode, bool daddq_sel, uint8 data_sel,
+ uint8 dbinh, uint8 dend, uint8 dstart, uint64 dstd, uint32 iinc, uint8 lfu_func, uint64 &patd, bool patdadd,
+ bool phrase_mode, uint64 srcd, bool srcdread, bool srczread, bool srcz2add, uint8 zmode,
+ bool bcompen, bool bkgwren, bool dcompen, uint8 icount, uint8 pixsize,
+ uint64 &srcz, uint64 dstz, uint32 zinc)
+{
+/*
+ Stuff we absolutely *need* to have passed in/out:
+IN:
+ patdadd, dstd, srcd, patd, daddasel, daddbsel, daddmode, iinc, srcz1, srcz2, big_pix, phrase_mode, cmpdst
+OUT:
+ changed patd (wdata I guess...) (Nope. We pass it back directly now...)
+*/
+
+// Source data registers
+
+/*Data_src := DATA_SRC (srcdlo, srcdhi, srcz[0..1], srczo[0..1], srczp[0...1], srcz1[0..1], srcz2[0..1], big_pix,
+ clk, gpu_din, intld[0..3], local_data0, local_data1, srcd1ld[0..1], srcdread, srczread, srcshift[0..5],
+ srcz1ld[0..1], srcz2add, srcz2ld[0..1], zedld[0..3], zpipe[0..1]);
+Srcd[0-7] := JOIN (srcd[0-7], srcdlo{0-7});
+Srcd[8-31] := JOIN (srcd[8-31], srcdlo{8-31});
+Srcd[32-63] := JOIN (srcd[32-63], srcdhi{0-31});*/
+
+// Destination data registers
+
+/*Data_dst := DATA_DST (dstd[0..63], dstz[0..1], clk, dstdld[0..1], dstzld[0..1], load_data[0..1]);
+Dstdlo := JOIN (dstdlo, dstd[0..31]);
+Dstdhi := JOIN (dstdhi, dstd[32..63]);*/
+
+// Pattern and Color data registers
+
+// Looks like this is simply another register file for the pattern data registers. No adding or anything funky
+// going on. Note that patd & patdv will output the same info.
+// Patdldl/h (patdld[0..1]) can select the local_data bus to overwrite the current pattern data...
+// Actually, it can be either patdld OR patdadd...!
+/*Data_pat := DATA_PAT (colord[0..15], int0dp[8..10], int1dp[8..10], int2dp[8..10], int3dp[8..10], mixsel[0..2],
+ patd[0..63], patdv[0..1], clk, colorld, dpipe[0], ext_int, gpu_din, intld[0..3], local_data0, local_data1,
+ patdadd, patdld[0..1], reload, reset\);
+Patdlo := JOIN (patdlo, patd[0..31]);
+Patdhi := JOIN (patdhi, patd[32..63]);*/
+
+// Multiplying data Mixer (NOT IN JAGUAR I)
+
+/*Datamix := DATAMIX (patdo[0..1], clk, colord[0..15], dpipe[1], dstd[0...63], int0dp[8..10], int1dp[8..10],
+ int2dp[8..10], int3dp[8..10], mixsel[0..2], patd[0..63], pdsel[0..1], srcd[0..63], textrgb, txtd[0..63]);*/
+
+// Logic function unit
+
+/*Lfu := LFU (lfu[0..1], srcdlo, srcdhi, dstdlo, dstdhi, lfu_func[0..3]);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ uint64 funcmask[2] = { 0, 0xFFFFFFFFFFFFFFFFLL };
+ uint64 func0 = funcmask[lfu_func & 0x01];
+ uint64 func1 = funcmask[(lfu_func >> 1) & 0x01];
+ uint64 func2 = funcmask[(lfu_func >> 2) & 0x01];
+ uint64 func3 = funcmask[(lfu_func >> 3) & 0x01];
+ uint64 lfu = (~srcd & ~dstd & func0) | (~srcd & dstd & func1) | (srcd & ~dstd & func2) | (srcd & dstd & func3);
+//////////////////////////////////////////////////////////////////////////////////////
+
+// Increment and Step Registers
+
+// Does it do anything without the step add lines? Check it!
+// No. This is pretty much just a register file without the Jaguar II lines...
+/*Inc_step := INC_STEP (iinc, istep[0..31], zinc, zstep[0..31], clk, ext_int, gpu_din, iincld, iincldx, istepadd,
+ istepfadd, istepld, istepdld, reload, reset\, zincld, zstepadd, zstepfadd, zstepld, zstepdld);
+Istep := JOIN (istep, istep[0..31]);
+Zstep := JOIN (zstep, zstep[0..31]);*/
+
+// Pixel data comparator
+
+/*Datacomp := DATACOMP (dcomp[0..7], cmpdst, dstdlo, dstdhi, patdlo, patdhi, srcdlo, srcdhi);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ dcomp = 0;
+ uint64 cmpd = patd ^ (cmpdst ? dstd : srcd);
+
+ if ((cmpd & 0x00000000000000FFLL) == 0)
+ dcomp |= 0x01;
+ if ((cmpd & 0x000000000000FF00LL) == 0)
+ dcomp |= 0x02;
+ if ((cmpd & 0x0000000000FF0000LL) == 0)
+ dcomp |= 0x04;
+ if ((cmpd & 0x00000000FF000000LL) == 0)
+ dcomp |= 0x08;
+ if ((cmpd & 0x000000FF00000000LL) == 0)
+ dcomp |= 0x10;
+ if ((cmpd & 0x0000FF0000000000LL) == 0)
+ dcomp |= 0x20;
+ if ((cmpd & 0x00FF000000000000LL) == 0)
+ dcomp |= 0x40;
+ if ((cmpd & 0xFF00000000000000LL) == 0)
+ dcomp |= 0x80;
+//////////////////////////////////////////////////////////////////////////////////////
+
+// Zed comparator for Z-buffer operations
+
+/*Zedcomp := ZEDCOMP (zcomp[0..3], srczp[0..1], dstz[0..1], zmode[0..2]);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+//srczp is srcz pipelined, also it goes through a source shift as well...
+/*The shift is basically like so (each piece is 16 bits long):
+
+ 0 1 2 3 4 5 6
+ srcz1lolo srcz1lohi srcz1hilo srcz1hihi srcrz2lolo srcz2lohi srcz2hilo
+
+with srcshift bits 4 & 5 selecting the start position
+*/
+//So... basically what we have here is:
+ zcomp = 0;
+
+ if ((((srcz & 0x000000000000FFFFLL) < (dstz & 0x000000000000FFFFLL)) && (zmode & 0x01))
+ || (((srcz & 0x000000000000FFFFLL) == (dstz & 0x000000000000FFFFLL)) && (zmode & 0x02))
+ || (((srcz & 0x000000000000FFFFLL) > (dstz & 0x000000000000FFFFLL)) && (zmode & 0x04)))
+ zcomp |= 0x01;
+
+ if ((((srcz & 0x00000000FFFF0000LL) < (dstz & 0x00000000FFFF0000LL)) && (zmode & 0x01))
+ || (((srcz & 0x00000000FFFF0000LL) == (dstz & 0x00000000FFFF0000LL)) && (zmode & 0x02))
+ || (((srcz & 0x00000000FFFF0000LL) > (dstz & 0x00000000FFFF0000LL)) && (zmode & 0x04)))
+ zcomp |= 0x02;
+
+ if ((((srcz & 0x0000FFFF00000000LL) < (dstz & 0x0000FFFF00000000LL)) && (zmode & 0x01))
+ || (((srcz & 0x0000FFFF00000000LL) == (dstz & 0x0000FFFF00000000LL)) && (zmode & 0x02))
+ || (((srcz & 0x0000FFFF00000000LL) > (dstz & 0x0000FFFF00000000LL)) && (zmode & 0x04)))
+ zcomp |= 0x04;
+
+ if ((((srcz & 0xFFFF000000000000LL) < (dstz & 0xFFFF000000000000LL)) && (zmode & 0x01))
+ || (((srcz & 0xFFFF000000000000LL) == (dstz & 0xFFFF000000000000LL)) && (zmode & 0x02))
+ || (((srcz & 0xFFFF000000000000LL) > (dstz & 0xFFFF000000000000LL)) && (zmode & 0x04)))
+ zcomp |= 0x08;
+
+//TEMP, TO TEST IF ZCOMP IS THE CULPRIT...
+//Nope, this is NOT the problem...
+//zcomp=0;
+// We'll do the comparison/bit/byte inhibits here, since that's they way it happens
+// in the real thing (dcomp goes out to COMP_CTRL and back into DATA through dbinh)...
+#if 1
+ uint8 dbinht;
+// bool nowrite;
+ COMP_CTRL(dbinht, nowrite,
+ bcompen, true/*big_pix*/, bkgwren, dcomp, dcompen, icount, pixsize, phrase_mode, srcd & 0xFF, zcomp);
+ dbinh = dbinht;
+// dbinh = 0x00;
+#endif
+
+#if 1
+#ifdef VERBOSE_BLITTER_LOGGING
+if (logBlit)
+{
+ printf("\n[dcomp=%02X zcomp=%02X dbinh=%02X]\n", dcomp, zcomp, dbinh);
+ fflush(stdout);
+}//*/
+#endif
+#endif
+//////////////////////////////////////////////////////////////////////////////////////
+
+// 22 Mar 94
+// The data initializer - allows all four initial values to be computed from one (NOT IN JAGUAR I)
+
+/*Datinit := DATINIT (initcin[0..3], initinc[0..63], initpix[0..15], a1_x[0..1], big_pix, clk, iinc, init_if, init_ii,
+ init_zf, istep[0..31], zinc, zstep[0..31]);*/
+
+// Adder array for Z and intensity increments
+
+/*Addarray := ADDARRAY (addq[0..3], clk, daddasel[0..2], daddbsel[0..3], daddmode[0..2], dstdlo, dstdhi, iinc,
+ initcin[0..3], initinc[0..63], initpix[0..15], istep, patdv[0..1], srcdlo, srcdhi, srcz1[0..1],
+ srcz2[0..1], reset\, zinc, zstep);*/
+/*void ADDARRAY(uint16 * addq, uint8 daddasel, uint8 daddbsel, uint8 daddmode,
+ uint64 dstd, uint32 iinc, uint8 initcin[], uint64 initinc, uint16 initpix,
+ uint32 istep, uint64 patd, uint64 srcd, uint64 srcz1, uint64 srcz2,
+ uint32 zinc, uint32 zstep)*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ uint16 addq[4];
+ uint8 initcin[4] = { 0, 0, 0, 0 };
+ ADDARRAY(addq, daddasel, daddbsel, daddmode, dstd, iinc, initcin, 0, 0, 0, patd, srcd, 0, 0, 0, 0);
+
+ //This is normally done asynchronously above (thru local_data) when in patdadd mode...
+//And now it's passed back to the caller to be persistent between calls...!
+//But it's causing some serious fuck-ups in T2K now... !!! FIX !!! [DONE--???]
+//Weird! It doesn't anymore...!
+ if (patdadd)
+ patd = ((uint64)addq[3] << 48) | ((uint64)addq[2] << 32) | ((uint64)addq[1] << 16) | (uint64)addq[0];
+//////////////////////////////////////////////////////////////////////////////////////
+
+// Local data bus multiplexer
+
+/*Local_mux := LOCAL_MUX (local_data[0..1], load_data[0..1],
+ addq[0..3], gpu_din, data[0..63], blitter_active, daddq_sel);
+Local_data0 := JOIN (local_data0, local_data[0]);
+Local_data1 := JOIN (local_data1, local_data[1]);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+//////////////////////////////////////////////////////////////////////////////////////
+
+// Data output multiplexer and tri-state drive
+
+/*Data_mux := DATA_MUX (wdata[0..63], addq[0..3], big_pix, dstdlo, dstdhi, dstz[0..1], data_sel[0..1], data_ena,
+ dstart[0..5], dend[0..5], dbinh\[0..7], lfu[0..1], patdo[0..1], phrase_mode, srczo[0..1]);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+// NOTE: patdo comes from DATAMIX and can be considered the same as patd for Jaguar I
+
+//////////////////////////////////////////////////////////////////////////////////////
+//}
+
+/*DEF DATA_MUX (
+ wdata[0..63] // co-processor rwrite data bus
+ :BUS;
+INT16/ addq[0..3]
+ big_pix // Pixel organisation is big-endian
+INT32/ dstdlo
+INT32/ dstdhi
+INT32/ dstzlo
+INT32/ dstzhi
+ data_sel[0..1] // source of write data
+ data_ena // enable write data onto read/write bus
+ dstart[0..5] // start of changed write data
+ dend[0..5] // end of changed write data
+ dbinh\[0..7] // byte oriented changed data inhibits
+INT32/ lfu[0..1]
+INT32/ patd[0..1]
+ phrase_mode // phrase write mode
+INT32/ srczlo
+INT32/ srczhi
+ :IN);*/
+
+/*INT32/ addql[0..1], ddatlo, ddathi zero32
+:LOCAL;
+BEGIN
+
+Phrase_mode\ := INV1 (phrase_mode\, phrase_mode);
+Zero := TIE0 (zero);
+Zero32 := JOIN (zero32, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero, zero);*/
+
+/* Generate a changed data mask */
+
+/*Edis := OR6 (edis\, dend[0..5]);
+Ecoarse := DECL38E (e_coarse\[0..7], dend[3..5], edis\);
+E_coarse[0] := INV1 (e_coarse[0], e_coarse\[0]);
+Efine := DECL38E (unused[0], e_fine\[1..7], dend[0..2], e_coarse[0]);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ uint8 decl38e[2][8] = { { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF },
+ { 0xFE, 0xFD, 0xFB, 0xF7, 0xEF, 0xDF, 0xBF, 0x7F } };
+ uint8 dech38[8] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
+ uint8 dech38el[2][8] = { { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 },
+ { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } };
+
+ int en = (dend & 0x3F ? 1 : 0);
+ uint8 e_coarse = decl38e[en][(dend & 0x38) >> 3]; // Actually, this is e_coarse inverted...
+ uint8 e_fine = decl38e[(e_coarse & 0x01) ^ 0x01][dend & 0x07];
+ e_fine &= 0xFE;
+//////////////////////////////////////////////////////////////////////////////////////
+
+/*Scoarse := DECH38 (s_coarse[0..7], dstart[3..5]);
+Sfen\ := INV1 (sfen\, s_coarse[0]);
+Sfine := DECH38EL (s_fine[0..7], dstart[0..2], sfen\);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ uint8 s_coarse = dech38[(dstart & 0x38) >> 3];
+ uint8 s_fine = dech38el[(s_coarse & 0x01) ^ 0x01][dstart & 0x07];
+//////////////////////////////////////////////////////////////////////////////////////
+
+/*Maskt[0] := BUF1 (maskt[0], s_fine[0]);
+Maskt[1-7] := OAN1P (maskt[1-7], maskt[0-6], s_fine[1-7], e_fine\[1-7]);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ uint16 maskt = s_fine & 0x0001;
+ maskt |= (((maskt & 0x0001) || (s_fine & 0x02)) && (e_fine & 0x02) ? 0x0002 : 0x0000);
+ maskt |= (((maskt & 0x0002) || (s_fine & 0x04)) && (e_fine & 0x04) ? 0x0004 : 0x0000);
+ maskt |= (((maskt & 0x0004) || (s_fine & 0x08)) && (e_fine & 0x08) ? 0x0008 : 0x0000);
+ maskt |= (((maskt & 0x0008) || (s_fine & 0x10)) && (e_fine & 0x10) ? 0x0010 : 0x0000);
+ maskt |= (((maskt & 0x0010) || (s_fine & 0x20)) && (e_fine & 0x20) ? 0x0020 : 0x0000);
+ maskt |= (((maskt & 0x0020) || (s_fine & 0x40)) && (e_fine & 0x40) ? 0x0040 : 0x0000);
+ maskt |= (((maskt & 0x0040) || (s_fine & 0x80)) && (e_fine & 0x80) ? 0x0080 : 0x0000);
+//////////////////////////////////////////////////////////////////////////////////////
+
+/* Produce a look-ahead on the ripple carry:
+masktla = s_coarse[0] . /e_coarse[0] */
+/*Masktla := AN2 (masktla, s_coarse[0], e_coarse\[0]);
+Maskt[8] := OAN1P (maskt[8], masktla, s_coarse[1], e_coarse\[1]);
+Maskt[9-14] := OAN1P (maskt[9-14], maskt[8-13], s_coarse[2-7], e_coarse\[2-7]);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ maskt |= (((s_coarse & e_coarse & 0x01) || (s_coarse & 0x02)) && (e_coarse & 0x02) ? 0x0100 : 0x0000);
+ maskt |= (((maskt & 0x0100) || (s_coarse & 0x04)) && (e_coarse & 0x04) ? 0x0200 : 0x0000);
+ maskt |= (((maskt & 0x0200) || (s_coarse & 0x08)) && (e_coarse & 0x08) ? 0x0400 : 0x0000);
+ maskt |= (((maskt & 0x0400) || (s_coarse & 0x10)) && (e_coarse & 0x10) ? 0x0800 : 0x0000);
+ maskt |= (((maskt & 0x0800) || (s_coarse & 0x20)) && (e_coarse & 0x20) ? 0x1000 : 0x0000);
+ maskt |= (((maskt & 0x1000) || (s_coarse & 0x40)) && (e_coarse & 0x40) ? 0x2000 : 0x0000);
+ maskt |= (((maskt & 0x2000) || (s_coarse & 0x80)) && (e_coarse & 0x80) ? 0x4000 : 0x0000);
+//////////////////////////////////////////////////////////////////////////////////////
+
+/* The bit terms are mirrored for big-endian pixels outside phrase
+mode. The byte terms are mirrored for big-endian pixels in phrase
+mode. */
+
+/*Mirror_bit := AN2M (mir_bit, phrase_mode\, big_pix);
+Mirror_byte := AN2H (mir_byte, phrase_mode, big_pix);
+
+Masktb[14] := BUF1 (masktb[14], maskt[14]);
+Masku[0] := MX4 (masku[0], maskt[0], maskt[7], maskt[14], zero, mir_bit, mir_byte);
+Masku[1] := MX4 (masku[1], maskt[1], maskt[6], maskt[14], zero, mir_bit, mir_byte);
+Masku[2] := MX4 (masku[2], maskt[2], maskt[5], maskt[14], zero, mir_bit, mir_byte);
+Masku[3] := MX4 (masku[3], maskt[3], maskt[4], masktb[14], zero, mir_bit, mir_byte);
+Masku[4] := MX4 (masku[4], maskt[4], maskt[3], masktb[14], zero, mir_bit, mir_byte);
+Masku[5] := MX4 (masku[5], maskt[5], maskt[2], masktb[14], zero, mir_bit, mir_byte);
+Masku[6] := MX4 (masku[6], maskt[6], maskt[1], masktb[14], zero, mir_bit, mir_byte);
+Masku[7] := MX4 (masku[7], maskt[7], maskt[0], masktb[14], zero, mir_bit, mir_byte);
+Masku[8] := MX2 (masku[8], maskt[8], maskt[13], mir_byte);
+Masku[9] := MX2 (masku[9], maskt[9], maskt[12], mir_byte);
+Masku[10] := MX2 (masku[10], maskt[10], maskt[11], mir_byte);
+Masku[11] := MX2 (masku[11], maskt[11], maskt[10], mir_byte);
+Masku[12] := MX2 (masku[12], maskt[12], maskt[9], mir_byte);
+Masku[13] := MX2 (masku[13], maskt[13], maskt[8], mir_byte);
+Masku[14] := MX2 (masku[14], maskt[14], maskt[0], mir_byte);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ bool mir_bit = true/*big_pix*/ && !phrase_mode;
+ bool mir_byte = true/*big_pix*/ && phrase_mode;
+ uint16 masku = maskt;
+
+ if (mir_bit)
+ {
+ masku &= 0xFF00;
+ masku |= (maskt >> 7) & 0x0001;
+ masku |= (maskt >> 5) & 0x0002;
+ masku |= (maskt >> 3) & 0x0004;
+ masku |= (maskt >> 1) & 0x0008;
+ masku |= (maskt << 1) & 0x0010;
+ masku |= (maskt << 3) & 0x0020;
+ masku |= (maskt << 5) & 0x0040;
+ masku |= (maskt << 7) & 0x0080;
+ }
+
+ if (mir_byte)
+ {
+ masku = 0;
+ masku |= (maskt >> 14) & 0x0001;
+ masku |= (maskt >> 13) & 0x0002;
+ masku |= (maskt >> 12) & 0x0004;
+ masku |= (maskt >> 11) & 0x0008;
+ masku |= (maskt >> 10) & 0x0010;
+ masku |= (maskt >> 9) & 0x0020;
+ masku |= (maskt >> 8) & 0x0040;
+ masku |= (maskt >> 7) & 0x0080;
+
+ masku |= (maskt >> 5) & 0x0100;
+ masku |= (maskt >> 3) & 0x0200;
+ masku |= (maskt >> 1) & 0x0400;
+ masku |= (maskt << 1) & 0x0800;
+ masku |= (maskt << 3) & 0x1000;
+ masku |= (maskt << 5) & 0x2000;
+ masku |= (maskt << 7) & 0x4000;
+ }
+//////////////////////////////////////////////////////////////////////////////////////
+
+/* The maskt terms define the area for changed data, but the byte
+inhibit terms can override these */
+
+/*Mask[0-7] := AN2 (mask[0-7], masku[0-7], dbinh\[0]);
+Mask[8-14] := AN2H (mask[8-14], masku[8-14], dbinh\[1-7]);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ uint16 mask = masku & (!(dbinh & 0x01) ? 0xFFFF : 0xFF00);
+ mask &= ~(((uint16)dbinh & 0x00FE) << 7);
+//////////////////////////////////////////////////////////////////////////////////////
+
+/*Addql[0] := JOIN (addql[0], addq[0..1]);
+Addql[1] := JOIN (addql[1], addq[2..3]);
+
+Dsel0b[0-1] := BUF8 (dsel0b[0-1], data_sel[0]);
+Dsel1b[0-1] := BUF8 (dsel1b[0-1], data_sel[1]);
+Ddatlo := MX4 (ddatlo, patd[0], lfu[0], addql[0], zero32, dsel0b[0], dsel1b[0]);
+Ddathi := MX4 (ddathi, patd[1], lfu[1], addql[1], zero32, dsel0b[1], dsel1b[1]);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ uint64 dmux[4];
+ dmux[0] = patd;
+ dmux[1] = lfu;
+ dmux[2] = ((uint64)addq[3] << 48) | ((uint64)addq[2] << 32) | ((uint64)addq[1] << 16) | (uint64)addq[0];
+ dmux[3] = 0;
+ uint64 ddat = dmux[data_sel];
+//////////////////////////////////////////////////////////////////////////////////////
+
+/*Zed_sel := AN2 (zed_sel, data_sel[0..1]);
+Zed_selb[0-1] := BUF8 (zed_selb[0-1], zed_sel);
+
+Dat[0-7] := MX4 (dat[0-7], dstdlo{0-7}, ddatlo{0-7}, dstzlo{0-7}, srczlo{0-7}, mask[0-7], zed_selb[0]);
+Dat[8-15] := MX4 (dat[8-15], dstdlo{8-15}, ddatlo{8-15}, dstzlo{8-15}, srczlo{8-15}, mask[8], zed_selb[0]);
+Dat[16-23] := MX4 (dat[16-23], dstdlo{16-23}, ddatlo{16-23}, dstzlo{16-23}, srczlo{16-23}, mask[9], zed_selb[0]);
+Dat[24-31] := MX4 (dat[24-31], dstdlo{24-31}, ddatlo{24-31}, dstzlo{24-31}, srczlo{24-31}, mask[10], zed_selb[0]);
+Dat[32-39] := MX4 (dat[32-39], dstdhi{0-7}, ddathi{0-7}, dstzhi{0-7}, srczhi{0-7}, mask[11], zed_selb[1]);
+Dat[40-47] := MX4 (dat[40-47], dstdhi{8-15}, ddathi{8-15}, dstzhi{8-15}, srczhi{8-15}, mask[12], zed_selb[1]);
+Dat[48-55] := MX4 (dat[48-55], dstdhi{16-23}, ddathi{16-23}, dstzhi{16-23}, srczhi{16-23}, mask[13], zed_selb[1]);
+Dat[56-63] := MX4 (dat[56-63], dstdhi{24-31}, ddathi{24-31}, dstzhi{24-31}, srczhi{24-31}, mask[14], zed_selb[1]);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ wdata = ((ddat & mask) | (dstd & ~mask)) & 0x00000000000000FFLL;
+ wdata |= (mask & 0x0100 ? ddat : dstd) & 0x000000000000FF00LL;
+ wdata |= (mask & 0x0200 ? ddat : dstd) & 0x0000000000FF0000LL;
+ wdata |= (mask & 0x0400 ? ddat : dstd) & 0x00000000FF000000LL;
+ wdata |= (mask & 0x0800 ? ddat : dstd) & 0x000000FF00000000LL;
+ wdata |= (mask & 0x1000 ? ddat : dstd) & 0x0000FF0000000000LL;
+ wdata |= (mask & 0x2000 ? ddat : dstd) & 0x00FF000000000000LL;
+ wdata |= (mask & 0x4000 ? ddat : dstd) & 0xFF00000000000000LL;
+/*if (logBlit)
+{
+ printf("\n[ddat=%08X%08X dstd=%08X%08X wdata=%08X%08X mask=%04X]\n",
+ (uint32)(ddat >> 32), (uint32)(ddat & 0xFFFFFFFF),
+ (uint32)(dstd >> 32), (uint32)(dstd & 0xFFFFFFFF),
+ (uint32)(wdata >> 32), (uint32)(wdata & 0xFFFFFFFF), mask);
+ fflush(stdout);
+}//*/
+//This is a crappy way of handling this, but it should work for now...
+ uint64 zwdata;
+ zwdata = ((srcz & mask) | (dstz & ~mask)) & 0x00000000000000FFLL;
+ zwdata |= (mask & 0x0100 ? srcz : dstz) & 0x000000000000FF00LL;
+ zwdata |= (mask & 0x0200 ? srcz : dstz) & 0x0000000000FF0000LL;
+ zwdata |= (mask & 0x0400 ? srcz : dstz) & 0x00000000FF000000LL;
+ zwdata |= (mask & 0x0800 ? srcz : dstz) & 0x000000FF00000000LL;
+ zwdata |= (mask & 0x1000 ? srcz : dstz) & 0x0000FF0000000000LL;
+ zwdata |= (mask & 0x2000 ? srcz : dstz) & 0x00FF000000000000LL;
+ zwdata |= (mask & 0x4000 ? srcz : dstz) & 0xFF00000000000000LL;
+if (logBlit)
+{
+ printf("\n[srcz=%08X%08X dstz=%08X%08X zwdata=%08X%08X mask=%04X]\n",
+ (uint32)(srcz >> 32), (uint32)(srcz & 0xFFFFFFFF),
+ (uint32)(dstz >> 32), (uint32)(dstz & 0xFFFFFFFF),
+ (uint32)(zwdata >> 32), (uint32)(zwdata & 0xFFFFFFFF), mask);
+ fflush(stdout);
+}//*/
+ srcz = zwdata;
+//////////////////////////////////////////////////////////////////////////////////////
+
+/*Data_enab[0-1] := BUF8 (data_enab[0-1], data_ena);
+Datadrv[0-31] := TS (wdata[0-31], dat[0-31], data_enab[0]);
+Datadrv[32-63] := TS (wdata[32-63], dat[32-63], data_enab[1]);
+
+Unused[0] := DUMMY (unused[0]);
+
+END;*/
+}
+
+/** COMP_CTRL - Comparator output control logic *****************
+
+This block is responsible for taking the comparator outputs and
+using them as appropriate to inhibit writes. Two methods are
+supported for inhibiting write data:
+
+- suppression of the inner loop controlled write operation
+- a set of eight byte inhibit lines to write back dest data
+
+The first technique is used in pixel oriented modes, the second in
+phrase mode, but the phrase mode form is only applicable to eight
+and sixteen bit pixel modes.
+
+Writes can be suppressed by data being equal, by the Z comparator
+conditions being met, or by the bit to pixel expansion scheme.
+
+Pipe-lining issues: the data derived comparator outputs are stable
+until the next data read, well after the affected write from this
+operation. However, the inner counter bits can count immediately
+before the ack for the last write. Therefore, it is necessary to
+delay bcompbit select terms by one inner loop pipe-line stage,
+when generating the select for the data control - the output is
+delayed one further tick to give it write data timing (2/34).
+
+There is also a problem with computed data - the new values are
+calculated before the write associated with the old value has been
+performed. The is taken care of within the zed comparator by
+pipe-lining the comparator inputs where appropriate.
+*/
+
+//#define LOG_COMP_CTRL
+/*DEF COMP_CTRL (
+ dbinh\[0..7] // destination byte inhibit lines
+ nowrite // suppress inner loop write operation
+ :OUT;
+ bcompen // bit selector inhibit enable
+ big_pix // pixels are big-endian
+ bkgwren // enable dest data write in pix inhibit
+ clk // co-processor clock
+ dcomp[0..7] // output of data byte comparators
+ dcompen // data comparator inhibit enable
+ icount[0..2] // low bits of inner count
+ pixsize[0..2] // destination pixel size
+ phrase_mode // phrase write mode
+ srcd[0..7] // bits to use for bit to byte expansion
+ step_inner // inner loop advance
+ zcomp[0..3] // output of word zed comparators
+ :IN);*/
+void COMP_CTRL(uint8 &dbinh, bool &nowrite,
+ bool bcompen, bool big_pix, bool bkgwren, uint8 dcomp, bool dcompen, uint8 icount,
+ uint8 pixsize, bool phrase_mode, uint8 srcd, uint8 zcomp)
+{
+//BEGIN
+
+/*Bkgwren\ := INV1 (bkgwren\, bkgwren);
+Phrase_mode\ := INV1 (phrase_mode\, phrase_mode);
+Pixsize\[0-2] := INV2 (pixsize\[0-2], pixsize[0-2]);*/
+
+/* The bit comparator bits are derived from the source data, which
+will have been suitably aligned for phrase mode. The contents of
+the inner counter are used to select which bit to use.
+
+When not in phrase mode the inner count value is used to select
+one bit. It is assumed that the count has already occurred, so,
+7 selects bit 0, etc. In big-endian pixel mode, this turns round,
+so that a count of 7 selects bit 7.
+
+In phrase mode, the eight bits are used directly, and this mode is
+only applicable to 8-bit pixel mode (2/34) */
+
+/*Bcompselt[0-2] := EO (bcompselt[0-2], icount[0-2], big_pix);
+Bcompbit := MX8 (bcompbit, srcd[7], srcd[6], srcd[5],
+ srcd[4], srcd[3], srcd[2], srcd[1], srcd[0], bcompselt[0..2]);
+Bcompbit\ := INV1 (bcompbit\, bcompbit);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+#ifdef LOG_COMP_CTRL
+if (logBlit)
+{
+ printf("\n [bcompen=%s dcompen=%s phrase_mode=%s bkgwren=%s dcomp=%02X zcomp=%02X]", (bcompen ? "T" : "F"), (dcompen ? "T" : "F"), (phrase_mode ? "T" : "F"), (bkgwren ? "T" : "F"), dcomp, zcomp);
+ printf("\n ");
+ fflush(stdout);
+}
+#endif
+ uint8 bcompselt = (big_pix ? ~icount : icount) & 0x07;
+ uint8 bitmask[8] = { 0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01 };
+ bool bcompbit = srcd & bitmask[bcompselt];
+//////////////////////////////////////////////////////////////////////////////////////
+
+/* pipe-line the count */
+/*Bcompsel[0-2] := FDSYNC (bcompsel[0-2], bcompselt[0-2], step_inner, clk);
+Bcompbt := MX8 (bcompbitpt, srcd[7], srcd[6], srcd[5],
+ srcd[4], srcd[3], srcd[2], srcd[1], srcd[0], bcompsel[0..2]);
+Bcompbitp := FD1Q (bcompbitp, bcompbitpt, clk);
+Bcompbitp\ := INV1 (bcompbitp\, bcompbitp);*/
+
+/* For pixel mode, generate the write inhibit signal for all modes
+on bit inhibit, for 8 and 16 bit modes on comparator inhibit, and
+for 16 bit mode on Z inhibit
+
+Nowrite = bcompen . /bcompbit . /phrase_mode
+ + dcompen . dcomp[0] . /phrase_mode . pixsize = 011
+ + dcompen . dcomp[0..1] . /phrase_mode . pixsize = 100
+ + zcomp[0] . /phrase_mode . pixsize = 100
+*/
+
+/*Nowt0 := NAN3 (nowt[0], bcompen, bcompbit\, phrase_mode\);
+Nowt1 := ND6 (nowt[1], dcompen, dcomp[0], phrase_mode\, pixsize\[2], pixsize[0..1]);
+Nowt2 := ND7 (nowt[2], dcompen, dcomp[0..1], phrase_mode\, pixsize[2], pixsize\[0..1]);
+Nowt3 := NAN5 (nowt[3], zcomp[0], phrase_mode\, pixsize[2], pixsize\[0...1]);
+Nowt4 := NAN4 (nowt[4], nowt[0..3]);
+Nowrite := AN2 (nowrite, nowt[4], bkgwren\);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ nowrite = ((bcompen && !bcompbit && !phrase_mode)
+ || (dcompen && (dcomp & 0x01) && !phrase_mode && (pixsize == 3))
+ || (dcompen && ((dcomp & 0x03) == 0x03) && !phrase_mode && (pixsize == 4))
+ || ((zcomp & 0x01) && !phrase_mode && (pixsize == 4)))
+ && !bkgwren;
+//////////////////////////////////////////////////////////////////////////////////////
+
+/*Winht := NAN3 (winht, bcompen, bcompbitp\, phrase_mode\);
+Winhibit := NAN4 (winhibit, winht, nowt[1..3]);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+//This is the same as above, but with bcompbit delayed one tick and called 'winhibit'
+//Small difference: Besides the pipeline effect, it's also not using !bkgwren...
+// bool winhibit = (bcompen && !
+ bool winhibit = (bcompen && !bcompbit && !phrase_mode)
+ || (dcompen && (dcomp & 0x01) && !phrase_mode && (pixsize == 3))
+ || (dcompen && ((dcomp & 0x03) == 0x03) && !phrase_mode && (pixsize == 4))
+ || ((zcomp & 0x01) && !phrase_mode && (pixsize == 4));
+#ifdef LOG_COMP_CTRL
+if (logBlit)
+{
+ printf("[nw=%s wi=%s]", (nowrite ? "T" : "F"), (winhibit ? "T" : "F"));
+ fflush(stdout);
+}
+#endif
+//////////////////////////////////////////////////////////////////////////////////////
+
+/* For phrase mode, generate the byte inhibit signals for eight bit
+mode 011, or sixteen bit mode 100
+dbinh\[0] = pixsize[2] . zcomp[0]
+ + pixsize[2] . dcomp[0] . dcomp[1] . dcompen
+ + /pixsize[2] . dcomp[0] . dcompen
+ + /srcd[0] . bcompen
+
+Inhibits 0-3 are also used when not in phrase mode to write back
+destination data.
+*/
+
+/*Srcd\[0-7] := INV1 (srcd\[0-7], srcd[0-7]);
+
+Di0t0 := NAN2H (di0t[0], pixsize[2], zcomp[0]);
+Di0t1 := NAN4H (di0t[1], pixsize[2], dcomp[0..1], dcompen);
+Di0t2 := NAN2 (di0t[2], srcd\[0], bcompen);
+Di0t3 := NAN3 (di0t[3], pixsize\[2], dcomp[0], dcompen);
+Di0t4 := NAN4 (di0t[4], di0t[0..3]);
+Dbinh[0] := ANR1P (dbinh\[0], di0t[4], phrase_mode, winhibit);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ dbinh = 0;
+ bool di0t0_1 = ((pixsize & 0x04) && (zcomp & 0x01))
+ || ((pixsize & 0x04) && (dcomp & 0x01) && (dcomp & 0x02) && dcompen);
+ bool di0t4 = di0t0_1
+ || (!(srcd & 0x01) && bcompen)
+ || (!(pixsize & 0x04) && (dcomp & 0x01) && dcompen);
+ dbinh |= (!((di0t4 && phrase_mode) || winhibit) ? 0x01 : 0x00);
+#ifdef LOG_COMP_CTRL
+if (logBlit)
+{
+ printf("[di0t0_1=%s di0t4=%s]", (di0t0_1 ? "T" : "F"), (di0t4 ? "T" : "F"));
+ fflush(stdout);
+}
+#endif
+//////////////////////////////////////////////////////////////////////////////////////
+
+/*Di1t0 := NAN3 (di1t[0], pixsize\[2], dcomp[1], dcompen);
+Di1t1 := NAN2 (di1t[1], srcd\[1], bcompen);
+Di1t2 := NAN4 (di1t[2], di0t[0..1], di1t[0..1]);
+Dbinh[1] := ANR1 (dbinh\[1], di1t[2], phrase_mode, winhibit);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ bool di1t2 = di0t0_1
+ || (!(srcd & 0x02) && bcompen)
+ || (!(pixsize & 0x04) && (dcomp & 0x02) && dcompen);
+ dbinh |= (!((di1t2 && phrase_mode) || winhibit) ? 0x02 : 0x00);
+#ifdef LOG_COMP_CTRL
+if (logBlit)
+{
+ printf("[di1t2=%s]", (di1t2 ? "T" : "F"));
+ fflush(stdout);
+}
+#endif
+//////////////////////////////////////////////////////////////////////////////////////
+
+/*Di2t0 := NAN2H (di2t[0], pixsize[2], zcomp[1]);
+Di2t1 := NAN4H (di2t[1], pixsize[2], dcomp[2..3], dcompen);
+Di2t2 := NAN2 (di2t[2], srcd\[2], bcompen);
+Di2t3 := NAN3 (di2t[3], pixsize\[2], dcomp[2], dcompen);
+Di2t4 := NAN4 (di2t[4], di2t[0..3]);
+Dbinh[2] := ANR1 (dbinh\[2], di2t[4], phrase_mode, winhibit);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+//[bcompen=F dcompen=T phrase_mode=T bkgwren=F][nw=F wi=F]
+//[di0t0_1=F di0t4=F][di1t2=F][di2t0_1=T di2t4=T][di3t2=T][di4t0_1=F di2t4=F][di5t2=F][di6t0_1=F di6t4=F][di7t2=F]
+//[dcomp=$00 dbinh=$0C][7804780400007804] (icount=0005, inc=4)
+ bool di2t0_1 = ((pixsize & 0x04) && (zcomp & 0x02))
+ || ((pixsize & 0x04) && (dcomp & 0x04) && (dcomp & 0x08) && dcompen);
+ bool di2t4 = di2t0_1
+ || (!(srcd & 0x04) && bcompen)
+ || (!(pixsize & 0x04) && (dcomp & 0x04) && dcompen);
+ dbinh |= (!((di2t4 && phrase_mode) || winhibit) ? 0x04 : 0x00);
+#ifdef LOG_COMP_CTRL
+if (logBlit)
+{
+ printf("[di2t0_1=%s di2t4=%s]", (di2t0_1 ? "T" : "F"), (di2t4 ? "T" : "F"));
+ fflush(stdout);
+}
+#endif
+//////////////////////////////////////////////////////////////////////////////////////
+
+/*Di3t0 := NAN3 (di3t[0], pixsize\[2], dcomp[3], dcompen);
+Di3t1 := NAN2 (di3t[1], srcd\[3], bcompen);
+Di3t2 := NAN4 (di3t[2], di2t[0..1], di3t[0..1]);
+Dbinh[3] := ANR1 (dbinh\[3], di3t[2], phrase_mode, winhibit);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ bool di3t2 = di2t0_1
+ || (!(srcd & 0x08) && bcompen)
+ || (!(pixsize & 0x04) && (dcomp & 0x08) && dcompen);
+ dbinh |= (!((di3t2 && phrase_mode) || winhibit) ? 0x08 : 0x00);
+#ifdef LOG_COMP_CTRL
+if (logBlit)
+{
+ printf("[di3t2=%s]", (di3t2 ? "T" : "F"));
+ fflush(stdout);
+}
+#endif
+//////////////////////////////////////////////////////////////////////////////////////
+
+/*Di4t0 := NAN2H (di4t[0], pixsize[2], zcomp[2]);
+Di4t1 := NAN4H (di4t[1], pixsize[2], dcomp[4..5], dcompen);
+Di4t2 := NAN2 (di4t[2], srcd\[4], bcompen);
+Di4t3 := NAN3 (di4t[3], pixsize\[2], dcomp[4], dcompen);
+Di4t4 := NAN4 (di4t[4], di4t[0..3]);
+Dbinh[4] := NAN2 (dbinh\[4], di4t[4], phrase_mode);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ bool di4t0_1 = ((pixsize & 0x04) && (zcomp & 0x04))
+ || ((pixsize & 0x04) && (dcomp & 0x10) && (dcomp & 0x20) && dcompen);
+ bool di4t4 = di4t0_1
+ || (!(srcd & 0x10) && bcompen)
+ || (!(pixsize & 0x04) && (dcomp & 0x10) && dcompen);
+ dbinh |= (!(di4t4 && phrase_mode) ? 0x10 : 0x00);
+#ifdef LOG_COMP_CTRL
+if (logBlit)
+{
+ printf("[di4t0_1=%s di2t4=%s]", (di4t0_1 ? "T" : "F"), (di4t4 ? "T" : "F"));
+ fflush(stdout);
+}
+#endif
+//////////////////////////////////////////////////////////////////////////////////////
+
+/*Di5t0 := NAN3 (di5t[0], pixsize\[2], dcomp[5], dcompen);
+Di5t1 := NAN2 (di5t[1], srcd\[5], bcompen);
+Di5t2 := NAN4 (di5t[2], di4t[0..1], di5t[0..1]);
+Dbinh[5] := NAN2 (dbinh\[5], di5t[2], phrase_mode);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ bool di5t2 = di4t0_1
+ || (!(srcd & 0x20) && bcompen)
+ || (!(pixsize & 0x04) && (dcomp & 0x20) && dcompen);
+ dbinh |= (!(di5t2 && phrase_mode) ? 0x20 : 0x00);
+#ifdef LOG_COMP_CTRL
+if (logBlit)
+{
+ printf("[di5t2=%s]", (di5t2 ? "T" : "F"));
+ fflush(stdout);
+}
+#endif
+//////////////////////////////////////////////////////////////////////////////////////
+
+/*Di6t0 := NAN2H (di6t[0], pixsize[2], zcomp[3]);
+Di6t1 := NAN4H (di6t[1], pixsize[2], dcomp[6..7], dcompen);
+Di6t2 := NAN2 (di6t[2], srcd\[6], bcompen);
+Di6t3 := NAN3 (di6t[3], pixsize\[2], dcomp[6], dcompen);
+Di6t4 := NAN4 (di6t[4], di6t[0..3]);
+Dbinh[6] := NAN2 (dbinh\[6], di6t[4], phrase_mode);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ bool di6t0_1 = ((pixsize & 0x04) && (zcomp & 0x08))
+ || ((pixsize & 0x04) && (dcomp & 0x40) && (dcomp & 0x80) && dcompen);
+ bool di6t4 = di6t0_1
+ || (!(srcd & 0x40) && bcompen)
+ || (!(pixsize & 0x04) && (dcomp & 0x40) && dcompen);
+ dbinh |= (!(di6t4 && phrase_mode) ? 0x40 : 0x00);
+#ifdef LOG_COMP_CTRL
+if (logBlit)
+{
+ printf("[di6t0_1=%s di6t4=%s]", (di6t0_1 ? "T" : "F"), (di6t4 ? "T" : "F"));
+ fflush(stdout);
+}
+#endif
+//////////////////////////////////////////////////////////////////////////////////////
+
+/*Di7t0 := NAN3 (di7t[0], pixsize\[2], dcomp[7], dcompen);
+Di7t1 := NAN2 (di7t[1], srcd\[7], bcompen);
+Di7t2 := NAN4 (di7t[2], di6t[0..1], di7t[0..1]);
+Dbinh[7] := NAN2 (dbinh\[7], di7t[2], phrase_mode);*/
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+ bool di7t2 = di6t0_1
+ || (!(srcd & 0x80) && bcompen)
+ || (!(pixsize & 0x04) && (dcomp & 0x80) && dcompen);
+ dbinh |= (!(di7t2 && phrase_mode) ? 0x80 : 0x00);
+#ifdef LOG_COMP_CTRL
+if (logBlit)
+{
+ printf("[di7t2=%s]", (di7t2 ? "T" : "F"));
+ fflush(stdout);
+}
+#endif
+//////////////////////////////////////////////////////////////////////////////////////
+
+//END;
+//kludge
+dbinh = ~dbinh;
+#ifdef LOG_COMP_CTRL
+if (logBlit)
+{
+ printf("[dcomp=$%02X dbinh=$%02X]\n ", dcomp, dbinh);
+ fflush(stdout);
+}
+#endif
+}
+
+
+////////////////////////////////////// C++ CODE //////////////////////////////////////
+//////////////////////////////////////////////////////////////////////////////////////
+
+// !!! TESTING !!! TESTING !!! TESTING !!! TESTING !!! TESTING !!! TESTING !!! TESTING !!!
+// !!! TESTING !!! TESTING !!! TESTING !!! TESTING !!! TESTING !!! TESTING !!! TESTING !!!
+// !!! TESTING !!! TESTING !!! TESTING !!! TESTING !!! TESTING !!! TESTING !!! TESTING !!!
+
+#endif
+
diff --git a/src/jaguar/blitter.h b/src/jaguar/blitter.h
new file mode 100644
index 00000000..5c3febba
--- /dev/null
+++ b/src/jaguar/blitter.h
@@ -0,0 +1,30 @@
+//
+// Jaguar blitter implementation
+//
+
+#ifndef __BLITTER_H__
+#define __BLITTER_H__
+
+//#include "types.h"
+#include "memory.h"
+
+void BlitterInit(void);
+void BlitterReset(void);
+void BlitterDone(void);
+
+uint8 BlitterReadByte(uint32, uint32 who = UNKNOWN);
+uint16 BlitterReadWord(uint32, uint32 who = UNKNOWN);
+uint32 BlitterReadLong(uint32, uint32 who = UNKNOWN);
+void BlitterWriteByte(uint32, uint8, uint32 who = UNKNOWN);
+void BlitterWriteWord(uint32, uint16, uint32 who = UNKNOWN);
+void BlitterWriteLong(uint32, uint32, uint32 who = UNKNOWN);
+
+uint32 blitter_reg_read(uint32 offset);
+void blitter_reg_write(uint32 offset, uint32 data);
+
+extern uint8 blitter_working;
+
+//For testing only...
+void LogBlit(void);
+
+#endif // __BLITTER_H__
diff --git a/src/jaguar/cdintf.c b/src/jaguar/cdintf.c
new file mode 100644
index 00000000..8973c454
--- /dev/null
+++ b/src/jaguar/cdintf.c
@@ -0,0 +1,151 @@
+//
+// OS agnostic CDROM interface functions
+//
+// by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+//
+
+//
+// This now uses the supposedly cross-platform libcdio to do the necessary
+// low-level CD twiddling we need that libsdl can't do currently. Jury is
+// still out on whether or not to make this a conditional compilation or not.
+//
+
+// Comment this out if you don't have libcdio installed
+// (Actually, this is defined in the Makefile to prevent having to edit
+// things too damn much. Jury is still out whether or not to make this
+// change permanent.)
+//#define HAVE_LIB_CDIO
+
+#include "cdintf.h" // Every OS has to implement these
+
+#ifdef HAVE_LIB_CDIO
+#include <cdio/cdio.h> // Now using OS agnostic CD access routines!
+#endif
+#include "log.h"
+
+
+/*
+static void TestCDIO(void)
+{
+ // See what (if anything) is installed.
+ CdIo_t * p_cdio = cdio_open(0, DRIVER_DEVICE);
+ driver_id_t driver_id;
+
+ if (p_cdio != NULL)
+ {
+ WriteLog("CDIO: The driver selected is %s.\n", cdio_get_driver_name(p_cdio));
+ WriteLog("CDIO: The default device for this driver is %s.\n\n", cdio_get_default_device(p_cdio));
+ cdio_destroy(p_cdio);
+ }
+ else
+ {
+ WriteLog("CDIO: A suitable CD-ROM driver was not found.\n\n");
+ }
+}
+*/
+
+//
+// *** OK, here's where we're going to attempt to put the platform agnostic CD interface ***
+//
+
+#ifdef HAVE_LIB_CDIO
+static CdIo_t * cdioPtr = NULL;
+#endif
+
+bool CDIntfInit(void)
+{
+#ifdef HAVE_LIB_CDIO
+ cdioPtr = cdio_open(NULL, DRIVER_DEVICE);
+
+ if (cdioPtr == NULL)
+ {
+#endif
+ WriteLog("CDINTF: No suitable CD-ROM driver found.\n");
+ return false;
+#ifdef HAVE_LIB_CDIO
+ }
+
+ WriteLog("CDINTF: Successfully opened CD-ROM interface.\n");
+
+ return true;
+#endif
+}
+
+void CDIntfDone(void)
+{
+ WriteLog("CDINTF: Shutting down CD-ROM subsystem.\n");
+
+#ifdef HAVE_LIB_CDIO
+ if (cdioPtr)
+ cdio_destroy(cdioPtr);
+#endif
+}
+
+bool CDIntfReadBlock(uint32 sector, uint8 * buffer)
+{
+#warning "!!! FIX !!! CDIntfReadBlock not implemented!"
+ // !!! FIX !!!
+ WriteLog("CDINTF: ReadBlock unimplemented!\n");
+ return false;
+}
+
+uint32 CDIntfGetNumSessions(void)
+{
+#warning "!!! FIX !!! CDIntfGetNumSessions not implemented!"
+ // !!! FIX !!!
+ // Still need relevant code here... !!! FIX !!!
+ return 2;
+}
+
+void CDIntfSelectDrive(uint32 driveNum)
+{
+#warning "!!! FIX !!! CDIntfSelectDrive not implemented!"
+ // !!! FIX !!!
+ WriteLog("CDINTF: SelectDrive unimplemented!\n");
+}
+
+uint32 CDIntfGetCurrentDrive(void)
+{
+#warning "!!! FIX !!! CDIntfGetCurrentDrive not implemented!"
+ // !!! FIX !!!
+ WriteLog("CDINTF: GetCurrentDrive unimplemented!\n");
+ return 0;
+}
+
+const uint8 * CDIntfGetDriveName(uint32 driveNum)
+{
+#warning "!!! FIX !!! CDIntfGetDriveName driveNum is currently ignored!"
+ // driveNum is currently ignored... !!! FIX !!!
+
+#ifdef HAVE_LIB_CDIO
+ uint8 * driveName = (uint8 *)cdio_get_default_device(cdioPtr);
+ WriteLog("CDINTF: The drive name for the current driver is %s.\n", driveName);
+
+ return driveName;
+#else
+ return (uint8 *)"NONE";
+#endif
+}
+
+uint8 CDIntfGetSessionInfo(uint32 session, uint32 offset)
+{
+#warning "!!! FIX !!! CDIntfGetSessionInfo not implemented!"
+ // !!! FIX !!!
+ WriteLog("CDINTF: GetSessionInfo unimplemented!\n");
+ return 0xFF;
+}
+
+uint8 CDIntfGetTrackInfo(uint32 track, uint32 offset)
+{
+#warning "!!! FIX !!! CDIntfTrackInfo not implemented!"
+ // !!! FIX !!!
+ WriteLog("CDINTF: GetTrackInfo unimplemented!\n");
+ return 0xFF;
+}
diff --git a/src/jaguar/cdintf.h b/src/jaguar/cdintf.h
new file mode 100644
index 00000000..020af47c
--- /dev/null
+++ b/src/jaguar/cdintf.h
@@ -0,0 +1,22 @@
+//
+// CDINTF.H: OS agnostic CDROM access funcions
+//
+// by James L. Hammons
+//
+
+#ifndef __CDINTF_H__
+#define __CDINTF_H__
+
+#include "types.h"
+
+bool CDIntfInit(void);
+void CDIntfDone(void);
+bool CDIntfReadBlock(uint32, uint8 *);
+uint32 CDIntfGetNumSessions(void);
+void CDIntfSelectDrive(uint32);
+uint32 CDIntfGetCurrentDrive(void);
+const uint8 * CDIntfGetDriveName(uint32);
+uint8 CDIntfGetSessionInfo(uint32, uint32);
+uint8 CDIntfGetTrackInfo(uint32, uint32);
+
+#endif // __CDINTF_H__
diff --git a/src/jaguar/cdrom.c b/src/jaguar/cdrom.c
new file mode 100644
index 00000000..c45a8f03
--- /dev/null
+++ b/src/jaguar/cdrom.c
@@ -0,0 +1,1336 @@
+//
+// CD handler
+//
+// Originally by David Raingeard
+// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
+// Extensive rewrites/cleanups/fixes by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+//
+
+#include "cdrom.h"
+
+#include <string.h> // For memset, etc.
+//#include "jaguar.h" // For GET32/SET32 macros
+#include "m68k.h"
+//#include "memory.h"
+#include "cdintf.h" // System agnostic CD interface functions
+#include "log.h"
+#include "dac.h"
+
+//#define CDROM_LOG // For CDROM logging, obviously
+
+/*
+BUTCH equ $DFFF00 ; base of Butch=interrupt control register, R/W
+DSCNTRL equ BUTCH+4 ; DSA control register, R/W
+DS_DATA equ BUTCH+$A ; DSA TX/RX data, R/W
+I2CNTRL equ BUTCH+$10 ; i2s bus control register, R/W
+SBCNTRL equ BUTCH+$14 ; CD subcode control register, R/W
+SUBDATA equ BUTCH+$18 ; Subcode data register A
+SUBDATB equ BUTCH+$1C ; Subcode data register B
+SB_TIME equ BUTCH+$20 ; Subcode time and compare enable (D24)
+FIFO_DATA equ BUTCH+$24 ; i2s FIFO data
+I2SDAT1 equ BUTCH+$24 ; i2s FIFO data
+I2SDAT2 equ BUTCH+$28 ; i2s FIFO data
+2C = ?
+
+;
+; Butch's hardware registers
+;
+;BUTCH equ $DFFF00 ;base of Butch=interrupt control register, R/W
+;
+; When written (Long):
+;
+; bit0 - set to enable interrupts
+; bit1 - enable CD data FIFO half full interrupt
+; bit2 - enable CD subcode frame-time interrupt (@ 2x spped = 7ms.)
+; bit3 - enable pre-set subcode time-match found interrupt
+; bit4 - CD module command transmit buffer empty interrupt
+; bit5 - CD module command receive buffer full
+; bit6 - CIRC failure interrupt
+;
+; bit7-31 reserved, set to 0
+;
+; When read (Long):
+;
+; bit0-8 reserved
+;
+; bit9 - CD data FIFO half-full flag pending
+; bit10 - Frame pending
+; bit11 - Subcode data pending
+; bit12 - Command to CD drive pending (trans buffer empty if 1)
+; bit13 - Response from CD drive pending (rec buffer full if 1)
+; bit14 - CD uncorrectable data error pending
+;
+; Offsets from BUTCH
+;
+O_DSCNTRL equ 4 ; DSA control register, R/W
+O_DS_DATA equ $A ; DSA TX/RX data, R/W
+;
+O_I2CNTRL equ $10 ; i2s bus control register, R/W
+;
+; When read:
+;
+; b0 - I2S data from drive is ON if 1
+; b1 - I2S path to Jerry is ON if 1
+; b2 - reserved
+; b3 - host bus width is 16 if 1, else 32
+; b4 - FIFO state is not empty if 1
+;
+O_SBCNTRL equ $14 ; CD subcode control register, R/W
+O_SUBDATA equ $18 ; Subcode data register A
+O_SUBDATB equ $1C ; Subcode data register B
+O_SB_TIME equ $20 ; Subcode time and compare enable (D24)
+O_FIFODAT equ $24 ; i2s FIFO data
+O_I2SDAT2 equ $28 ; i2s FIFO data (old)
+*/
+
+/*
+Commands sent through DS_DATA:
+
+$01nn - ? Play track nn ? Seek to track nn ?
+$0200 - Stop CD
+$03nn - Read session nn TOC (short)
+$0400 - Pause CD
+$0500 - Unpause CD
+$10nn - Goto (min?)
+$11nn - Goto (sec?)
+$12nn - Goto (frm?)
+$14nn - Read session nn TOC (full)
+$15nn - Set CD mode
+$18nn - Spin up CD to session nn
+$5000 - ?
+$5100 - Mute CD (audio mode only)
+$51FF - Unmute CD (audio mode only)
+$5400 - Read # of sessions on CD
+$70nn - Set oversampling mode
+
+Commands send through serial bus:
+
+$100 - ? Acknowledge ?
+$130 - ? (Seems to always prefix the $14n commands)
+$140 - Returns ACK (1) (Write to NVRAM?)
+$141 - Returns ACK (1)
+$142 - Returns ACK (1)
+$143 - Returns ACK (1)
+$144 - Returns ACK (1)
+$145 - Returns ACK (1)
+$180 - Returns 16-bit value (NVRAM?)
+$181 - Returns 16-bit value
+$182 - Returns 16-bit value
+$183 - Returns 16-bit value
+$184 - Returns 16-bit value
+$185 - Returns 16-bit value
+*/
+
+// Private function prototypes
+
+static void CDROMBusWrite(uint16);
+static uint16 CDROMBusRead(void);
+
+#define BUTCH 0x00 // base of Butch == interrupt control register, R/W
+#define DSCNTRL BUTCH + 0x04 // DSA control register, R/W
+#define DS_DATA BUTCH + 0x0A // DSA TX/RX data, R/W
+#define I2CNTRL BUTCH + 0x10 // i2s bus control register, R/W
+#define SBCNTRL BUTCH + 0x14 // CD subcode control register, R/W
+#define SUBDATA BUTCH + 0x18 // Subcode data register A
+#define SUBDATB BUTCH + 0x1C // Subcode data register B
+#define SB_TIME BUTCH + 0x20 // Subcode time and compare enable (D24)
+#define FIFO_DATA BUTCH + 0x24 // i2s FIFO data
+#define I2SDAT2 BUTCH + 0x28 // i2s FIFO data (old)
+#define UNKNOWN BUTCH + 0x2C // Seems to be some sort of I2S interface
+
+const char * BReg[12] = { "BUTCH", "DSCNTRL", "DS_DATA", "???", "I2CNTRL", "SBCNTRL", "SUBDATA", "SUBDATB",
+ "SB_TIME", "FIFO_DATA", "I2SDAT2", "UNKNOWN" };
+//extern const char * whoName[9];
+
+
+static uint8 cdRam[0x100];
+static uint16 cdCmd = 0, cdPtr = 0;
+static bool haveCDGoodness;
+static uint32 min, sec, frm, block;
+static uint8 cdBuf[2352 + 96];
+static uint32 cdBufPtr = 2352;
+//Also need to set up (save/restore) the CD's NVRAM
+
+
+//extern bool GetRawTOC(void);
+void CDROMInit(void)
+{
+ haveCDGoodness = CDIntfInit();
+
+//GetRawTOC();
+/*uint8 buf[2448];
+uint32 sec = 18667 - 150;
+memset(buf, 0, 2448);
+if (!CDIntfReadBlock(sec, buf))
+{
+ WriteLog("CDROM: Attempt to read with subchannel data failed!\n");
+ return;
+}
+
+//24x98+96
+//96=4x24=4x4x6
+WriteLog("\nCDROM: Read sector %u...\n\n", sec);
+for(int i=0; i<98; i++)
+{
+ WriteLog("%04X: ", i*24);
+ for(int j=0; j<24; j++)
+ {
+ WriteLog("%02X ", buf[j + (i*24)]);
+ }
+ WriteLog("\n");
+}
+WriteLog("\nRaw P-W subchannel data:\n\n");
+for(int i=0; i<6; i++)
+{
+ WriteLog("%02X: ", i*16);
+ for(int j=0; j<16; j++)
+ {
+ WriteLog("%02X ", buf[2352 + j + (i*16)]);
+ }
+ WriteLog("\n");
+}
+WriteLog("\nP subchannel data: ");
+for(int i=0; i<96; i+=8)
+{
+ uint8 b = 0;
+ for(int j=0; j<8; j++)
+ b |= ((buf[2352 + i + j] & 0x80) >> 7) << (7 - j);
+
+ WriteLog("%02X ", b);
+}
+WriteLog("\nQ subchannel data: ");
+for(int i=0; i<96; i+=8)
+{
+ uint8 b = 0;
+ for(int j=0; j<8; j++)
+ b |= ((buf[2352 + i + j] & 0x40) >> 6) << (7 - j);
+
+ WriteLog("%02X ", b);
+}
+WriteLog("\n\n");//*/
+}
+
+void CDROMReset(void)
+{
+ memset(cdRam, 0x00, 0x100);
+ cdCmd = 0;
+}
+
+void CDROMDone(void)
+{
+ CDIntfDone();
+}
+
+
+//
+// This approach is probably wrong, but let's do it for now.
+// What's needed is a complete overhaul of the interrupt system so that
+// interrupts are handled as they're generated--instead of the current
+// scheme where they're handled on scanline boundaries.
+//
+void BUTCHExec(uint32 cycles)
+{
+#if 1
+// We're chickening out for now...
+return;
+#else
+// extern uint8 * jerry_ram_8; // Hmm.
+
+ // For now, we just do the FIFO interrupt. Timing is also likely to be WRONG as well.
+ uint32 cdState = GET32(cdRam, BUTCH);
+
+ if (!(cdState & 0x01)) // No BUTCH interrupts enabled
+ return;
+
+ if (!(cdState & 0x22))
+ return; // For now, we only handle FIFO/buffer full interrupts...
+
+ // From what I can make out, it seems that each FIFO is 32 bytes long
+
+// DSPSetIRQLine(DSPIRQ_EXT, ASSERT_LINE);
+//I'm *sure* this is wrong--prolly need to generate DSP IRQs as well!
+ if (jerry_ram_8[0x23] & 0x3F) // Only generate an IRQ if enabled!
+ GPUSetIRQLine(GPUIRQ_DSP, ASSERT_LINE);
+#endif
+}
+
+
+//
+// CD-ROM memory access functions
+//
+
+uint8 CDROMReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+#ifdef CDROM_LOG
+ if ((offset & 0xFF) < 12 * 4)
+ WriteLog("[%s] ", BReg[(offset & 0xFF) / 4]);
+ WriteLog("CDROM: %s reading byte $%02X from $%08X [68K PC=$%08X]\n", whoName[who], offset, cdRam[offset & 0xFF], m68k_get_reg(NULL, M68K_REG_PC));
+#endif
+ return cdRam[offset & 0xFF];
+}
+
+static uint8 trackNum = 1, minTrack, maxTrack;
+//static uint8 minutes[16] = { 0, 0, 2, 5, 7, 10, 12, 15, 17, 20, 22, 25, 27, 30, 32, 35 };
+//static uint8 seconds[16] = { 0, 0, 30, 0, 30, 0, 30, 0, 30, 0, 30, 0, 30, 0, 30, 0 };
+//static uint8 frames[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
+//static uint16 sd = 0;
+uint16 CDROMReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ offset &= 0xFF;
+
+ uint16 data = 0x0000;
+
+ if (offset == BUTCH)
+ data = 0x0000;
+ else if (offset == BUTCH + 2)
+// We need to fix this so it's not as brain-dead as it is now--i.e., make it so that when
+// a command is sent to the CDROM, we control here whether or not it succeeded or whether
+// the command is still being carried out, etc.
+
+// bit12 - Command to CD drive pending (trans buffer empty if 1)
+// bit13 - Response from CD drive pending (rec buffer full if 1)
+// data = (haveCDGoodness ? 0x3000 : 0x0000); // DSA RX Interrupt pending bit (0 = pending)
+//This only returns ACKs for interrupts that are set:
+//This doesn't work for the initial code that writes $180000 to BUTCH. !!! FIX !!!
+ data = (haveCDGoodness ? cdRam[BUTCH + 3] << 8 : 0x0000);
+// else if (offset == SUBDATA + 2)
+// data = sd++ | 0x0010; // Have no idea what this is...
+ else if (offset == DS_DATA && haveCDGoodness)
+ {
+ if ((cdCmd & 0xFF00) == 0x0100) // ???
+ {
+//Not sure how to acknowledge the ???...
+// data = 0x0400;//?? 0x0200;
+ cdPtr++;
+ switch (cdPtr)
+ {
+ case 1:
+ data = 0x0000;
+ break;
+ case 2:
+ data = 0x0100;
+ break;
+ case 3:
+ data = 0x0200;
+ break;
+ case 4:
+ data = 0x0300;
+ break;
+ case 5:
+ data = 0x0400;
+ }//*/
+ WriteLog("CDROM: Reading DS_DATA (???), cdCmd=$%04X\n", cdCmd);
+ }
+ else if ((cdCmd & 0xFF00) == 0x0200) // Stop CD
+ {
+//Not sure how to acknowledge the stop...
+ data = 0x0400;//?? 0x0200;
+/* cdPtr++;
+ switch (cdPtr)
+ {
+ case 1:
+ data = 0x00FF;
+ break;
+ case 2:
+ data = 0x01FF;
+ break;
+ case 3:
+ data = 0x02FF;
+ break;
+ case 4:
+ data = 0x03FF;
+ break;
+ case 5:
+ data = 0x0400;
+ }//*/
+ WriteLog("CDROM: Reading DS_DATA (stop), cdCmd=$%04X\n", cdCmd);
+ }
+ else if ((cdCmd & 0xFF00) == 0x0300) // Read session TOC (overview?)
+ {
+
+/*
+TOC: [Sess] [adrCtl] [?] [point] [?] [?] [?] [?] [pmin] [psec] [pframe]
+TOC: 1 10 00 a0 00:00:00 00 01:00:00
+TOC: 1 10 00 a1 00:00:00 00 01:00:00
+TOC: 1 10 00 a2 00:00:00 00 03:42:42
+TOC: 1 10 00 1 00:00:00 00 00:02:00 <-- Track #1
+TOC: 1 50 00 b0 06:12:42 02 79:59:74
+TOC: 1 50 00 c0 128:00:32 00 97:18:06
+TOC: 2 10 00 a0 00:00:00 00 02:00:00
+TOC: 2 10 00 a1 00:00:00 00 11:00:00
+TOC: 2 10 00 a2 00:00:00 00 54:32:18
+TOC: 2 10 00 2 00:00:00 00 06:14:42 <-- Track #2
+TOC: 2 10 00 3 00:00:00 00 06:24:42 <-- Track #3
+TOC: 2 10 00 4 00:00:00 00 17:42:00 <-- Track #4
+TOC: 2 10 00 5 00:00:00 00 22:26:15 <-- Track #5
+TOC: 2 10 00 6 00:00:00 00 29:50:16 <-- Track #6
+TOC: 2 10 00 7 00:00:00 00 36:01:49 <-- Track #7
+TOC: 2 10 00 8 00:00:00 00 40:37:59 <-- Track #8
+TOC: 2 10 00 9 00:00:00 00 45:13:70 <-- Track #9
+TOC: 2 10 00 a 00:00:00 00 49:50:06 <-- Track #10
+TOC: 2 10 00 b 00:00:00 00 54:26:17 <-- Track #11
+*/
+
+//Should do something like so:
+// data = GetSessionInfo(cdCmd & 0xFF, cdPtr);
+ data = CDIntfGetSessionInfo(cdCmd & 0xFF, cdPtr);
+ if (data == 0xFF) // Failed...
+ {
+ data = 0x0400;
+ WriteLog("CDROM: Requested invalid session #%u (or failed to load TOC, or bad cdPtr value)\n", cdCmd & 0xFF);
+ }
+ else
+ {
+ data |= (0x20 | cdPtr++) << 8;
+ WriteLog("CDROM: Reading DS_DATA (session #%u TOC byte #%u): $%04X\n", cdCmd & 0xFF, cdPtr, data);
+ }
+
+/* bool isValidSession = ((cdCmd & 0xFF) == 0 ? true : false);//Hardcoded... !!! FIX !!!
+//NOTE: This should return error condition if the requested session doesn't exist! ($0400?)
+ if (isValidSession)
+ {
+ cdPtr++;
+ switch (cdPtr)
+ {
+ case 1:
+ data = 0x2001; // Min track for this session?
+ break;
+ case 2:
+ data = 0x210A; // Max track for this session?
+ break;
+ case 3:
+ data = 0x2219; // Max lead-out time, absolute minutes
+ break;
+ case 4:
+ data = 0x2319; // Max lead-out time, absolute seconds
+ break;
+ case 5:
+ data = 0x2419; // Max lead-out time, absolute frames
+ break;
+ default:
+ data = 0xFFFF;
+
+//; +0 - unused, reserved (0)
+//; +1 - unused, reserved (0)
+//; +2 - minimum track number
+//; +3 - maximum track number
+//; +4 - total number of sessions
+//; +5 - start of last lead-out time, absolute minutes
+//; +6 - start of last lead-out time, absolute seconds
+//; +7 - start of last lead-out time, absolute frames
+
+ }
+ WriteLog("CDROM: Reading DS_DATA (session #%u TOC byte #%u): $%04X\n", cdCmd & 0xFF, cdPtr, data);
+ }
+ else
+ {
+ data = 0x0400;
+ WriteLog("CDROM: Requested invalid session #%u\n", cdCmd & 0xFF);
+ }*/
+ }
+ // Seek to m, s, or f position
+ else if ((cdCmd & 0xFF00) == 0x1000 || (cdCmd & 0xFF00) == 0x1100 || (cdCmd & 0xFF00) == 0x1200)
+ data = 0x0100; // Success, though this doesn't take error handling into account.
+ // Ideally, we would also set the bits in BUTCH to let the processor know that
+ // this is ready to be read... !!! FIX !!!
+ else if ((cdCmd & 0xFF00) == 0x1400) // Read "full" session TOC
+ {
+//Need to be a bit more tricky here, since it's reading the "session" TOC instead of the
+//full TOC--so we need to check for the min/max tracks for each session here... [DONE]
+
+ if (trackNum > maxTrack)
+ {
+ data = 0x400;
+WriteLog("CDROM: Requested invalid track #%u for session #%u\n", trackNum, cdCmd & 0xFF);
+ }
+ else
+ {
+ if (cdPtr < 0x62)
+ data = (cdPtr << 8) | trackNum;
+ else if (cdPtr < 0x65)
+ data = (cdPtr << 8) | CDIntfGetTrackInfo(trackNum, (cdPtr - 2) & 0x0F);
+
+WriteLog("CDROM: Reading DS_DATA (session #%u, full TOC byte #%u): $%04X\n", cdCmd & 0xFF, (cdPtr+1) & 0x0F, data);
+
+ cdPtr++;
+ if (cdPtr == 0x65)
+ cdPtr = 0x60, trackNum++;
+ }
+
+ // Note that it seems to return track info in sets of 4 (or is it 5?)
+/*
+; +0 - track # (must be non-zero)
+; +1 - absolute minutes (0..99), start of track
+; +2 - absolute seconds (0..59), start of track
+; +3 - absolute frames, (0..74), start of track
+; +4 - session # (0..99)
+; +5 - track duration minutes
+; +6 - track duration seconds
+; +7 - track duration frames
+*/
+ // Seems to be the following format: $60xx -> Track #xx
+ // $61xx -> min? (trk?)
+ // $62xx -> sec? (min?)
+ // $63xx -> frame? (sec?)
+ // $64xx -> ? (frame?)
+/* cdPtr++;
+ switch (cdPtr)
+ {
+ case 1:
+ data = 0x6000 | trackNum; // Track #
+ break;
+ case 2:
+ data = 0x6100 | trackNum; // Track # (again?)
+ break;
+ case 3:
+ data = 0x6200 | minutes[trackNum]; // Minutes
+ break;
+ case 4:
+ data = 0x6300 | seconds[trackNum]; // Seconds
+ break;
+ case 5:
+ data = 0x6400 | frames[trackNum]; // Frames
+ trackNum++;
+ cdPtr = 0;
+ }//*/
+ }
+ else if ((cdCmd & 0xFF00) == 0x1500) // Read CD mode
+ {
+ data = cdCmd | 0x0200; // ?? not sure ?? [Seems OK]
+ WriteLog("CDROM: Reading DS_DATA (mode), cdCmd=$%04X\n", cdCmd);
+ }
+ else if ((cdCmd & 0xFF00) == 0x1800) // Spin up session #
+ {
+ data = cdCmd;
+ WriteLog("CDROM: Reading DS_DATA (spin up session), cdCmd=$%04X\n", cdCmd);
+ }
+ else if ((cdCmd & 0xFF00) == 0x5400) // Read # of sessions
+ {
+ data = cdCmd | 0x00; // !!! Hardcoded !!! FIX !!!
+ WriteLog("CDROM: Reading DS_DATA (# of sessions), cdCmd=$%04X\n", cdCmd);
+ }
+ else if ((cdCmd & 0xFF00) == 0x7000) // Read oversampling
+ {
+//NOTE: This setting will probably affect the # of DSP interrupts that need to happen. !!! FIX !!!
+ data = cdCmd;
+ WriteLog("CDROM: Reading DS_DATA (oversampling), cdCmd=$%04X\n", cdCmd);
+ }
+ else
+ {
+ data = 0x0400;
+ WriteLog("CDROM: Reading DS_DATA, unhandled cdCmd=$%04X\n", cdCmd);
+ }
+ }
+ else if (offset == DS_DATA && !haveCDGoodness)
+ data = 0x0400; // No CD interface present, so return error
+ else if (offset >= FIFO_DATA && offset <= FIFO_DATA + 3)
+ {
+ }
+ else if (offset >= FIFO_DATA + 4 && offset <= FIFO_DATA + 7)
+ {
+ }
+ else
+ data = GET16(cdRam, offset);
+
+//Returning $00000008 seems to cause it to use the starfield. Dunno why.
+// It looks like it's getting the CD_mode this way...
+//Temp, for testing...
+//Very interesting...! Seems to control sumthin' or other...
+/*if (offset == 0x2C || offset == 0x2E)
+ data = 0xFFFF;//*/
+/*if (offset == 0x2C)
+ data = 0x0000;
+if (offset == 0x2E)
+ data = 0;//0x0008;//*/
+ if (offset == UNKNOWN + 2)
+ data = CDROMBusRead();
+
+#ifdef CDROM_LOG
+ if ((offset & 0xFF) < 11 * 4)
+ WriteLog("[%s] ", BReg[(offset & 0xFF) / 4]);
+ if (offset != UNKNOWN && offset != UNKNOWN + 2)
+ WriteLog("CDROM: %s reading word $%04X from $%08X [68K PC=$%08X]\n", whoName[who], data, offset, m68k_get_reg(NULL, M68K_REG_PC));
+#endif
+ return data;
+}
+
+void CDROMWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
+{
+ offset &= 0xFF;
+ cdRam[offset] = data;
+
+#ifdef CDROM_LOG
+ if ((offset & 0xFF) < 12 * 4)
+ WriteLog("[%s] ", BReg[(offset & 0xFF) / 4]);
+ WriteLog("CDROM: %s writing byte $%02X at $%08X [68K PC=$%08X]\n", whoName[who], data, offset, m68k_get_reg(NULL, M68K_REG_PC));
+#endif
+}
+
+void CDROMWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
+{
+ offset &= 0xFF;
+ SET16(cdRam, offset, data);
+
+ // Command register
+//Lesse what this does... Seems to work OK...!
+ if (offset == DS_DATA)
+ {
+ cdCmd = data;
+ if ((data & 0xFF00) == 0x0200) // Stop CD
+ {
+ cdPtr = 0;
+ WriteLog("CDROM: Stopping CD\n", data & 0xFF);
+ }
+ else if ((data & 0xFF00) == 0x0300) // Read session TOC (short? overview?)
+ {
+ cdPtr = 0;
+ WriteLog("CDROM: Reading TOC for session #%u\n", data & 0xFF);
+ }
+//Not sure how these three acknowledge...
+ else if ((data & 0xFF00) == 0x1000) // Seek to minute position
+ {
+ min = data & 0x00FF;
+ }
+ else if ((data & 0xFF00) == 0x1100) // Seek to second position
+ {
+ sec = data & 0x00FF;
+ }
+ else if ((data & 0xFF00) == 0x1200) // Seek to frame position
+ {
+ frm = data & 0x00FF;
+ block = (((min * 60) + sec) * 75) + frm;
+ cdBufPtr = 2352; // Ensure that SSI read will do so immediately
+ WriteLog("CDROM: Seeking to %u:%02u:%02u [block #%u]\n", min, sec, frm, block);
+ }
+ else if ((data & 0xFF00) == 0x1400) // Read "full" TOC for session
+ {
+ cdPtr = 0x60,
+ minTrack = CDIntfGetSessionInfo(data & 0xFF, 0),
+ maxTrack = CDIntfGetSessionInfo(data & 0xFF, 1);
+ trackNum = minTrack;
+ WriteLog("CDROM: Reading \"full\" TOC for session #%u (min=%u, max=%u)\n", data & 0xFF, minTrack, maxTrack);
+ }
+ else if ((data & 0xFF00) == 0x1500) // Set CDROM mode
+ {
+ // Mode setting is as follows: bit 0 set -> single speed, bit 1 set -> double,
+ // bit 3 set -> multisession CD, bit 3 unset -> audio CD
+ WriteLog("CDROM: Setting mode $%02X\n", data & 0xFF);
+ }
+ else if ((data & 0xFF00) == 0x1800) // Spin up session #
+ {
+ WriteLog("CDROM: Spinning up session #%u\n", data & 0xFF);
+ }
+ else if ((data & 0xFF00) == 0x5400) // Read # of sessions
+ {
+ WriteLog("CDROM: Reading # of sessions\n", data & 0xFF);
+ }
+ else if ((data & 0xFF00) == 0x7000) // Set oversampling rate
+ {
+ // 1 = none, 2 = 2x, 3 = 4x, 4 = 8x
+ uint32 rates[5] = { 0, 1, 2, 4, 8 };
+ WriteLog("CDROM: Setting oversample rate to %uX\n", rates[(data & 0xFF)]);
+ }
+ else
+ WriteLog("CDROM: Unknown command $%04X\n", data);
+ }//*/
+
+ if (offset == UNKNOWN + 2)
+ CDROMBusWrite(data);
+
+#ifdef CDROM_LOG
+ if ((offset & 0xFF) < 11 * 4)
+ WriteLog("[%s] ", BReg[(offset & 0xFF) / 4]);
+ if (offset != UNKNOWN && offset != UNKNOWN + 2)
+ WriteLog("CDROM: %s writing word $%04X at $%08X [68K PC=$%08X]\n", whoName[who], data, offset, m68k_get_reg(NULL, M68K_REG_PC));
+#endif
+}
+
+//
+// State machine for sending/receiving data along a serial bus
+//
+
+enum ButchState { ST_INIT, ST_RISING, ST_FALLING };
+static ButchState currentState = ST_INIT;
+static uint16 counter = 0;
+static bool cmdTx = false;
+static uint16 busCmd;
+static uint16 rxData, txData;
+static uint16 rxDataBit;
+static bool firstTime = false;
+
+static void CDROMBusWrite(uint16 data)
+{
+//This is kinda lame. What we should do is check for a 0->1 transition on either bits 0 or 1...
+//!!! FIX !!!
+
+#ifdef CDROM_LOG
+ if (data & 0xFFF0)
+ WriteLog("CDROM: BusWrite write on unknown line: $%04X\n", data);
+#endif
+
+ switch (currentState)
+ {
+ case ST_INIT:
+ currentState = ST_RISING;
+ break;
+ case ST_RISING:
+ if (data & 0x0001) // Command coming
+ {
+ cmdTx = true;
+ counter = 0;
+ busCmd = 0;
+ }
+ else
+ {
+ if (cmdTx)
+ {
+ busCmd <<= 1; // Make room for next bit
+ busCmd |= (data & 0x04); // & put it in
+ counter++;
+
+ if (counter == 9)
+ {
+ busCmd >>= 2; // Because we ORed bit 2, we need to shift right by 2
+ cmdTx = false;
+
+//What it looks like:
+//It seems that the $18x series reads from NVRAM while the
+//$130, $14x, $100 series writes values to NVRAM...
+ if (busCmd == 0x180)
+ rxData = 0x0024;//1234;
+ else if (busCmd == 0x181)
+ rxData = 0x0004;//5678;
+ else if (busCmd == 0x182)
+ rxData = 0x0071;//9ABC;
+ else if (busCmd == 0x183)
+ rxData = 0xFF67;//DEF0;
+ else if (busCmd == 0x184)
+ rxData = 0xFFFF;//892F;
+ else if (busCmd == 0x185)
+ rxData = 0xFFFF;//8000;
+ else
+ rxData = 0x0001;
+// rxData = 0x8349;//8000;//0F67;
+
+ counter = 0;
+ firstTime = true;
+ txData = 0;
+#ifdef CDROM_LOG
+ WriteLog("CDROM: *** BusWrite got command $%04X\n", busCmd);
+#endif
+ }
+ }
+ else
+ {
+ txData = (txData << 1) | ((data & 0x04) >> 2);
+//WriteLog("[%s]", data & 0x04 ? "1" : "0");
+
+ rxDataBit = (rxData & 0x8000) >> 12;
+ rxData <<= 1;
+ counter++;
+#ifdef CDROM_LOG
+ if (counter == 16)
+ WriteLog("CDROM: *** BusWrite got extra command $%04X\n", txData);
+#endif
+ }
+ }
+
+ currentState = ST_FALLING;
+ break;
+ case ST_FALLING:
+ currentState = ST_INIT;
+ break;
+ }
+}
+
+static uint16 CDROMBusRead(void)
+{
+// It seems the counter == 0 simply waits for a single bit acknowledge-- !!! FIX !!!
+// Or does it? Hmm. It still "pumps" 16 bits through above, so how is this special?
+// Seems to be because it sits and looks at it as if it will change. Dunno!
+#ifdef CDROM_LOG
+ if ((counter & 0x0F) == 0)
+ {
+ if (counter == 0 && rxDataBit == 0)
+ {
+ if (firstTime)
+ {
+ firstTime = false;
+ WriteLog("0...\n");
+ }
+ }
+ else
+ WriteLog("%s\n", rxDataBit ? "1" : "0");
+ }
+ else
+ WriteLog("%s", rxDataBit ? "1" : "0");
+#endif
+
+ return rxDataBit;
+}
+
+//
+// This simulates a read from BUTCH over the SSI to JERRY. Uses real reading!
+//
+//temp, until I can fix my CD image... Argh!
+static uint8 cdBuf2[2532 + 96], cdBuf3[2532 + 96];
+uint16 GetWordFromButchSSI(uint32 offset, uint32 who/*= UNKNOWN*/)
+{
+ bool go = ((offset & 0x0F) == 0x0A || (offset & 0x0F) == 0x0E ? true : false);
+
+ if (!go)
+ return 0x000;
+
+// The problem comes in here. Really, we should generate the IRQ once we've stuffed
+// our values into the DAC L/RRXD ports...
+// But then again, the whole IRQ system needs an overhaul in order to make it more
+// cycle accurate WRT to the various CPUs. Right now, it's catch-as-catch-can, which
+// means that IRQs get serviced on scanline boundaries instead of when they occur.
+ cdBufPtr += 2;
+
+ if (cdBufPtr >= 2352)
+ {
+WriteLog("CDROM: %s reading block #%u...\n", whoName[who], block);
+ //No error checking. !!! FIX !!!
+//NOTE: We have to subtract out the 1st track start as well (in cdintf_foo..cpp)!
+// CDIntfReadBlock(block - 150, cdBuf);
+
+//Crappy kludge for shitty shit. Lesse if it works!
+ CDIntfReadBlock(block - 150, cdBuf2);
+ CDIntfReadBlock(block - 149, cdBuf3);
+ for(int i=0; i<2352-4; i+=4)
+ {
+ cdBuf[i+0] = cdBuf2[i+4];
+ cdBuf[i+1] = cdBuf2[i+5];
+ cdBuf[i+2] = cdBuf2[i+2];
+ cdBuf[i+3] = cdBuf2[i+3];
+ }
+ cdBuf[2348] = cdBuf3[0];
+ cdBuf[2349] = cdBuf3[1];
+ cdBuf[2350] = cdBuf2[2350];
+ cdBuf[2351] = cdBuf2[2351];//*/
+
+ block++, cdBufPtr = 0;
+ }
+
+/*extern bool doDSPDis;
+if (block == 244968)
+ doDSPDis = true;//*/
+
+WriteLog("[%04X:%01X]", GET16(cdBuf, cdBufPtr), offset & 0x0F);
+if (cdBufPtr % 32 == 30)
+ WriteLog("\n");
+
+// return GET16(cdBuf, cdBufPtr);
+//This probably isn't endian safe...
+// But then again... It seems that even though the data on the CD is organized as
+// LL LH RL RH the way it expects to see the data is RH RL LH LL.
+// D'oh! It doesn't matter *how* the data comes in, since it puts each sample into
+// its own left or right side queue, i.e. it reads them 32 bits at a time and puts
+// them into their L/R channel queues. It does seem, though, that it expects the
+// right channel to be the upper 16 bits and the left to be the lower 16.
+ return (cdBuf[cdBufPtr + 1] << 8) | cdBuf[cdBufPtr + 0];
+}
+
+bool ButchIsReadyToSend(void)
+{
+WriteLog("Butch is%s ready to send...\n", cdRam[I2CNTRL + 3] & 0x02 ? "" : " not");
+
+ return (cdRam[I2CNTRL + 3] & 0x02 ? true : false);
+}
+
+//
+// This simulates a read from BUTCH over the SSI to JERRY. Uses real reading!
+//
+void SetSSIWordsXmittedFromButch(void)
+{
+
+// The problem comes in here. Really, we should generate the IRQ once we've stuffed
+// our values into the DAC L/RRXD ports...
+// But then again, the whole IRQ system needs an overhaul in order to make it more
+// cycle accurate WRT to the various CPUs. Right now, it's catch-as-catch-can, which
+// means that IRQs get serviced on scanline boundaries instead of when they occur.
+
+// NOTE: The CD BIOS uses the following SMODE:
+// DAC: M68K writing to SMODE. Bits: WSEN FALLING [68K PC=00050D8C]
+ cdBufPtr += 4;
+
+ if (cdBufPtr >= 2352)
+ {
+WriteLog("CDROM: Reading block #%u...\n", block);
+ //No error checking. !!! FIX !!!
+//NOTE: We have to subtract out the 1st track start as well (in cdintf_foo..cpp)!
+// CDIntfReadBlock(block - 150, cdBuf);
+
+//Crappy kludge for shitty shit. Lesse if it works!
+//It does! That means my CD is WRONG! FUCK!
+
+// But, then again, according to Belboz at AA the two zeroes in front *ARE* necessary...
+// So that means my CD is OK, just this method is wrong!
+// It all depends on whether or not the interrupt occurs on the RISING or FALLING edge
+// of the word strobe... !!! FIX !!!
+
+// When WS rises, left channel was done transmitting. When WS falls, right channel is done.
+// CDIntfReadBlock(block - 150, cdBuf2);
+// CDIntfReadBlock(block - 149, cdBuf3);
+ CDIntfReadBlock(block, cdBuf2);
+ CDIntfReadBlock(block + 1, cdBuf3);
+ memcpy(cdBuf, cdBuf2 + 2, 2350);
+ cdBuf[2350] = cdBuf3[0];
+ cdBuf[2351] = cdBuf3[1];//*/
+
+ block++, cdBufPtr = 0;
+
+/*extern bool doDSPDis;
+static int foo = 0;
+if (block == 244968)
+{
+ foo++;
+WriteLog("\n***** foo = %u, block = %u *****\n\n", foo, block);
+ if (foo == 2)
+ doDSPDis = true;
+}//*/
+ }
+
+
+WriteLog("[%02X%02X %02X%02X]", cdBuf[cdBufPtr+1], cdBuf[cdBufPtr+0], cdBuf[cdBufPtr+3], cdBuf[cdBufPtr+2]);
+if (cdBufPtr % 32 == 28)
+ WriteLog("\n");
+
+//This probably isn't endian safe...
+// But then again... It seems that even though the data on the CD is organized as
+// LL LH RL RH the way it expects to see the data is RH RL LH LL.
+// D'oh! It doesn't matter *how* the data comes in, since it puts each sample into
+// its own left or right side queue, i.e. it reads them 32 bits at a time and puts
+// them into their L/R channel queues. It does seem, though, that it expects the
+// right channel to be the upper 16 bits and the left to be the lower 16.
+
+// This behavior is strictly a function of *where* the WS creates an IRQ. If the data
+// is shifted by two zeroes (00 00 in front of the data file) then this *is* the
+// correct behavior, since the left channel will be xmitted followed by the right
+
+// Now we have definitive proof: The MYST CD shows a word offset. So that means we have
+// to figure out how to make that work here *without* having to load 2 sectors, offset, etc.
+// !!! FIX !!!
+ lrxd = (cdBuf[cdBufPtr + 3] << 8) | cdBuf[cdBufPtr + 2],
+ rrxd = (cdBuf[cdBufPtr + 1] << 8) | cdBuf[cdBufPtr + 0];
+}
+
+/*
+[18667]
+TOC for MYST
+
+CDINTF: Disc summary
+ # of sessions: 2, # of tracks: 10
+ Session info:
+ 1: min track= 1, max track= 1, lead out= 1:36:67
+ 2: min track= 2, max track=10, lead out=55:24:71
+ Track info:
+ 1: start= 0:02:00
+ 2: start= 4:08:67
+ 3: start= 4:16:65
+ 4: start= 4:29:19
+ 5: start=29:31:03
+ 6: start=33:38:50
+ 7: start=41:38:60
+ 8: start=44:52:18
+ 9: start=51:51:22
+ 10: start=55:18:73
+
+CDROM: Read sector 18517 (18667 - 150)...
+
+0000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0018: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0048: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0078: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00A8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00D8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0108: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0138: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0168: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0198: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+01B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+01C8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+01E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+01F8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0210: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0228: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0240: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0258: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0270: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0288: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+02A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+02B8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+02D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+02E8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0300: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0318: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0330: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0348: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0360: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0378: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0390: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+03A8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+03C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+03D8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+03F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0408: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0420: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0438: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0450: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0468: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0480: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0498: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+04B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+04C8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+04E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+04F8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0510: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0528: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0540: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0558: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0570: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0588: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+05A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+05B8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+05D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+05E8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0600: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0618: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0630: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0648: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0660: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0678: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0690: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+06A8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+06C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+06D8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+06F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0708: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0720: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0738: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0750: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0768: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0780: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0798: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+07B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+07C8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00[54 41 49 52]54 41
+07E0: 49 52 54 41 49 52 54 41 49 52 54 41 49 52 54 41 49 52 54 41 49 52 54 41
+07F8: 49 52 54 41 49 52 54 41 49 52 54 41 49 52 54 41 49 52 54 41 49 52 54 41
+0810: 49 52 54 41 49 52[54 41 49 52]54 41 52 41 20 49 50 41 52 50 56 4F 44 45
+0828: 44 20 54 41 20 41 45 48 44 41 52 45 41 20 52 54 20 49[00 00 00 50]01 00
+0840: 80 83 FC 23 07 00 07 00 F0 00 0C 21 FC 23 07 00 07 00 F1 00 0C A1 FC 33
+0858: FF FF F0 00 4E 00 7C 2E 1F 00 FC FF 00 61 08 00 F9 4E 00 00 00 51 E7 48
+0870: 00 FE 39 30 F1 00 02 40 40 02 10 00 00 67 1C 00 79 42 01 00 8C D3 3C 34
+0888: 37 03 3C 30 81 05 3C 3C 0A 01 3C 38 F1 00 00 60 1A 00 FC 33 01 00 01 00
+08A0: 8C D3 3C 34 4B 03 3C 30 65 05 3C 3C 42 01 3C 38 1F 01 C0 33 01 00 88 D3
+08B8: C4 33 01 00 8A D3 00 32 41 E2 41 94 7C D4 04 00 7C 92 01 00 41 00 00 04
+08D0: C1 33 01 00 82 D3 C1 33 F0 00 3C 00 C2 33 01 00 80 D3 C2 33 F0 00 38 00
+08E8: C2 33 F0 00 3A 00 06 3A 44 9A C5 33 01 00 84 D3 44 DC C6 33 01 00 86 D3
+0900: F9 33 01 00 84 D3 F0 00 46 00 FC 33 FF FF F0 00 48 00 FC 23 00 00 00 00
+0918: F0 00 2A 00 FC 33 00 00 F0 00 58 00 DF 4C 7F 00 75 4E 00 00 00 00 00 00
+
+Raw P-W subchannel data:
+
+00: 80 80 C0 80 80 80 80 C0 80 80 80 80 80 80 C0 80
+10: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80
+20: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 C0
+30: 80 80 80 80 80 80 80 80 80 80 80 80 80 C0 80 80
+40: 80 80 80 80 C0 80 80 80 80 C0 C0 80 80 C0 C0 80
+50: C0 80 80 C0 C0 C0 80 80 C0 80 80 80 C0 80 80 80
+
+P subchannel data: FF FF FF FF FF FF FF FF FF FF FF FF
+Q subchannel data: 21 02 00 00 00 01 00 04 08 66 9C 88
+
+Run address: $5000, Length: $18380
+*/
+
+
+/*
+CD_read function from the CD BIOS: Note that it seems to direct the EXT1 interrupt
+to the GPU--so that would mean *any* interrupt that BUTCH generates would be routed
+to the GPU...
+
+read:
+ btst.l #31,d0
+ bne.w .play
+ subq.l #4,a0 ; Make up for ISR pre-increment
+ move.l d0,-(sp)
+ move.l BUTCH,d0
+ and.l #$ffff0000,d0
+ move.l d0,BUTCH ; NO INTERRUPTS!!!!!!!!!!!
+ move.l (sp)+,d0
+; move.l #0,BUTCH
+
+ move.w #$101,J_INT
+
+ move.l d1,-(sp)
+ move.l I2CNTRL,d1 ;Read I2S Control Register
+ bclr #2,d1 ; Stop data
+ move.l d1,I2CNTRL
+ move.l (sp)+,d1
+
+ move.l PTRLOC,a2
+ move.l a0,(a2)+
+ move.l a1,(a2)+
+ move.l #0,(a2)+
+
+ btst.b #7,INITTYPE
+ beq .not_bad
+ move.l PTRLOC,a0
+ asl.l #5,d2
+
+ move.l d2,-(sp)
+
+ or.l #$089a3c1a,d2 ; These instructions include the bclr
+ move.l d2,188(a0)
+
+ move.l (sp)+,d2
+
+ swap d2
+ or.l #$3c1a1838,d2 ; These instructions include the bclr
+ move.l d2,196(a0)
+
+ move.l #16,(a2)+
+ move.l d1,(a2)
+
+.not_bad:
+
+ move.w DS_DATA,d1 ; Clear any pending DSARX states
+ move.l I2CNTRL,d1 ; Clear any pending errors
+
+; Drain the FIFO so that we don't get overloaded
+
+.dump:
+ move.l FIFO_DATA,d1
+ move.l I2CNTRL,d1
+ btst #4,d1
+ bne.b .dump
+
+.butch_go:
+ move.l BUTCH,d1
+ and.l #$FFFF0000,d1
+ or.l #%000100001,d1 ;Enable DSARX interrupt
+ move.l d1,BUTCH
+; move.l #%000100001,BUTCH ;Enable DSARX interrupt
+
+; Do a play @
+
+.play: move.l d0,d1 ; mess with copy in d1
+ lsr.l #8,d1 ; shift the byte over
+ lsr.w #8,d1
+ or.w #$1000,d1 ; format it for goto
+ move.w d1,DS_DATA ; DSA tx
+ bsr.b DSA_tx
+
+ move.l d0,d1 ; mess with copy in d1
+ lsr.w #8,d1
+ or.w #$1100,d1 ; format it for goto
+ move.w d1,DS_DATA ; DSA tx
+ bsr.b DSA_tx
+
+ move.l d0,d1 ; mess with copy in d1
+ and.w #$00FF,d1 ; mask for minutes
+ or.w #$1200,d1 ; format it for goto
+ move.w d1,DS_DATA ; DSA tx
+ bsr.b DSA_tx
+
+ rts
+
+
+****************************
+* Here's the GPU interrupt *
+****************************
+
+JERRY_ISR:
+ movei #G_FLAGS,r30
+ load (r30),r29 ;read the flags
+
+ movei #BUTCH,r24
+
+make_ptr:
+ move pc,Ptrloc
+ movei #(make_ptr-PTRPOS),TEMP
+ sub TEMP,Ptrloc
+
+HERE:
+ move pc,r25
+ movei #(EXIT_ISR-HERE),r27
+ add r27,r25
+
+; Is this a DSARX interrupt?
+
+ load (r24),r27 ;check for DSARX int pending
+ btst #13,r27
+ jr z,fifo_read ; This should ALWAYS fall thru the first time
+
+; Set the match bit, to allow data
+; moveq #3,r26 ; enable FIFO only
+; Don't just jam a value
+; Clear the DSARX and set FIFO
+ bclr #5,r27
+ bset #1,r27
+ store r27,(r24)
+ addq #$10,r24
+ load (r24),r27
+ bset #2,r27
+ store r27,(r24) ; Disable SUBCODE match
+
+; Now we clear the DSARX interrupt in Butch
+
+ subq #12,r24 ; does what the above says
+ load (r24),r26 ;Clears DSA pending interrupt
+ addq #6,r24
+ loadw (r24),r27 ; Read DSA response
+ btst #10,r27 ; Check for error
+ jr nz,error
+ or r26,r26
+ jump (r25)
+; nop
+
+fifo_read:
+; Check for ERROR!!!!!!!!!!!!!!!!!!!!!
+ btst #14,r27
+ jr z,noerror
+ bset #31,r27
+error:
+ addq #$10,r24
+ load (r24),TEMP
+ or TEMP,TEMP
+ subq #$10,r24
+ load (Ptrloc),TEMP
+ addq #8,Ptrloc
+ store TEMP,(Ptrloc)
+ subq #8,Ptrloc
+noerror:
+ load (Ptrloc),Dataptr ;get pointer
+
+; Check to see if we should stop
+ addq #4,Ptrloc
+ load (Ptrloc),TEMP
+ subq #4,Ptrloc
+ cmp Dataptr,TEMP
+ jr pl,notend
+; nop
+ bclr #0,r27
+ store r27,(r24)
+
+notend:
+ movei #FIFO_DATA,CDdata
+ move CDdata,r25
+ addq #4,CDdata
+loptop:
+ load (CDdata),TEMP
+ load (r25),r30
+ load (CDdata),r21
+ load (r25),r22
+ load (CDdata),r24
+ load (r25),r20
+ load (CDdata),r19
+ load (r25),r18
+ addq #4,Dataptr
+ store TEMP,(Dataptr)
+ addqt #4,Dataptr
+ store r30,(Dataptr)
+ addqt #4,Dataptr
+ store r21,(Dataptr)
+ addqt #4,Dataptr
+ store r22,(Dataptr)
+ addqt #4,Dataptr
+ store r24,(Dataptr)
+ addqt #4,Dataptr
+ store r20,(Dataptr)
+ addqt #4,Dataptr
+ store r19,(Dataptr)
+ addqt #4,Dataptr
+ store r18,(Dataptr)
+
+ store Dataptr,(Ptrloc)
+
+exit_isr:
+ movei #J_INT,r24 ; Acknowledge in Jerry
+ moveq #1,TEMP
+ bset #8,TEMP
+ storew TEMP,(r24)
+
+.if FLAG
+; Stack r18
+ load (r31),r18
+ addq #4,r31
+
+; Stack r19
+ load (r31),r19
+ addq #4,r31
+
+; Stack r20
+ load (r31),r20
+ addq #4,r31
+
+; Stack r21
+ load (r31),r21
+ addq #4,r31
+
+; Stack r22
+ load (r31),r22
+ addq #4,r31
+
+; Stack r23
+ load (r31),r23
+ addq #4,r31
+
+; Stack r26
+ load (r31),r26
+ addq #4,r31
+
+; Stack r27
+ load (r31),r27
+ addq #4,r31
+
+; Stack r24
+ load (r31),r24
+ addq #4,r31
+
+; Stack r25
+ load (r31),r25
+ addq #4,r31
+.endif
+
+ movei #G_FLAGS,r30
+
+;r29 already has flags
+ bclr #3,r29 ;IMASK
+ bset #10,r29 ;Clear DSP int bit in TOM
+
+ load (r31),r28 ;Load return address
+
+
+ addq #2,r28 ;Fix it up
+ addq #4,r31
+ jump (r28) ;Return
+ store r29,(r30) ;Restore broken flags
+
+
+ align long
+
+stackbot:
+ ds.l 20
+STACK:
+
+
+*/
+
diff --git a/src/jaguar/cdrom.h b/src/jaguar/cdrom.h
new file mode 100644
index 00000000..963a02ae
--- /dev/null
+++ b/src/jaguar/cdrom.h
@@ -0,0 +1,26 @@
+//
+// CDROM.H
+//
+
+#ifndef __CDROM_H__
+#define __CDROM_H__
+
+//#include "types.h"
+#include "memory.h"
+
+void CDROMInit(void);
+void CDROMReset(void);
+void CDROMDone(void);
+
+void BUTCHExec(uint32 cycles);
+
+uint8 CDROMReadByte(uint32 offset, uint32 who = UNKNOWN);
+uint16 CDROMReadWord(uint32 offset, uint32 who = UNKNOWN);
+void CDROMWriteByte(uint32 offset, uint8 data, uint32 who = UNKNOWN);
+void CDROMWriteWord(uint32 offset, uint16 data, uint32 who = UNKNOWN);
+
+bool ButchIsReadyToSend(void);
+uint16 GetWordFromButchSSI(uint32 offset, uint32 who = UNKNOWN);
+void SetSSIWordsXmittedFromButch(void);
+
+#endif // __CDROM_H__
diff --git a/src/jaguar/crc32.c b/src/jaguar/crc32.c
new file mode 100644
index 00000000..8cb637bc
--- /dev/null
+++ b/src/jaguar/crc32.c
@@ -0,0 +1,63 @@
+//
+// CRC support
+//
+// by David Raingeard
+// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
+// Cleanups by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+//
+
+#include "crc32.h"
+
+static unsigned long crctable[256] =
+{
+ 0x00000000L, 0x77073096L, 0xEE0E612CL, 0x990951BAL, 0x076DC419L, 0x706AF48FL, 0xE963A535L, 0x9E6495A3L,
+ 0x0EDB8832L, 0x79DCB8A4L, 0xE0D5E91EL, 0x97D2D988L, 0x09B64C2BL, 0x7EB17CBDL, 0xE7B82D07L, 0x90BF1D91L,
+ 0x1DB71064L, 0x6AB020F2L, 0xF3B97148L, 0x84BE41DEL, 0x1ADAD47DL, 0x6DDDE4EBL, 0xF4D4B551L, 0x83D385C7L,
+ 0x136C9856L, 0x646BA8C0L, 0xFD62F97AL, 0x8A65C9ECL, 0x14015C4FL, 0x63066CD9L, 0xFA0F3D63L, 0x8D080DF5L,
+ 0x3B6E20C8L, 0x4C69105EL, 0xD56041E4L, 0xA2677172L, 0x3C03E4D1L, 0x4B04D447L, 0xD20D85FDL, 0xA50AB56BL,
+ 0x35B5A8FAL, 0x42B2986CL, 0xDBBBC9D6L, 0xACBCF940L, 0x32D86CE3L, 0x45DF5C75L, 0xDCD60DCFL, 0xABD13D59L,
+ 0x26D930ACL, 0x51DE003AL, 0xC8D75180L, 0xBFD06116L, 0x21B4F4B5L, 0x56B3C423L, 0xCFBA9599L, 0xB8BDA50FL,
+ 0x2802B89EL, 0x5F058808L, 0xC60CD9B2L, 0xB10BE924L, 0x2F6F7C87L, 0x58684C11L, 0xC1611DABL, 0xB6662D3DL,
+ 0x76DC4190L, 0x01DB7106L, 0x98D220BCL, 0xEFD5102AL, 0x71B18589L, 0x06B6B51FL, 0x9FBFE4A5L, 0xE8B8D433L,
+ 0x7807C9A2L, 0x0F00F934L, 0x9609A88EL, 0xE10E9818L, 0x7F6A0DBBL, 0x086D3D2DL, 0x91646C97L, 0xE6635C01L,
+ 0x6B6B51F4L, 0x1C6C6162L, 0x856530D8L, 0xF262004EL, 0x6C0695EDL, 0x1B01A57BL, 0x8208F4C1L, 0xF50FC457L,
+ 0x65B0D9C6L, 0x12B7E950L, 0x8BBEB8EAL, 0xFCB9887CL, 0x62DD1DDFL, 0x15DA2D49L, 0x8CD37CF3L, 0xFBD44C65L,
+ 0x4DB26158L, 0x3AB551CEL, 0xA3BC0074L, 0xD4BB30E2L, 0x4ADFA541L, 0x3DD895D7L, 0xA4D1C46DL, 0xD3D6F4FBL,
+ 0x4369E96AL, 0x346ED9FCL, 0xAD678846L, 0xDA60B8D0L, 0x44042D73L, 0x33031DE5L, 0xAA0A4C5FL, 0xDD0D7CC9L,
+ 0x5005713CL, 0x270241AAL, 0xBE0B1010L, 0xC90C2086L, 0x5768B525L, 0x206F85B3L, 0xB966D409L, 0xCE61E49FL,
+ 0x5EDEF90EL, 0x29D9C998L, 0xB0D09822L, 0xC7D7A8B4L, 0x59B33D17L, 0x2EB40D81L, 0xB7BD5C3BL, 0xC0BA6CADL,
+ 0xEDB88320L, 0x9ABFB3B6L, 0x03B6E20CL, 0x74B1D29AL, 0xEAD54739L, 0x9DD277AFL, 0x04DB2615L, 0x73DC1683L,
+ 0xE3630B12L, 0x94643B84L, 0x0D6D6A3EL, 0x7A6A5AA8L, 0xE40ECF0BL, 0x9309FF9DL, 0x0A00AE27L, 0x7D079EB1L,
+ 0xF00F9344L, 0x8708A3D2L, 0x1E01F268L, 0x6906C2FEL, 0xF762575DL, 0x806567CBL, 0x196C3671L, 0x6E6B06E7L,
+ 0xFED41B76L, 0x89D32BE0L, 0x10DA7A5AL, 0x67DD4ACCL, 0xF9B9DF6FL, 0x8EBEEFF9L, 0x17B7BE43L, 0x60B08ED5L,
+ 0xD6D6A3E8L, 0xA1D1937EL, 0x38D8C2C4L, 0x4FDFF252L, 0xD1BB67F1L, 0xA6BC5767L, 0x3FB506DDL, 0x48B2364BL,
+ 0xD80D2BDAL, 0xAF0A1B4CL, 0x36034AF6L, 0x41047A60L, 0xDF60EFC3L, 0xA867DF55L, 0x316E8EEFL, 0x4669BE79L,
+ 0xCB61B38CL, 0xBC66831AL, 0x256FD2A0L, 0x5268E236L, 0xCC0C7795L, 0xBB0B4703L, 0x220216B9L, 0x5505262FL,
+ 0xC5BA3BBEL, 0xB2BD0B28L, 0x2BB45A92L, 0x5CB36A04L, 0xC2D7FFA7L, 0xB5D0CF31L, 0x2CD99E8BL, 0x5BDEAE1DL,
+ 0x9B64C2B0L, 0xEC63F226L, 0x756AA39CL, 0x026D930AL, 0x9C0906A9L, 0xEB0E363FL, 0x72076785L, 0x05005713L,
+ 0x95BF4A82L, 0xE2B87A14L, 0x7BB12BAEL, 0x0CB61B38L, 0x92D28E9BL, 0xE5D5BE0DL, 0x7CDCEFB7L, 0x0BDBDF21L,
+ 0x86D3D2D4L, 0xF1D4E242L, 0x68DDB3F8L, 0x1FDA836EL, 0x81BE16CDL, 0xF6B9265BL, 0x6FB077E1L, 0x18B74777L,
+ 0x88085AE6L, 0xFF0F6A70L, 0x66063BCAL, 0x11010B5CL, 0x8F659EFFL, 0xF862AE69L, 0x616BFFD3L, 0x166CCF45L,
+ 0xA00AE278L, 0xD70DD2EEL, 0x4E048354L, 0x3903B3C2L, 0xA7672661L, 0xD06016F7L, 0x4969474DL, 0x3E6E77DBL,
+ 0xAED16A4AL, 0xD9D65ADCL, 0x40DF0B66L, 0x37D83BF0L, 0xA9BCAE53L, 0xDEBB9EC5L, 0x47B2CF7FL, 0x30B5FFE9L,
+ 0xBDBDF21CL, 0xCABAC28AL, 0x53B39330L, 0x24B4A3A6L, 0xBAD03605L, 0xCDD70693L, 0x54DE5729L, 0x23D967BFL,
+ 0xB3667A2EL, 0xC4614AB8L, 0x5D681B02L, 0x2A6F2B94L, 0xB40BBE37L, 0xC30C8EA1L, 0x5A05DF1BL, 0x2D02EF8DL
+};
+
+
+int crc32_calcCheckSum(unsigned char * data, unsigned int length)
+{
+ unsigned long crc = 0xFFFFFFFF;
+
+ for(unsigned int i=0; i<length; i++)
+ crc = crctable[(crc ^ *data++) & 0xFF] ^ (crc >> 8);
+
+ return crc ^ 0xFFFFFFFF;
+}
diff --git a/src/jaguar/crc32.h b/src/jaguar/crc32.h
new file mode 100644
index 00000000..ceddd03f
--- /dev/null
+++ b/src/jaguar/crc32.h
@@ -0,0 +1,10 @@
+//
+// CRC32.H
+//
+
+#ifndef __CRC32_H__
+#define __CRC32_H__
+
+int crc32_calcCheckSum(unsigned char * data, unsigned int length);
+
+#endif // __CRC32_H__
diff --git a/src/jaguar/cry2rgb.h b/src/jaguar/cry2rgb.h
new file mode 100644
index 00000000..abf0cdd1
--- /dev/null
+++ b/src/jaguar/cry2rgb.h
@@ -0,0 +1,71 @@
+//
+// Red Color Values for CrY<->RGB Color Conversion
+//
+uint8 redcv[16][16] = {
+ // 0 1 2 3 4 5 6 7 8 9 A B C D E F
+ // ----------------------------------------------------------------------
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // 0
+ { 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 19, 0}, // 1
+ { 68, 68, 68, 68, 68, 68, 68, 68, 68, 68, 68, 68, 64, 43, 21, 0}, // 2
+ { 102,102,102,102,102,102,102,102,102,102,102,95, 71, 47, 23, 0}, // 3
+ { 135,135,135,135,135,135,135,135,135,135,130,104,78, 52, 26, 0}, // 4
+ { 169,169,169,169,169,169,169,169,169,170,141,113,85, 56, 28, 0}, // 5
+ { 203,203,203,203,203,203,203,203,203,183,153,122,91, 61, 30, 0}, // 6
+ { 237,237,237,237,237,237,237,237,230,197,164,131,98, 65, 32, 0}, // 7
+ { 255,255,255,255,255,255,255,255,247,214,181,148,15, 82, 49, 7}, // 8
+ { 255,255,255,255,255,255,255,255,255,235,204,173,143,112,81, 51}, // 9
+ { 255,255,255,255,255,255,255,255,255,255,227,198,170,141,113,85}, // A
+ { 255,255,255,255,255,255,255,255,255,255,249,223,197,171,145,119}, // B
+ { 255,255,255,255,255,255,255,255,255,255,255,248,224,200,177,153}, // C
+ { 255,255,255,255,255,255,255,255,255,255,255,255,252,230,208,187}, // D
+ { 255,255,255,255,255,255,255,255,255,255,255,255,255,255,240,221}, // E
+ { 255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255} // F
+};
+
+//
+// Green Color Values for CrY<->RGB Color Conversion
+//
+uint8 greencv[16][16] = {
+ // 0 1 2 3 4 5 6 7 8 9 A B C D E F
+ // ----------------------------------------------------------------------
+ { 0, 17, 34, 51,68, 85, 102,119,136,153,170,187,204,221,238,255}, // 0
+ { 0, 19, 38, 57,77, 96, 115,134,154,173,192,211,231,250,255,255}, // 1
+ { 0, 21, 43, 64,86, 107,129,150,172,193,215,236,255,255,255,255}, // 2
+ { 0, 23, 47, 71,95, 119,142,166,190,214,238,255,255,255,255,255}, // 3
+ { 0, 26, 52, 78,104,130,156,182,208,234,255,255,255,255,255,255}, // 4
+ { 0, 28, 56, 85,113,141,170,198,226,255,255,255,255,255,255,255}, // 5
+ { 0, 30, 61, 91,122,153,183,214,244,255,255,255,255,255,255,255}, // 6
+ { 0, 32, 65, 98,131,164,197,230,255,255,255,255,255,255,255,255}, // 7
+ { 0, 32, 65, 98,131,164,197,230,255,255,255,255,255,255,255,255}, // 8
+ { 0, 30, 61, 91,122,153,183,214,244,255,255,255,255,255,255,255}, // 9
+ { 0, 28, 56, 85,113,141,170,198,226,255,255,255,255,255,255,255}, // A
+ { 0, 26, 52, 78,104,130,156,182,208,234,255,255,255,255,255,255}, // B
+ { 0, 23, 47, 71,95, 119,142,166,190,214,238,255,255,255,255,255}, // C
+ { 0, 21, 43, 64,86, 107,129,150,172,193,215,236,255,255,255,255}, // D
+ { 0, 19, 38, 57,77, 96, 115,134,154,173,192,211,231,250,255,255}, // E
+ { 0, 17, 34, 51,68, 85, 102,119,136,153,170,187,204,221,238,255} // F
+};
+
+//
+// Blue Color Values for CrY<->RGB Color Conversion
+//
+uint8 bluecv[16][16] = {
+ // 0 1 2 3 4 5 6 7 8 9 A B C D E F
+ // ----------------------------------------------------------------------
+ { 255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255}, // 0
+ { 255,255,255,255,255,255,255,255,255,255,255,255,255,255,240,221}, // 1
+ { 255,255,255,255,255,255,255,255,255,255,255,255,252,230,208,187}, // 2
+ { 255,255,255,255,255,255,255,255,255,255,255,248,224,200,177,153}, // 3
+ { 255,255,255,255,255,255,255,255,255,255,249,223,197,171,145,119}, // 4
+ { 255,255,255,255,255,255,255,255,255,255,227,198,170,141,113,85}, // 5
+ { 255,255,255,255,255,255,255,255,255,235,204,173,143,112,81, 51}, // 6
+ { 255,255,255,255,255,255,255,255,247,214,181,148,115,82, 49, 17}, // 7
+ { 237,237,237,237,237,237,237,237,230,197,164,131,98, 65, 32, 0}, // 8
+ { 203,203,203,203,203,203,203,203,203,183,153,122,91, 61, 30, 0}, // 9
+ { 169,169,169,169,169,169,169,169,169,170,141,113,85, 56, 28, 0}, // A
+ { 135,135,135,135,135,135,135,135,135,135,130,104,78, 52, 26, 0}, // B
+ { 102,102,102,102,102,102,102,102,102,102,102,95, 71, 47, 23, 0}, // C
+ { 68, 68, 68, 68, 68, 68, 68, 68, 68, 68, 68, 68, 64, 43, 21, 0}, // D
+ { 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 19, 0}, // E
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} // F
+};
diff --git a/src/jaguar/dac.c b/src/jaguar/dac.c
new file mode 100644
index 00000000..f37dd843
--- /dev/null
+++ b/src/jaguar/dac.c
@@ -0,0 +1,416 @@
+//
+// DAC (really, Synchronous Serial Interface) Handler
+//
+// Originally by David Raingeard
+// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
+// Rewritten by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+//
+
+// Need to set up defaults that the BIOS sets for the SSI here in DACInit()... !!! FIX !!!
+// or something like that... Seems like it already does, but it doesn't seem to
+// work correctly...! Perhaps just need to set up SSI stuff so BUTCH doesn't get
+// confused...
+
+// ALSO: Need to implement some form of proper locking to replace the clusterfuck
+// that is the current spinlock implementation. Since the DSP is a separate
+// entity, could we get away with running it in the sound IRQ?
+
+// ALSO: It may be a good idea to physically separate the left and right buffers
+// to prevent things like the DSP filling only one side and such. Do such
+// mono modes exist on the Jag? Seems to according to Super Burnout.
+
+#include "dac.h"
+
+#include "SDL.h"
+//#include "gui.h"
+#include "jaguar.h"
+#include "log.h"
+#include "m68k.h"
+//#include "memory.h"
+#include "settings.h"
+
+//#define DEBUG_DAC
+
+#define BUFFER_SIZE 0x10000 // Make the DAC buffers 64K x 16 bits
+
+// Jaguar memory locations
+
+#define LTXD 0xF1A148
+#define RTXD 0xF1A14C
+#define LRXD 0xF1A148
+#define RRXD 0xF1A14C
+#define SCLK 0xF1A150
+#define SMODE 0xF1A154
+
+// Global variables
+
+//uint16 lrxd, rrxd; // I2S ports (into Jaguar)
+
+// Local variables
+
+static uint32 LeftFIFOHeadPtr, LeftFIFOTailPtr, RightFIFOHeadPtr, RightFIFOTailPtr;
+static SDL_AudioSpec desired;
+static bool SDLSoundInitialized = false;
+
+// We can get away with using native endian here because we can tell SDL to use the native
+// endian when looking at the sample buffer, i.e., no need to worry about it.
+
+static uint16 DACBuffer[BUFFER_SIZE];
+static uint8 SCLKFrequencyDivider = 19; // Default is roughly 22 KHz (20774 Hz in NTSC mode)
+/*static*/ uint16 serialMode = 0;
+
+// Private function prototypes
+
+void SDLSoundCallback(void * userdata, Uint8 * buffer, int length);
+int GetCalculatedFrequency(void);
+
+//
+// Initialize the SDL sound system
+//
+void DACInit(void)
+{
+// memory_malloc_secure((void **)&DACBuffer, BUFFER_SIZE * sizeof(uint16), "DAC buffer");
+// DACBuffer = (uint16 *)memory_malloc(BUFFER_SIZE * sizeof(uint16), "DAC buffer");
+
+ desired.freq = GetCalculatedFrequency(); // SDL will do conversion on the fly, if it can't get the exact rate. Nice!
+ desired.format = AUDIO_S16SYS; // This uses the native endian (for portability)...
+ desired.channels = 2;
+// desired.samples = 4096; // Let's try a 4K buffer (can always go lower)
+ desired.samples = 2048; // Let's try a 2K buffer (can always go lower)
+ desired.callback = SDLSoundCallback;
+
+ if (SDL_OpenAudio(&desired, NULL) < 0) // NULL means SDL guarantees what we want
+ WriteLog("DAC: Failed to initialize SDL sound...\n");
+ else
+ {
+ SDLSoundInitialized = true;
+ DACReset();
+ SDL_PauseAudio(false); // Start playback!
+ WriteLog("DAC: Successfully initialized.\n");
+ }
+}
+
+//
+// Reset the sound buffer FIFOs
+//
+void DACReset(void)
+{
+ LeftFIFOHeadPtr = LeftFIFOTailPtr = 0, RightFIFOHeadPtr = RightFIFOTailPtr = 1;
+}
+
+//
+// Close down the SDL sound subsystem
+//
+void DACDone(void)
+{
+ if (SDLSoundInitialized)
+ {
+ SDL_PauseAudio(true);
+ SDL_CloseAudio();
+ }
+
+// memory_free(DACBuffer);
+ WriteLog("DAC: Done.\n");
+}
+
+//
+// SDL callback routine to fill audio buffer
+//
+// Note: The samples are packed in the buffer in 16 bit left/16 bit right pairs.
+//
+void SDLSoundCallback(void * userdata, Uint8 * buffer, int length)
+{
+ // Clear the buffer to silence, in case the DAC buffer is empty (or short)
+//This causes choppy sound... Ick.
+ memset(buffer, desired.silence, length);
+//WriteLog("DAC: Inside callback...\n");
+ if (LeftFIFOHeadPtr != LeftFIFOTailPtr)
+ {
+//WriteLog("DAC: About to write some data!\n");
+ int numLeftSamplesReady
+ = (LeftFIFOTailPtr + (LeftFIFOTailPtr < LeftFIFOHeadPtr ? BUFFER_SIZE : 0))
+ - LeftFIFOHeadPtr;
+ int numRightSamplesReady
+ = (RightFIFOTailPtr + (RightFIFOTailPtr < RightFIFOHeadPtr ? BUFFER_SIZE : 0))
+ - RightFIFOHeadPtr;
+//This waits for the slower side to catch up. If writing only one side, then this
+//causes the buffer not to drain...
+ int numSamplesReady
+ = (numLeftSamplesReady < numRightSamplesReady
+ ? numLeftSamplesReady : numRightSamplesReady);//Hmm. * 2;
+
+//Kludge, until I can figure out WTF is going on WRT Super Burnout.
+if (numLeftSamplesReady == 0 || numRightSamplesReady == 0)
+ numSamplesReady = numLeftSamplesReady + numRightSamplesReady;
+
+//The numbers look good--it's just that the DSP can't get enough samples in the DAC buffer!
+//WriteLog("DAC: Left/RightFIFOHeadPtr: %u/%u, Left/RightFIFOTailPtr: %u/%u\n", LeftFIFOHeadPtr, RightFIFOHeadPtr, LeftFIFOTailPtr, RightFIFOTailPtr);
+//WriteLog(" numLeft/RightSamplesReady: %i/%i, numSamplesReady: %i, length of buffer: %i\n", numLeftSamplesReady, numRightSamplesReady, numSamplesReady, length);
+
+/* if (numSamplesReady > length)
+ numSamplesReady = length;//*/
+ if (numSamplesReady > length / 2) // length / 2 because we're comparing 16-bit lengths
+ numSamplesReady = length / 2;
+//else
+// WriteLog(" Not enough samples to fill the buffer (short by %u L/R samples)...\n", (length / 2) - numSamplesReady);
+//WriteLog("DAC: %u samples ready.\n", numSamplesReady);
+
+ // Actually, it's a bit more involved than this, but this is the general idea:
+// memcpy(buffer, DACBuffer, length);
+ for(int i=0; i<numSamplesReady; i++)
+ ((uint16 *)buffer)[i] = DACBuffer[(LeftFIFOHeadPtr + i) % BUFFER_SIZE];
+ // Could also use (as long as BUFFER_SIZE is a multiple of 2):
+// buffer[i] = DACBuffer[(LeftFIFOHeadPtr + i) & (BUFFER_SIZE - 1)];
+
+ LeftFIFOHeadPtr = (LeftFIFOHeadPtr + numSamplesReady) % BUFFER_SIZE;
+ RightFIFOHeadPtr = (RightFIFOHeadPtr + numSamplesReady) % BUFFER_SIZE;
+ // Could also use (as long as BUFFER_SIZE is a multiple of 2):
+// LeftFIFOHeadPtr = (LeftFIFOHeadPtr + numSamplesReady) & (BUFFER_SIZE - 1);
+// RightFIFOHeadPtr = (RightFIFOHeadPtr + numSamplesReady) & (BUFFER_SIZE - 1);
+//WriteLog(" -> Left/RightFIFOHeadPtr: %04X/%04X, Left/RightFIFOTailPtr: %04X/%04X\n", LeftFIFOHeadPtr, RightFIFOHeadPtr, LeftFIFOTailPtr, RightFIFOTailPtr);
+ }
+//Hmm. Seems that the SDL buffer isn't being starved by the DAC buffer...
+// else
+// WriteLog("DAC: Silence...!\n");
+}
+
+//
+// Calculate the freq9uency of SCLK * 32 using the divider
+//
+int GetCalculatedFrequency(void)
+{
+ int systemClockFrequency = (vjs.hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL);
+
+ // We divide by 32 here in order to find the frequency of 32 SCLKs in a row (transferring
+ // 16 bits of left data + 16 bits of right data = 32 bits, 1 SCLK = 1 bit transferred).
+ return systemClockFrequency / (32 * (2 * (SCLKFrequencyDivider + 1)));
+}
+
+//
+// LTXD/RTXD/SCLK/SMODE ($F1A148/4C/50/54)
+//
+void DACWriteByte(uint32 offset, uint8 data, uint32 who/*= UNKNOWN*/)
+{
+ WriteLog("DAC: %s writing BYTE %02X at %08X\n", whoName[who], data, offset);
+ if (offset == SCLK + 3)
+ DACWriteWord(offset - 3, (uint16)data);
+}
+
+void DACWriteWord(uint32 offset, uint16 data, uint32 who/*= UNKNOWN*/)
+{
+ if (offset == LTXD + 2)
+ {
+ // Spin until buffer has been drained (for too fast processors!)...
+//Small problem--if Head == 0 and Tail == buffer end, then this will fail... !!! FIX !!!
+//[DONE]
+ // Also, we're taking advantage of the fact that the buffer is a multiple of two
+ // in this check...
+uint32 spin = 0;
+ while (((LeftFIFOTailPtr + 2) & (BUFFER_SIZE - 1)) == LeftFIFOHeadPtr)//;
+ {
+spin++;
+//if ((spin & 0x0FFFFFFF) == 0)
+// WriteLog("Tail=%X, Head=%X, BUFFER_SIZE-1=%X\n", RightFIFOTailPtr, RightFIFOHeadPtr, BUFFER_SIZE - 1);
+
+if (spin == 0xFFFF0000)
+{
+uint32 ltail = LeftFIFOTailPtr, lhead = LeftFIFOHeadPtr;
+WriteLog("Tail=%X, Head=%X", ltail, lhead);
+
+ WriteLog("\nStuck in left DAC spinlock! Aborting!\n");
+ WriteLog("LTail=%X, LHead=%X, BUFFER_SIZE-1=%X\n", LeftFIFOTailPtr, LeftFIFOHeadPtr, BUFFER_SIZE - 1);
+ WriteLog("RTail=%X, RHead=%X, BUFFER_SIZE-1=%X\n", RightFIFOTailPtr, RightFIFOHeadPtr, BUFFER_SIZE - 1);
+ WriteLog("From while: Tail=%X, Head=%X", (LeftFIFOTailPtr + 2) & (BUFFER_SIZE - 1), LeftFIFOHeadPtr);
+// LogDone();
+// exit(0);
+#warning "Reimplement GUICrashGracefully!"
+// GUICrashGracefully("Stuck in left DAC spinlock!");
+ return;
+}
+ }//*/
+
+ SDL_LockAudio(); // Is it necessary to do this? Mebbe.
+ // We use a circular buffer 'cause it's easy. Note that the callback function
+ // takes care of dumping audio to the soundcard...! Also note that we're writing
+ // the samples in the buffer in an interleaved L/R format.
+ LeftFIFOTailPtr = (LeftFIFOTailPtr + 2) % BUFFER_SIZE;
+ DACBuffer[LeftFIFOTailPtr] = data;
+ SDL_UnlockAudio();
+ }
+ else if (offset == RTXD + 2)
+ {
+/*
+Here's what's happening now:
+
+Stuck in right DAC spinlock!
+Aborting!
+
+Tail=681, Head=681, BUFFER_SIZE-1=FFFF
+From while: Tail=683, Head=681
+
+????? What the FUCK ?????
+
+& when I uncomment the lines below spin++; it *doesn't* lock here... WTF?????
+
+I think it was missing parentheses causing the fuckup... Seems to work now....
+
+Except for Super Burnout now...! Aarrrgggghhhhh!
+
+Tail=AC, Head=AE
+Stuck in left DAC spinlock! Aborting!
+Tail=AC, Head=AE, BUFFER_SIZE-1=FFFF
+From while: Tail=AE, Head=AE
+
+So it's *really* stuck here in the left FIFO. Figure out why!!!
+
+Prolly 'cause it doesn't set the sample rate right away--betcha it works with the BIOS...
+It gets farther, but then locks here (weird!):
+
+Tail=2564, Head=2566
+Stuck in left DAC spinlock! Aborting!
+Tail=2564, Head=2566, BUFFER_SIZE-1=FFFF
+From while: Tail=2566, Head=2566
+
+Weird--recompile with more WriteLog() entries and it *doesn't* lock...
+Yeah, because there was no DSP running. Duh!
+
+Tail=AC, Head=AE
+Stuck in left DAC spinlock! Aborting!
+LTail=AC, LHead=AE, BUFFER_SIZE-1=FFFF
+RTail=AF, RHead=AF, BUFFER_SIZE-1=FFFF
+From while: Tail=AE, Head=AE
+
+Odd: The right FIFO is empty, but the left FIFO is full!
+And this is what is causing the lockup--the DAC callback waits for the side with
+less samples ready and in this case it's the right channel (that never fills up)
+that it's waiting for...!
+
+Okay, with the kludge in place for the right channel not being filled, we select
+a track and then it locks here:
+
+Tail=60D8, Head=60DA
+Stuck in left DAC spinlock! Aborting!
+LTail=60D8, LHead=60D8, BUFFER_SIZE-1=FFFF
+RTail=DB, RHead=60D9, BUFFER_SIZE-1=FFFF
+From while: Tail=60DA, Head=60D8
+*/
+#warning Spinlock problem--!!! FIX !!!
+#warning Odd: The right FIFO is empty, but the left FIFO is full!
+ // Spin until buffer has been drained (for too fast processors!)...
+uint32 spin = 0;
+ while (((RightFIFOTailPtr + 2) & (BUFFER_SIZE - 1)) == RightFIFOHeadPtr)//;
+ {
+spin++;
+//if ((spin & 0x0FFFFFFF) == 0)
+// WriteLog("Tail=%X, Head=%X, BUFFER_SIZE-1=%X\n", RightFIFOTailPtr, RightFIFOHeadPtr, BUFFER_SIZE - 1);
+
+if (spin == 0xFFFF0000)
+{
+uint32 rtail = RightFIFOTailPtr, rhead = RightFIFOHeadPtr;
+WriteLog("Tail=%X, Head=%X", rtail, rhead);
+
+ WriteLog("\nStuck in right DAC spinlock! Aborting!\n");
+ WriteLog("LTail=%X, LHead=%X, BUFFER_SIZE-1=%X\n", LeftFIFOTailPtr, LeftFIFOHeadPtr, BUFFER_SIZE - 1);
+ WriteLog("RTail=%X, RHead=%X, BUFFER_SIZE-1=%X\n", RightFIFOTailPtr, RightFIFOHeadPtr, BUFFER_SIZE - 1);
+ WriteLog("From while: Tail=%X, Head=%X", (RightFIFOTailPtr + 2) & (BUFFER_SIZE - 1), RightFIFOHeadPtr);
+// LogDone();
+// exit(0);
+#warning "Reimplement GUICrashGracefully!"
+// GUICrashGracefully("Stuck in right DAC spinlock!");
+ return;
+}
+ }//*/
+
+ SDL_LockAudio();
+ RightFIFOTailPtr = (RightFIFOTailPtr + 2) % BUFFER_SIZE;
+ DACBuffer[RightFIFOTailPtr] = data;
+ SDL_UnlockAudio();
+/*#ifdef DEBUG_DAC
+ else
+ WriteLog("DAC: Ran into FIFO's right tail pointer!\n");
+#endif*/
+ }
+ else if (offset == SCLK + 2) // Sample rate
+ {
+ WriteLog("DAC: Writing %u to SCLK...\n", data);
+ if ((uint8)data != SCLKFrequencyDivider)
+ {
+ SCLKFrequencyDivider = (uint8)data;
+//Of course a better way would be to query the hardware to find the upper limit...
+ if (data > 7) // Anything less than 8 is too high!
+ {
+ if (SDLSoundInitialized)
+ SDL_CloseAudio();
+
+ desired.freq = GetCalculatedFrequency();// SDL will do conversion on the fly, if it can't get the exact rate. Nice!
+ WriteLog("DAC: Changing sample rate to %u Hz!\n", desired.freq);
+
+ if (SDLSoundInitialized)
+ {
+ if (SDL_OpenAudio(&desired, NULL) < 0) // NULL means SDL guarantees what we want
+ {
+// This is bad, Bad, BAD !!! DON'T ABORT BECAUSE WE DIDN'T GET OUR FREQ! !!! FIX !!!
+#warning !!! FIX !!! Aborting because of SDL audio problem is bad!
+ WriteLog("DAC: Failed to initialize SDL sound: %s.\nDesired freq: %u\nShutting down!\n", SDL_GetError(), desired.freq);
+// LogDone();
+// exit(1);
+#warning "Reimplement GUICrashGracefully!"
+// GUICrashGracefully("Failed to initialize SDL sound!");
+ return;
+ }
+ }
+
+ DACReset();
+
+ if (SDLSoundInitialized)
+ SDL_PauseAudio(false); // Start playback!
+ }
+ }
+ }
+ else if (offset == SMODE + 2)
+ {
+ serialMode = data;
+ WriteLog("DAC: %s writing to SMODE. Bits: %s%s%s%s%s%s [68K PC=%08X]\n", whoName[who],
+ (data & 0x01 ? "INTERNAL " : ""), (data & 0x02 ? "MODE " : ""),
+ (data & 0x04 ? "WSEN " : ""), (data & 0x08 ? "RISING " : ""),
+ (data & 0x10 ? "FALLING " : ""), (data & 0x20 ? "EVERYWORD" : ""),
+ m68k_get_reg(NULL, M68K_REG_PC));
+ }
+}
+
+//
+// LRXD/RRXD/SSTAT ($F1A148/4C/50)
+//
+uint8 DACReadByte(uint32 offset, uint32 who/*= UNKNOWN*/)
+{
+// WriteLog("DAC: %s reading byte from %08X\n", whoName[who], offset);
+ return 0xFF;
+}
+
+//static uint16 fakeWord = 0;
+uint16 DACReadWord(uint32 offset, uint32 who/*= UNKNOWN*/)
+{
+// WriteLog("DAC: %s reading word from %08X\n", whoName[who], offset);
+// return 0xFFFF;
+// WriteLog("DAC: %s reading WORD %04X from %08X\n", whoName[who], fakeWord, offset);
+// return fakeWord++;
+//NOTE: This only works if a bunch of things are set in BUTCH which we currently don't
+// check for. !!! FIX !!!
+// Partially fixed: We check for I2SCNTRL in the JERRY I2S routine...
+// return GetWordFromButchSSI(offset, who);
+ if (offset == LRXD || offset == RRXD)
+ return 0x0000;
+ else if (offset == LRXD + 2)
+ return lrxd;
+ else if (offset == RRXD + 2)
+ return rrxd;
+
+ return 0xFFFF; // May need SSTAT as well... (but may be a Jaguar II only feature)
+}
diff --git a/src/jaguar/dac.h b/src/jaguar/dac.h
new file mode 100644
index 00000000..ac94d06f
--- /dev/null
+++ b/src/jaguar/dac.h
@@ -0,0 +1,26 @@
+//
+// DAC.H: Header file
+//
+
+#ifndef __DAC_H__
+#define __DAC_H__
+
+//#include "types.h"
+#include "memory.h"
+
+void DACInit(void);
+void DACReset(void);
+void DACDone(void);
+
+// DAC memory access
+
+void DACWriteByte(uint32 offset, uint8 data, uint32 who = UNKNOWN);
+void DACWriteWord(uint32 offset, uint16 data, uint32 who = UNKNOWN);
+uint8 DACReadByte(uint32 offset, uint32 who = UNKNOWN);
+uint16 DACReadWord(uint32 offset, uint32 who = UNKNOWN);
+
+// Global variables
+
+//extern uint16 lrxd, rrxd; // I2S ports (into Jaguar)
+
+#endif // __DAC_H__
diff --git a/src/jaguar/dsp.c b/src/jaguar/dsp.c
new file mode 100644
index 00000000..39905453
--- /dev/null
+++ b/src/jaguar/dsp.c
@@ -0,0 +1,4637 @@
+//
+// DSP core
+//
+// Originally by David Raingeard
+// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
+// Extensive cleanups/rewrites by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+//
+
+#include "dsp.h"
+
+#include <SDL.h> // Used only for SDL_GetTicks...
+#include <stdlib.h>
+#include "gpu.h"
+#include "jagdasm.h"
+#include "jaguar.h"
+#include "jerry.h"
+#include "log.h"
+#include "m68k.h"
+//#include "memory.h"
+
+//#define DSP_DEBUG
+//#define DSP_DEBUG_IRQ
+//#define DSP_DEBUG_PL2
+//#define DSP_DEBUG_STALL
+//#define DSP_DEBUG_CC
+#define NEW_SCOREBOARD
+
+// Disassembly definitions
+
+#define DSP_DIS_ABS
+#define DSP_DIS_ADD
+#define DSP_DIS_ADDC
+#define DSP_DIS_ADDQ
+#define DSP_DIS_ADDQMOD
+#define DSP_DIS_ADDQT
+#define DSP_DIS_AND
+#define DSP_DIS_BCLR
+#define DSP_DIS_BSET
+#define DSP_DIS_BTST
+#define DSP_DIS_CMP
+#define DSP_DIS_CMPQ
+#define DSP_DIS_IMACN
+#define DSP_DIS_IMULT
+#define DSP_DIS_IMULTN
+#define DSP_DIS_ILLEGAL
+#define DSP_DIS_JR
+#define DSP_DIS_JUMP
+#define DSP_DIS_LOAD
+#define DSP_DIS_LOAD14I
+#define DSP_DIS_LOAD14R
+#define DSP_DIS_LOAD15I
+#define DSP_DIS_LOAD15R
+#define DSP_DIS_LOADB
+#define DSP_DIS_LOADW
+#define DSP_DIS_MOVE
+#define DSP_DIS_MOVEI
+#define DSP_DIS_MOVEQ
+#define DSP_DIS_MOVEFA
+#define DSP_DIS_MOVEPC // Pipeline only!
+#define DSP_DIS_MOVETA
+#define DSP_DIS_MULT
+#define DSP_DIS_NEG
+#define DSP_DIS_NOP
+#define DSP_DIS_NOT
+#define DSP_DIS_OR
+#define DSP_DIS_RESMAC
+#define DSP_DIS_ROR
+#define DSP_DIS_RORQ
+#define DSP_DIS_SHARQ
+#define DSP_DIS_SHLQ
+#define DSP_DIS_SHRQ
+#define DSP_DIS_STORE
+#define DSP_DIS_STORE14I
+#define DSP_DIS_STORE15I
+#define DSP_DIS_STOREB
+#define DSP_DIS_STOREW
+#define DSP_DIS_SUB
+#define DSP_DIS_SUBC
+#define DSP_DIS_SUBQ
+#define DSP_DIS_SUBQT
+#define DSP_DIS_XOR
+//*/
+bool doDSPDis = false;
+//bool doDSPDis = true;
+
+
+/*
+No dis yet:
++ subqt 4560
++ mult 1472
++ imultn 395024
++ resmac 395024
++ imacn 395024
++ addqmod 93328
+
+dsp opcodes use:
++ add 1672497
++ addq 4366576
++ addqt 44405640
++ sub 94833
++ subq 111769
++ and 47416
++ btst 94521
++ bset 2277826
++ bclr 3223372
++ mult 47104
++ imult 237080
++ shlq 365464
++ shrq 141624
++ sharq 318368
++ cmp 45175078
++ move 2238994
++ moveq 335305
++ moveta 19
++ movefa 47406440
++ movei 1920664
++ loadb 94832
++ load 4031281
++ load_r15_indexed 284500
++ store 2161732
++ store_r15_indexed 47416
++ jump 3872424
++ jr 46386967
++ nop 3300029
++ load_r14_ri 1229448
+*/
+
+// Pipeline structures
+
+const bool affectsScoreboard[64] =
+{
+ true, true, true, true,
+ true, true, true, true,
+ true, true, true, true,
+ true, false, true, true,
+
+ true, true, false, true,
+ false, true, true, true,
+ true, true, true, true,
+ true, true, false, false,
+
+ true, true, true, true,
+ false, true, true, true,
+ true, true, true, true,
+ true, false, false, false,
+
+ true, false, false, true,
+ false, false, true, true,
+ true, false, true, true,
+ false, false, false, true
+};
+
+struct PipelineStage
+{
+ uint16 instruction;
+ uint8 opcode, operand1, operand2;
+ uint32 reg1, reg2, areg1, areg2;
+ uint32 result;
+ uint8 writebackRegister;
+ // General memory store...
+ uint32 address;
+ uint32 value;
+ uint8 type;
+};
+
+#define TYPE_BYTE 0
+#define TYPE_WORD 1
+#define TYPE_DWORD 2
+#define PIPELINE_STALL 64 // Set to # of opcodes + 1
+#ifndef NEW_SCOREBOARD
+bool scoreboard[32];
+#else
+uint8 scoreboard[32];
+#endif
+uint8 plPtrFetch, plPtrRead, plPtrExec, plPtrWrite;
+PipelineStage pipeline[4];
+bool IMASKCleared = false;
+
+// DSP flags (old--have to get rid of this crap)
+
+#define CINT0FLAG 0x00200
+#define CINT1FLAG 0x00400
+#define CINT2FLAG 0x00800
+#define CINT3FLAG 0x01000
+#define CINT4FLAG 0x02000
+#define CINT04FLAGS (CINT0FLAG | CINT1FLAG | CINT2FLAG | CINT3FLAG | CINT4FLAG)
+#define CINT5FLAG 0x20000 /* DSP only */
+
+// DSP_FLAGS bits
+
+#define ZERO_FLAG 0x00001
+#define CARRY_FLAG 0x00002
+#define NEGA_FLAG 0x00004
+#define IMASK 0x00008
+#define INT_ENA0 0x00010
+#define INT_ENA1 0x00020
+#define INT_ENA2 0x00040
+#define INT_ENA3 0x00080
+#define INT_ENA4 0x00100
+#define INT_CLR0 0x00200
+#define INT_CLR1 0x00400
+#define INT_CLR2 0x00800
+#define INT_CLR3 0x01000
+#define INT_CLR4 0x02000
+#define REGPAGE 0x04000
+#define DMAEN 0x08000
+#define INT_ENA5 0x10000
+#define INT_CLR5 0x20000
+
+// DSP_CTRL bits
+
+#define DSPGO 0x00001
+#define CPUINT 0x00002
+#define DSPINT0 0x00004
+#define SINGLE_STEP 0x00008
+#define SINGLE_GO 0x00010
+// Bit 5 is unused!
+#define INT_LAT0 0x00040
+#define INT_LAT1 0x00080
+#define INT_LAT2 0x00100
+#define INT_LAT3 0x00200
+#define INT_LAT4 0x00400
+#define BUS_HOG 0x00800
+#define VERSION 0x0F000
+#define INT_LAT5 0x10000
+
+extern uint32 jaguar_mainRom_crc32;
+
+// Is opcode 62 *really* a NOP? Seems like it...
+static void dsp_opcode_abs(void);
+static void dsp_opcode_add(void);
+static void dsp_opcode_addc(void);
+static void dsp_opcode_addq(void);
+static void dsp_opcode_addqmod(void);
+static void dsp_opcode_addqt(void);
+static void dsp_opcode_and(void);
+static void dsp_opcode_bclr(void);
+static void dsp_opcode_bset(void);
+static void dsp_opcode_btst(void);
+static void dsp_opcode_cmp(void);
+static void dsp_opcode_cmpq(void);
+static void dsp_opcode_div(void);
+static void dsp_opcode_imacn(void);
+static void dsp_opcode_imult(void);
+static void dsp_opcode_imultn(void);
+static void dsp_opcode_jr(void);
+static void dsp_opcode_jump(void);
+static void dsp_opcode_load(void);
+static void dsp_opcode_loadb(void);
+static void dsp_opcode_loadw(void);
+static void dsp_opcode_load_r14_indexed(void);
+static void dsp_opcode_load_r14_ri(void);
+static void dsp_opcode_load_r15_indexed(void);
+static void dsp_opcode_load_r15_ri(void);
+static void dsp_opcode_mirror(void);
+static void dsp_opcode_mmult(void);
+static void dsp_opcode_move(void);
+static void dsp_opcode_movei(void);
+static void dsp_opcode_movefa(void);
+static void dsp_opcode_move_pc(void);
+static void dsp_opcode_moveq(void);
+static void dsp_opcode_moveta(void);
+static void dsp_opcode_mtoi(void);
+static void dsp_opcode_mult(void);
+static void dsp_opcode_neg(void);
+static void dsp_opcode_nop(void);
+static void dsp_opcode_normi(void);
+static void dsp_opcode_not(void);
+static void dsp_opcode_or(void);
+static void dsp_opcode_resmac(void);
+static void dsp_opcode_ror(void);
+static void dsp_opcode_rorq(void);
+static void dsp_opcode_xor(void);
+static void dsp_opcode_sat16s(void);
+static void dsp_opcode_sat32s(void);
+static void dsp_opcode_sh(void);
+static void dsp_opcode_sha(void);
+static void dsp_opcode_sharq(void);
+static void dsp_opcode_shlq(void);
+static void dsp_opcode_shrq(void);
+static void dsp_opcode_store(void);
+static void dsp_opcode_storeb(void);
+static void dsp_opcode_storew(void);
+static void dsp_opcode_store_r14_indexed(void);
+static void dsp_opcode_store_r14_ri(void);
+static void dsp_opcode_store_r15_indexed(void);
+static void dsp_opcode_store_r15_ri(void);
+static void dsp_opcode_sub(void);
+static void dsp_opcode_subc(void);
+static void dsp_opcode_subq(void);
+static void dsp_opcode_subqmod(void);
+static void dsp_opcode_subqt(void);
+
+uint8 dsp_opcode_cycles[64] =
+{
+ 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 1, 3, 1, 18, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 2, 2, 2, 2, 3, 4,
+ 5, 4, 5, 6, 6, 1, 1, 1,
+ 1, 2, 2, 2, 1, 1, 9, 3,
+ 3, 1, 6, 6, 2, 2, 3, 3
+};//*/
+//Here's a QnD kludge...
+//This is wrong, wrong, WRONG, but it seems to work for the time being...
+//(That is, it fixes Flip Out which relies on GPU timing rather than semaphores. Bad developers! Bad!)
+//What's needed here is a way to take pipeline effects into account (including pipeline stalls!)...
+/*uint8 dsp_opcode_cycles[64] =
+{
+ 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 9, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 2,
+ 2, 2, 2, 3, 3, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 4, 1,
+ 1, 1, 3, 3, 1, 1, 1, 1
+};//*/
+
+void (* dsp_opcode[64])() =
+{
+ dsp_opcode_add, dsp_opcode_addc, dsp_opcode_addq, dsp_opcode_addqt,
+ dsp_opcode_sub, dsp_opcode_subc, dsp_opcode_subq, dsp_opcode_subqt,
+ dsp_opcode_neg, dsp_opcode_and, dsp_opcode_or, dsp_opcode_xor,
+ dsp_opcode_not, dsp_opcode_btst, dsp_opcode_bset, dsp_opcode_bclr,
+ dsp_opcode_mult, dsp_opcode_imult, dsp_opcode_imultn, dsp_opcode_resmac,
+ dsp_opcode_imacn, dsp_opcode_div, dsp_opcode_abs, dsp_opcode_sh,
+ dsp_opcode_shlq, dsp_opcode_shrq, dsp_opcode_sha, dsp_opcode_sharq,
+ dsp_opcode_ror, dsp_opcode_rorq, dsp_opcode_cmp, dsp_opcode_cmpq,
+ dsp_opcode_subqmod, dsp_opcode_sat16s, dsp_opcode_move, dsp_opcode_moveq,
+ dsp_opcode_moveta, dsp_opcode_movefa, dsp_opcode_movei, dsp_opcode_loadb,
+ dsp_opcode_loadw, dsp_opcode_load, dsp_opcode_sat32s, dsp_opcode_load_r14_indexed,
+ dsp_opcode_load_r15_indexed, dsp_opcode_storeb, dsp_opcode_storew, dsp_opcode_store,
+ dsp_opcode_mirror, dsp_opcode_store_r14_indexed, dsp_opcode_store_r15_indexed, dsp_opcode_move_pc,
+ dsp_opcode_jump, dsp_opcode_jr, dsp_opcode_mmult, dsp_opcode_mtoi,
+ dsp_opcode_normi, dsp_opcode_nop, dsp_opcode_load_r14_ri, dsp_opcode_load_r15_ri,
+ dsp_opcode_store_r14_ri, dsp_opcode_store_r15_ri, dsp_opcode_nop, dsp_opcode_addqmod,
+};
+
+uint32 dsp_opcode_use[65];
+
+const char * dsp_opcode_str[65]=
+{
+ "add", "addc", "addq", "addqt",
+ "sub", "subc", "subq", "subqt",
+ "neg", "and", "or", "xor",
+ "not", "btst", "bset", "bclr",
+ "mult", "imult", "imultn", "resmac",
+ "imacn", "div", "abs", "sh",
+ "shlq", "shrq", "sha", "sharq",
+ "ror", "rorq", "cmp", "cmpq",
+ "subqmod", "sat16s", "move", "moveq",
+ "moveta", "movefa", "movei", "loadb",
+ "loadw", "load", "sat32s", "load_r14_indexed",
+ "load_r15_indexed", "storeb", "storew", "store",
+ "mirror", "store_r14_indexed","store_r15_indexed","move_pc",
+ "jump", "jr", "mmult", "mtoi",
+ "normi", "nop", "load_r14_ri", "load_r15_ri",
+ "store_r14_ri", "store_r15_ri", "illegal", "addqmod",
+ "STALL"
+};
+
+uint32 dsp_pc;
+static uint64 dsp_acc; // 40 bit register, NOT 32!
+static uint32 dsp_remain;
+static uint32 dsp_modulo;
+static uint32 dsp_flags;
+static uint32 dsp_matrix_control;
+static uint32 dsp_pointer_to_matrix;
+static uint32 dsp_data_organization;
+uint32 dsp_control;
+static uint32 dsp_div_control;
+static uint8 dsp_flag_z, dsp_flag_n, dsp_flag_c;
+static uint32 * dsp_reg = NULL, * dsp_alternate_reg = NULL;
+static uint32 dsp_reg_bank_0[32], dsp_reg_bank_1[32];
+
+static uint32 dsp_opcode_first_parameter;
+static uint32 dsp_opcode_second_parameter;
+
+#define DSP_RUNNING (dsp_control & 0x01)
+
+#define RM dsp_reg[dsp_opcode_first_parameter]
+#define RN dsp_reg[dsp_opcode_second_parameter]
+#define ALTERNATE_RM dsp_alternate_reg[dsp_opcode_first_parameter]
+#define ALTERNATE_RN dsp_alternate_reg[dsp_opcode_second_parameter]
+#define IMM_1 dsp_opcode_first_parameter
+#define IMM_2 dsp_opcode_second_parameter
+
+#define CLR_Z (dsp_flag_z = 0)
+#define CLR_ZN (dsp_flag_z = dsp_flag_n = 0)
+#define CLR_ZNC (dsp_flag_z = dsp_flag_n = dsp_flag_c = 0)
+#define SET_Z(r) (dsp_flag_z = ((r) == 0))
+#define SET_N(r) (dsp_flag_n = (((uint32)(r) >> 31) & 0x01))
+#define SET_C_ADD(a,b) (dsp_flag_c = ((uint32)(b) > (uint32)(~(a))))
+#define SET_C_SUB(a,b) (dsp_flag_c = ((uint32)(b) > (uint32)(a)))
+#define SET_ZN(r) SET_N(r); SET_Z(r)
+#define SET_ZNC_ADD(a,b,r) SET_N(r); SET_Z(r); SET_C_ADD(a,b)
+#define SET_ZNC_SUB(a,b,r) SET_N(r); SET_Z(r); SET_C_SUB(a,b)
+
+uint32 dsp_convert_zero[32] = { 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 };
+uint8 * dsp_branch_condition_table = NULL;
+static uint16 * mirror_table = NULL;
+static uint8 dsp_ram_8[0x2000];
+
+#define BRANCH_CONDITION(x) dsp_branch_condition_table[(x) + ((jaguar_flags & 7) << 5)]
+
+static uint32 dsp_in_exec = 0;
+static uint32 dsp_releaseTimeSlice_flag = 0;
+
+FILE * dsp_fp;
+
+#ifdef DSP_DEBUG_CC
+// Comparison core vars (used only for core comparison! :-)
+static uint64 count = 0;
+static uint8 ram1[0x2000], ram2[0x2000];
+static uint32 regs1[64], regs2[64];
+static uint32 ctrl1[14], ctrl2[14];
+#endif
+
+// Private function prototypes
+
+void DSPDumpRegisters(void);
+void DSPDumpDisassembly(void);
+void FlushDSPPipeline(void);
+
+
+void dsp_reset_stats(void)
+{
+ for(int i=0; i<65; i++)
+ dsp_opcode_use[i] = 0;
+}
+
+void DSPReleaseTimeslice(void)
+{
+//This does absolutely nothing!!! !!! FIX !!!
+ dsp_releaseTimeSlice_flag = 1;
+}
+
+void dsp_build_branch_condition_table(void)
+{
+ // Allocate the mirror table
+ if (!mirror_table)
+ mirror_table = (uint16 *)malloc(65536 * sizeof(uint16));
+
+ // Fill in the mirror table
+ if (mirror_table)
+ for(int i=0; i<65536; i++)
+ mirror_table[i] = ((i >> 15) & 0x0001) | ((i >> 13) & 0x0002) |
+ ((i >> 11) & 0x0004) | ((i >> 9) & 0x0008) |
+ ((i >> 7) & 0x0010) | ((i >> 5) & 0x0020) |
+ ((i >> 3) & 0x0040) | ((i >> 1) & 0x0080) |
+ ((i << 1) & 0x0100) | ((i << 3) & 0x0200) |
+ ((i << 5) & 0x0400) | ((i << 7) & 0x0800) |
+ ((i << 9) & 0x1000) | ((i << 11) & 0x2000) |
+ ((i << 13) & 0x4000) | ((i << 15) & 0x8000);
+
+ if (!dsp_branch_condition_table)
+ {
+ dsp_branch_condition_table = (uint8 *)malloc(32 * 8 * sizeof(uint8));
+
+ // Fill in the condition table
+ if (dsp_branch_condition_table)
+ {
+ for(int i=0; i<8; i++)
+ {
+ for(int j=0; j<32; j++)
+ {
+ int result = 1;
+ if (j & 1)
+ if (i & ZERO_FLAG)
+ result = 0;
+ if (j & 2)
+ if (!(i & ZERO_FLAG))
+ result = 0;
+ if (j & 4)
+ if (i & (CARRY_FLAG << (j >> 4)))
+ result = 0;
+ if (j & 8)
+ if (!(i & (CARRY_FLAG << (j >> 4))))
+ result = 0;
+ dsp_branch_condition_table[i * 32 + j] = result;
+ }
+ }
+ }
+ }
+}
+
+uint8 DSPReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ if (offset >= 0xF1A000 && offset <= 0xF1A0FF)
+ WriteLog("DSP: ReadByte--Attempt to read from DSP register file by %s!\n", whoName[who]);
+// battlemorph
+// if ((offset==0xF1CFE0)||(offset==0xF1CFE2))
+// return(0xffff);
+ // mutant penguin
+/* if ((jaguar_mainRom_crc32==0xbfd751a4)||(jaguar_mainRom_crc32==0x053efaf9))
+ {
+ if (offset==0xF1CFE0)
+ return(0xff);
+ }*/
+ if (offset >= DSP_WORK_RAM_BASE && offset <= (DSP_WORK_RAM_BASE + 0x1FFF))
+ return dsp_ram_8[offset - DSP_WORK_RAM_BASE];
+
+ if (offset >= DSP_CONTROL_RAM_BASE && offset <= (DSP_CONTROL_RAM_BASE + 0x1F))
+ {
+ uint32 data = DSPReadLong(offset & 0xFFFFFFFC, who);
+
+ if ((offset&0x03)==0)
+ return(data>>24);
+ else
+ if ((offset&0x03)==1)
+ return((data>>16)&0xff);
+ else
+ if ((offset&0x03)==2)
+ return((data>>8)&0xff);
+ else
+ if ((offset&0x03)==3)
+ return(data&0xff);
+ }
+
+ return JaguarReadByte(offset, who);
+}
+
+uint16 DSPReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ if (offset >= 0xF1A000 && offset <= 0xF1A0FF)
+ WriteLog("DSP: ReadWord--Attempt to read from DSP register file by %s!\n", whoName[who]);
+ //???
+ offset &= 0xFFFFFFFE;
+ // jaguar cd bios
+/* if (jaguar_mainRom_crc32==0xa74a97cd)
+ {
+ if (offset==0xF1A114) return(0x0000);
+ if (offset==0xF1A116) return(0x0000);
+ if (offset==0xF1B000) return(0x1234);
+ if (offset==0xF1B002) return(0x5678);
+ }*/
+/*
+ if (jaguar_mainRom_crc32==0x7ae20823)
+ {
+ if (offset==0xF1B9D8) return(0x0000);
+ if (offset==0xF1B9Da) return(0x0000);
+ if (offset==0xF1B2C0) return(0x0000);
+ if (offset==0xF1B2C2) return(0x0000);
+ }
+*/
+ // pour permettre � wolfenstein 3d de tourner sans le dsp
+/* if ((offset==0xF1B0D0)||(offset==0xF1B0D2))
+ return(0);
+*/
+
+ // pour permettre � nba jam de tourner sans le dsp
+/* if (jaguar_mainRom_crc32==0x4faddb18)
+ {
+ if (offset==0xf1b2c0) return(0);
+ if (offset==0xf1b2c2) return(0);
+ if (offset==0xf1b240) return(0);
+ if (offset==0xf1b242) return(0);
+ if (offset==0xF1B340) return(0);
+ if (offset==0xF1B342) return(0);
+ if (offset==0xF1BAD8) return(0);
+ if (offset==0xF1BADA) return(0);
+ if (offset==0xF1B040) return(0);
+ if (offset==0xF1B042) return(0);
+ if (offset==0xF1B0C0) return(0);
+ if (offset==0xF1B0C2) return(0);
+ if (offset==0xF1B140) return(0);
+ if (offset==0xF1B142) return(0);
+ if (offset==0xF1B1C0) return(0);
+ if (offset==0xF1B1C2) return(0);
+ }*/
+
+ if (offset >= DSP_WORK_RAM_BASE && offset <= DSP_WORK_RAM_BASE+0x1FFF)
+ {
+ offset -= DSP_WORK_RAM_BASE;
+/* uint16 data = (((uint16)dsp_ram_8[offset])<<8)|((uint16)dsp_ram_8[offset+1]);
+ return data;*/
+ return GET16(dsp_ram_8, offset);
+ }
+ else if ((offset>=DSP_CONTROL_RAM_BASE)&&(offset<DSP_CONTROL_RAM_BASE+0x20))
+ {
+ uint32 data = DSPReadLong(offset & 0xFFFFFFFC, who);
+
+ if (offset & 0x03)
+ return data & 0xFFFF;
+ else
+ return data >> 16;
+ }
+
+ return JaguarReadWord(offset, who);
+}
+
+uint32 DSPReadLong(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ if (offset >= 0xF1A000 && offset <= 0xF1A0FF)
+ WriteLog("DSP: ReadLong--Attempt to read from DSP register file by %s!\n", whoName[who]);
+
+ // ??? WHY ???
+ offset &= 0xFFFFFFFC;
+/*if (offset == 0xF1BCF4)
+{
+ WriteLog("DSPReadLong: Reading from 0xF1BCF4... -> %08X [%02X %02X %02X %02X][%04X %04X]\n", GET32(dsp_ram_8, 0x0CF4), dsp_ram_8[0x0CF4], dsp_ram_8[0x0CF5], dsp_ram_8[0x0CF6], dsp_ram_8[0x0CF7], JaguarReadWord(0xF1BCF4, DSP), JaguarReadWord(0xF1BCF6, DSP));
+ DSPDumpDisassembly();
+}*/
+ if (offset >= DSP_WORK_RAM_BASE && offset <= DSP_WORK_RAM_BASE + 0x1FFF)
+ {
+ offset -= DSP_WORK_RAM_BASE;
+ return GET32(dsp_ram_8, offset);
+ }
+//NOTE: Didn't return DSP_ACCUM!!!
+//Mebbe it's not 'spose to! Yes, it is!
+ if (offset >= DSP_CONTROL_RAM_BASE && offset <= DSP_CONTROL_RAM_BASE + 0x23)
+ {
+ offset &= 0x3F;
+ switch (offset)
+ {
+ case 0x00: /*dsp_flag_c?(dsp_flag_c=1):(dsp_flag_c=0);
+ dsp_flag_z?(dsp_flag_z=1):(dsp_flag_z=0);
+ dsp_flag_n?(dsp_flag_n=1):(dsp_flag_n=0);*/
+
+ dsp_flags = (dsp_flags & 0xFFFFFFF8) | (dsp_flag_n << 2) | (dsp_flag_c << 1) | dsp_flag_z;
+ return dsp_flags & 0xFFFFC1FF;
+ case 0x04: return dsp_matrix_control;
+ case 0x08: return dsp_pointer_to_matrix;
+ case 0x0C: return dsp_data_organization;
+ case 0x10: return dsp_pc;
+ case 0x14: return dsp_control;
+ case 0x18: return dsp_modulo;
+ case 0x1C: return dsp_remain;
+ case 0x20:
+ return (int32)((int8)(dsp_acc >> 32)); // Top 8 bits of 40-bit accumulator, sign extended
+ }
+ // unaligned long read-- !!! FIX !!!
+ return 0xFFFFFFFF;
+ }
+
+ return JaguarReadLong(offset, who);
+}
+
+void DSPWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
+{
+ if (offset >= 0xF1A000 && offset <= 0xF1A0FF)
+ WriteLog("DSP: WriteByte--Attempt to write to DSP register file by %s!\n", whoName[who]);
+
+ if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
+ {
+ offset -= DSP_WORK_RAM_BASE;
+ dsp_ram_8[offset] = data;
+//This is rather stupid! !!! FIX !!!
+/* if (dsp_in_exec == 0)
+ {
+ m68k_end_timeslice();
+ gpu_releaseTimeslice();
+ }*/
+ return;
+ }
+ if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
+ {
+ uint32 reg = offset & 0x1C;
+ int bytenum = offset & 0x03;
+
+ if ((reg >= 0x1C) && (reg <= 0x1F))
+ dsp_div_control = (dsp_div_control & (~(0xFF << (bytenum << 3)))) | (data << (bytenum << 3));
+ else
+ {
+//This looks funky. !!! FIX !!!
+ uint32 old_data = DSPReadLong(offset&0xFFFFFFC, who);
+ bytenum = 3 - bytenum; // convention motorola !!!
+ old_data = (old_data & (~(0xFF << (bytenum << 3)))) | (data << (bytenum << 3));
+ DSPWriteLong(offset & 0xFFFFFFC, old_data, who);
+ }
+ return;
+ }
+// WriteLog("dsp: writing %.2x at 0x%.8x\n",data,offset);
+//Should this *ever* happen??? Shouldn't we be saying "unknown" here???
+ JaguarWriteByte(offset, data, who);
+}
+
+void DSPWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
+{
+ if (offset >= 0xF1A000 && offset <= 0xF1A0FF)
+ WriteLog("DSP: WriteWord--Attempt to write to DSP register file by %s!\n", whoName[who]);
+ offset &= 0xFFFFFFFE;
+/*if (offset == 0xF1BCF4)
+{
+ WriteLog("DSPWriteWord: Writing to 0xF1BCF4... %04X -> %04X\n", GET16(dsp_ram_8, 0x0CF4), data);
+}*/
+// WriteLog("dsp: writing %.4x at 0x%.8x\n",data,offset);
+ if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
+ {
+/*if (offset == 0xF1B2F4)
+{
+ WriteLog("DSP: %s is writing %04X at location 0xF1B2F4 (DSP_PC: %08X)...\n", whoName[who], data, dsp_pc);
+}//*/
+ offset -= DSP_WORK_RAM_BASE;
+ dsp_ram_8[offset] = data >> 8;
+ dsp_ram_8[offset+1] = data & 0xFF;
+//This is rather stupid! !!! FIX !!!
+/* if (dsp_in_exec == 0)
+ {
+// WriteLog("dsp: writing %.4x at 0x%.8x\n",data,offset+DSP_WORK_RAM_BASE);
+ m68k_end_timeslice();
+ gpu_releaseTimeslice();
+ }*/
+//CC only!
+#ifdef DSP_DEBUG_CC
+SET16(ram1, offset, data),
+SET16(ram2, offset, data);
+#endif
+//!!!!!!!!
+ return;
+ }
+ else if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
+ {
+ if ((offset & 0x1C) == 0x1C)
+ {
+ if (offset & 0x03)
+ dsp_div_control = (dsp_div_control&0xffff0000)|(data&0xffff);
+ else
+ dsp_div_control = (dsp_div_control&0xffff)|((data&0xffff)<<16);
+ }
+ else
+ {
+ uint32 old_data = DSPReadLong(offset & 0xffffffc, who);
+ if (offset & 0x03)
+ old_data = (old_data&0xffff0000)|(data&0xffff);
+ else
+ old_data = (old_data&0xffff)|((data&0xffff)<<16);
+ DSPWriteLong(offset & 0xffffffc, old_data, who);
+ }
+ return;
+ }
+
+ JaguarWriteWord(offset, data, who);
+}
+
+//bool badWrite = false;
+void DSPWriteLong(uint32 offset, uint32 data, uint32 who/*=UNKNOWN*/)
+{
+ if (offset >= 0xF1A000 && offset <= 0xF1A0FF)
+ WriteLog("DSP: WriteLong--Attempt to write to DSP register file by %s!\n", whoName[who]);
+ // ??? WHY ???
+ offset &= 0xFFFFFFFC;
+/*if (offset == 0xF1BCF4)
+{
+ WriteLog("DSPWriteLong: Writing to 0xF1BCF4... %08X -> %08X\n", GET32(dsp_ram_8, 0x0CF4), data);
+}*/
+// WriteLog("dsp: writing %.8x at 0x%.8x\n",data,offset);
+ if (offset >= DSP_WORK_RAM_BASE && offset <= DSP_WORK_RAM_BASE + 0x1FFF)
+ {
+/*if (offset == 0xF1BE2C)
+{
+ WriteLog("DSP: %s is writing %08X at location 0xF1BE2C (DSP_PC: %08X)...\n", whoName[who], data, dsp_pc - 2);
+}//*/
+ offset -= DSP_WORK_RAM_BASE;
+ SET32(dsp_ram_8, offset, data);
+//CC only!
+#ifdef DSP_DEBUG_CC
+SET32(ram1, offset, data),
+SET32(ram2, offset, data);
+#endif
+//!!!!!!!!
+ return;
+ }
+ else if (offset >= DSP_CONTROL_RAM_BASE && offset <= (DSP_CONTROL_RAM_BASE + 0x1F))
+ {
+ offset &= 0x1F;
+ switch (offset)
+ {
+ case 0x00:
+ {
+#ifdef DSP_DEBUG
+ WriteLog("DSP: Writing %08X to DSP_FLAGS by %s (REGPAGE is %s)...\n", data, whoName[who], (dsp_flags & REGPAGE ? "set" : "not set"));
+#endif
+// bool IMASKCleared = (dsp_flags & IMASK) && !(data & IMASK);
+ IMASKCleared = (dsp_flags & IMASK) && !(data & IMASK);
+ dsp_flags = data & ~IMASK;
+ dsp_flag_z = dsp_flags & 0x01;
+ dsp_flag_c = (dsp_flags >> 1) & 0x01;
+ dsp_flag_n = (dsp_flags >> 2) & 0x01;
+ DSPUpdateRegisterBanks();
+ dsp_control &= ~((dsp_flags & CINT04FLAGS) >> 3);
+ dsp_control &= ~((dsp_flags & CINT5FLAG) >> 1);
+/* if (IMASKCleared) // If IMASK was cleared,
+#ifdef DSP_DEBUG_IRQ
+ {
+ WriteLog("DSP: Finished interrupt.\n");
+#endif
+ DSPHandleIRQs(); // see if any other interrupts need servicing!
+#ifdef DSP_DEBUG_IRQ
+ }
+#endif//*/
+#if 0
+ if (/*4-8, 16*/data & 0x101F0)
+ WriteLog("DSP: %s is enabling interrupts %s%s%s%s%s%s\n", whoName[who],
+ (data & 0x010 ? "CPU " : ""), (data & 0x020 ? "I2S " : ""),
+ (data & 0x040 ? "TIMER0 " : ""), (data & 0x080 ? "TIMER1 " : ""),
+ (data & 0x100 ? "EXT0 " : ""), (data & 0x10000 ? "EXT1" : ""));
+/*if (data & 0x00020) // CD BIOS DSP code...
+{
+//001AC1BA: movea.l #$1AC200, A0
+//001AC1C0: move.l #$1AC68C, D0
+ char buffer[512];
+
+ WriteLog("\n---[DSP code at 00F1B97C]---------------------------\n");
+ uint32 j = 0xF1B97C;//0x1AC200;
+ while (j <= 0xF1BE08)//0x1AC68C)
+ {
+ uint32 oldj = j;
+ j += dasmjag(JAGUAR_DSP, buffer, j);
+// WriteLog("\t%08X: %s\n", oldj+0xD6F77C, buffer);
+ WriteLog("\t%08X: %s\n", oldj, buffer);
+ }
+}//*/
+#endif
+ break;
+ }
+ case 0x04:
+ dsp_matrix_control = data;
+ break;
+ case 0x08:
+ // According to JTRM, only lines 2-11 are addressable, the rest being
+ // hardwired to $F1Bxxx.
+ dsp_pointer_to_matrix = 0xF1B000 | (data & 0x000FFC);
+ break;
+ case 0x0C:
+ dsp_data_organization = data;
+ break;
+ case 0x10:
+ dsp_pc = data;
+#ifdef DSP_DEBUG
+ WriteLog("DSP: Setting DSP PC to %08X by %s%s\n", dsp_pc, whoName[who], (DSP_RUNNING ? " (DSP is RUNNING!)" : ""));//*/
+#endif
+//CC only!
+#ifdef DSP_DEBUG_CC
+if (who != DSP)
+ ctrl1[0] = ctrl2[0] = data;
+#endif
+//!!!!!!!!
+ break;
+ case 0x14:
+ {
+//#ifdef DSP_DEBUG
+WriteLog("Write to DSP CTRL by %s: %08X\n", whoName[who], data);
+//#endif
+ bool wasRunning = DSP_RUNNING;
+// uint32 dsp_was_running = DSP_RUNNING;
+ // Check for DSP -> CPU interrupt
+ if (data & CPUINT)
+ {
+#ifdef DSP_DEBUG
+ WriteLog("DSP: DSP -> CPU interrupt\n");
+#endif
+// This was WRONG
+// Why do we check for a valid handler at 64? Isn't that the Jag programmer's responsibility?
+ if (JERRYIRQEnabled(IRQ2_DSP))// && jaguar_interrupt_handler_is_valid(64))
+ {
+ JERRYSetPendingIRQ(IRQ2_DSP);
+ DSPReleaseTimeslice();
+ m68k_set_irq(7); // Set 68000 NMI...
+ }
+ data &= ~CPUINT;
+ }
+ // Check for CPU -> DSP interrupt
+ if (data & DSPINT0)
+ {
+#ifdef DSP_DEBUG
+ WriteLog("DSP: CPU -> DSP interrupt\n");
+#endif
+ m68k_end_timeslice();
+ GPUReleaseTimeslice();
+ DSPSetIRQLine(DSPIRQ_CPU, ASSERT_LINE);
+ data &= ~DSPINT0;
+ }
+ // single stepping
+ if (data & SINGLE_STEP)
+ {
+// WriteLog("DSP: Asked to perform a single step (single step is %senabled)\n", (data & 0x8 ? "" : "not "));
+ }
+
+ // Protect writes to VERSION and the interrupt latches...
+ uint32 mask = VERSION | INT_LAT0 | INT_LAT1 | INT_LAT2 | INT_LAT3 | INT_LAT4 | INT_LAT5;
+ dsp_control = (dsp_control & mask) | (data & ~mask);
+//CC only!
+#ifdef DSP_DEBUG_CC
+if (who != DSP)
+ ctrl1[8] = ctrl2[8] = dsp_control;
+#endif
+//!!!!!!!!
+
+ // if dsp wasn't running but is now running
+ // execute a few cycles
+//This is just plain wrong, wrong, WRONG!
+#ifndef DSP_SINGLE_STEPPING
+/* if (!dsp_was_running && DSP_RUNNING)
+ {
+ DSPExec(200);
+ }*/
+#else
+//This is WRONG! !!! FIX !!!
+ if (dsp_control & 0x18)
+ DSPExec(1);
+#endif
+#ifdef DSP_DEBUG
+if (DSP_RUNNING)
+ WriteLog(" --> Starting to run at %08X by %s...", dsp_pc, whoName[who]);
+else
+ WriteLog(" --> Stopped by %s! (DSP PC: %08X)", whoName[who], dsp_pc);
+WriteLog("\n");
+#endif // DSP_DEBUG
+//This isn't exactly right either--we don't know if it was the M68K or the GPU writing here...
+// !!! FIX !!! [DONE]
+ if (DSP_RUNNING)
+ {
+ if (who == M68K)
+ m68k_end_timeslice();
+ else if (who == GPU)
+ GPUReleaseTimeslice();
+
+ if (!wasRunning)
+ FlushDSPPipeline();
+//DSPDumpDisassembly();
+ }
+ break;
+ }
+ case 0x18:
+ dsp_modulo = data;
+ break;
+ case 0x1C:
+ dsp_div_control = data;
+ break;
+// default: // unaligned long read
+ //__asm int 3
+ }
+ return;
+ }
+
+//We don't have to break this up like this! We CAN do 32 bit writes!
+// JaguarWriteWord(offset, (data>>16) & 0xFFFF, DSP);
+// JaguarWriteWord(offset+2, data & 0xFFFF, DSP);
+//if (offset > 0xF1FFFF)
+// badWrite = true;
+ JaguarWriteLong(offset, data, who);
+}
+
+//
+// Update the DSP register file pointers depending on REGPAGE bit
+//
+void DSPUpdateRegisterBanks(void)
+{
+ int bank = (dsp_flags & REGPAGE);
+
+ if (dsp_flags & IMASK)
+ bank = 0; // IMASK forces main bank to be bank 0
+
+ if (bank)
+ dsp_reg = dsp_reg_bank_1, dsp_alternate_reg = dsp_reg_bank_0;
+ else
+ dsp_reg = dsp_reg_bank_0, dsp_alternate_reg = dsp_reg_bank_1;
+}
+
+//
+// Check for and handle any asserted DSP IRQs
+//
+void DSPHandleIRQs(void)
+{
+ if (dsp_flags & IMASK) // Bail if we're already inside an interrupt
+ return;
+
+ // Get the active interrupt bits (latches) & interrupt mask (enables)
+ uint32 bits = ((dsp_control >> 10) & 0x20) | ((dsp_control >> 6) & 0x1F),
+ mask = ((dsp_flags >> 11) & 0x20) | ((dsp_flags >> 4) & 0x1F);
+
+// WriteLog("dsp: bits=%.2x mask=%.2x\n",bits,mask);
+ bits &= mask;
+
+ if (!bits) // Bail if nothing is enabled
+ return;
+
+ int which = 0; // Determine which interrupt
+ if (bits & 0x01)
+ which = 0;
+ if (bits & 0x02)
+ which = 1;
+ if (bits & 0x04)
+ which = 2;
+ if (bits & 0x08)
+ which = 3;
+ if (bits & 0x10)
+ which = 4;
+ if (bits & 0x20)
+ which = 5;
+
+#ifdef DSP_DEBUG_IRQ
+ WriteLog("DSP: Generating interrupt #%i...", which);
+#endif
+//temp... !!!!!
+//if (which == 0) doDSPDis = true;
+
+ // NOTE: Since the actual Jaguar hardware injects the code sequence below
+ // directly into the pipeline, it has the side effect of ensuring that the
+ // instruction interrupted also gets to do its writeback. We simulate that
+ // behavior here.
+/* if (pipeline[plPtrWrite].opcode != PIPELINE_STALL)
+ {
+ if (pipeline[plPtrWrite].writebackRegister != 0xFF)
+ dsp_reg[pipeline[plPtrWrite].writebackRegister] = pipeline[plPtrWrite].result;
+
+ if (affectsScoreboard[pipeline[plPtrWrite].opcode])
+ scoreboard[pipeline[plPtrWrite].operand2] = false;
+ }//*/
+//This should be execute (or should it?--not sure now!)
+//Actually, the way this is called now, this should be correct (i.e., the plPtrs advance,
+//and what just executed is now in the Write position...). So why didn't it do the
+//writeback into register 0?
+#ifdef DSP_DEBUG_IRQ
+WriteLog("--> Pipeline dump [DSP_PC=%08X]...\n", dsp_pc);
+WriteLog("\tR -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrRead].opcode, pipeline[plPtrRead].operand1, pipeline[plPtrRead].operand2, pipeline[plPtrRead].reg1, pipeline[plPtrRead].reg2, pipeline[plPtrRead].result, pipeline[plPtrRead].writebackRegister, dsp_opcode_str[pipeline[plPtrRead].opcode]);
+WriteLog("\tE -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrExec].opcode, pipeline[plPtrExec].operand1, pipeline[plPtrExec].operand2, pipeline[plPtrExec].reg1, pipeline[plPtrExec].reg2, pipeline[plPtrExec].result, pipeline[plPtrExec].writebackRegister, dsp_opcode_str[pipeline[plPtrExec].opcode]);
+WriteLog("\tW -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrWrite].opcode, pipeline[plPtrWrite].operand1, pipeline[plPtrWrite].operand2, pipeline[plPtrWrite].reg1, pipeline[plPtrWrite].reg2, pipeline[plPtrWrite].result, pipeline[plPtrWrite].writebackRegister, dsp_opcode_str[pipeline[plPtrWrite].opcode]);
+#endif
+ if (pipeline[plPtrWrite].opcode != PIPELINE_STALL)
+ {
+ if (pipeline[plPtrWrite].writebackRegister != 0xFF)
+ {
+ if (pipeline[plPtrWrite].writebackRegister != 0xFE)
+ dsp_reg[pipeline[plPtrWrite].writebackRegister] = pipeline[plPtrWrite].result;
+ else
+ {
+ if (pipeline[plPtrWrite].type == TYPE_BYTE)
+ JaguarWriteByte(pipeline[plPtrWrite].address, pipeline[plPtrWrite].value);
+ else if (pipeline[plPtrWrite].type == TYPE_WORD)
+ JaguarWriteWord(pipeline[plPtrWrite].address, pipeline[plPtrWrite].value);
+ else
+ JaguarWriteLong(pipeline[plPtrWrite].address, pipeline[plPtrWrite].value);
+ }
+ }
+
+#ifndef NEW_SCOREBOARD
+ if (affectsScoreboard[pipeline[plPtrWrite].opcode])
+ scoreboard[pipeline[plPtrWrite].operand2] = false;
+#else
+//Yup, sequential MOVEQ # problem fixing (I hope!)...
+ if (affectsScoreboard[pipeline[plPtrWrite].opcode])
+ if (scoreboard[pipeline[plPtrWrite].operand2])
+ scoreboard[pipeline[plPtrWrite].operand2]--;
+#endif
+ }
+
+ dsp_flags |= IMASK;
+//CC only!
+#ifdef DSP_DEBUG_CC
+ctrl2[4] = dsp_flags;
+#endif
+//!!!!!!!!
+ DSPUpdateRegisterBanks();
+#ifdef DSP_DEBUG_IRQ
+// WriteLog(" [PC will return to %08X, R31 = %08X]\n", dsp_pc, dsp_reg[31]);
+ WriteLog(" [PC will return to %08X, R31 = %08X]\n", dsp_pc - (pipeline[plPtrExec].opcode == 38 ? 6 : (pipeline[plPtrExec].opcode == PIPELINE_STALL ? 0 : 2)), dsp_reg[31]);
+#endif
+
+ // subqt #4,r31 ; pre-decrement stack pointer
+ // move pc,r30 ; address of interrupted code
+ // store r30,(r31) ; store return address
+ dsp_reg[31] -= 4;
+//CC only!
+#ifdef DSP_DEBUG_CC
+regs2[31] -= 4;
+#endif
+//!!!!!!!!
+//This might not come back to the right place if the instruction was MOVEI #. !!! FIX !!!
+//But, then again, JTRM says that it adds two regardless of what the instruction was...
+//It missed the place that it was supposed to come back to, so this is WRONG!
+//
+// Look at the pipeline when an interrupt occurs (instructions of foo, bar, baz):
+//
+// R -> baz (<- PC points here)
+// E -> bar (when it should point here!)
+// W -> foo
+//
+// 'Foo' just completed executing as per above. PC is pointing to the instruction 'baz'
+// which means (assuming they're all 2 bytes long) that the code below will come back on
+// instruction 'baz' instead of 'bar' which is the next instruction to execute in the
+// instruction stream...
+
+// DSPWriteLong(dsp_reg[31], dsp_pc - 2, DSP);
+ DSPWriteLong(dsp_reg[31], dsp_pc - 2 - (pipeline[plPtrExec].opcode == 38 ? 6 : (pipeline[plPtrExec].opcode == PIPELINE_STALL ? 0 : 2)), DSP);
+//CC only!
+#ifdef DSP_DEBUG_CC
+SET32(ram2, regs2[31] - 0xF1B000, dsp_pc - 2 - (pipeline[plPtrExec].opcode == 38 ? 6 : (pipeline[plPtrExec].opcode == PIPELINE_STALL ? 0 : 2)));
+#endif
+//!!!!!!!!
+
+ // movei #service_address,r30 ; pointer to ISR entry
+ // jump (r30) ; jump to ISR
+ // nop
+ dsp_pc = dsp_reg[30] = DSP_WORK_RAM_BASE + (which * 0x10);
+//CC only!
+#ifdef DSP_DEBUG_CC
+ctrl2[0] = regs2[30] = dsp_pc;
+#endif
+//!!!!!!!!
+ FlushDSPPipeline();
+}
+
+//
+// Non-pipelined version...
+//
+void DSPHandleIRQsNP(void)
+{
+//CC only!
+#ifdef DSP_DEBUG_CC
+ memcpy(dsp_ram_8, ram1, 0x2000);
+ memcpy(dsp_reg_bank_0, regs1, 32 * 4);
+ memcpy(dsp_reg_bank_1, ®s1[32], 32 * 4);
+ dsp_pc = ctrl1[0];
+ dsp_acc = ctrl1[1];
+ dsp_remain = ctrl1[2];
+ dsp_modulo = ctrl1[3];
+ dsp_flags = ctrl1[4];
+ dsp_matrix_control = ctrl1[5];
+ dsp_pointer_to_matrix = ctrl1[6];
+ dsp_data_organization = ctrl1[7];
+ dsp_control = ctrl1[8];
+ dsp_div_control = ctrl1[9];
+ IMASKCleared = ctrl1[10];
+ dsp_flag_z = ctrl1[11];
+ dsp_flag_n = ctrl1[12];
+ dsp_flag_c = ctrl1[13];
+DSPUpdateRegisterBanks();
+#endif
+//!!!!!!!!
+ if (dsp_flags & IMASK) // Bail if we're already inside an interrupt
+ return;
+
+ // Get the active interrupt bits (latches) & interrupt mask (enables)
+ uint32 bits = ((dsp_control >> 10) & 0x20) | ((dsp_control >> 6) & 0x1F),
+ mask = ((dsp_flags >> 11) & 0x20) | ((dsp_flags >> 4) & 0x1F);
+
+// WriteLog("dsp: bits=%.2x mask=%.2x\n",bits,mask);
+ bits &= mask;
+
+ if (!bits) // Bail if nothing is enabled
+ return;
+
+ int which = 0; // Determine which interrupt
+ if (bits & 0x01)
+ which = 0;
+ if (bits & 0x02)
+ which = 1;
+ if (bits & 0x04)
+ which = 2;
+ if (bits & 0x08)
+ which = 3;
+ if (bits & 0x10)
+ which = 4;
+ if (bits & 0x20)
+ which = 5;
+
+#ifdef DSP_DEBUG_IRQ
+ WriteLog("DSP: Generating interrupt #%i...", which);
+#endif
+
+ dsp_flags |= IMASK;
+//CC only!
+#ifdef DSP_DEBUG_CC
+ctrl1[4] = dsp_flags;
+#endif
+//!!!!!!!!
+ DSPUpdateRegisterBanks();
+#ifdef DSP_DEBUG_IRQ
+ WriteLog(" [PC will return to %08X, R31 = %08X]\n", dsp_pc, dsp_reg[31]);
+#endif
+
+ // subqt #4,r31 ; pre-decrement stack pointer
+ // move pc,r30 ; address of interrupted code
+ // store r30,(r31) ; store return address
+ dsp_reg[31] -= 4;
+//CC only!
+#ifdef DSP_DEBUG_CC
+regs1[31] -= 4;
+#endif
+//!!!!!!!!
+ DSPWriteLong(dsp_reg[31], dsp_pc - 2, DSP);
+//CC only!
+#ifdef DSP_DEBUG_CC
+SET32(ram1, regs1[31] - 0xF1B000, dsp_pc - 2);
+#endif
+//!!!!!!!!
+
+ // movei #service_address,r30 ; pointer to ISR entry
+ // jump (r30) ; jump to ISR
+ // nop
+ dsp_pc = dsp_reg[30] = DSP_WORK_RAM_BASE + (which * 0x10);
+//CC only!
+#ifdef DSP_DEBUG_CC
+ctrl1[0] = regs1[30] = dsp_pc;
+#endif
+//!!!!!!!!
+}
+
+//
+// Set the specified DSP IRQ line to a given state
+//
+void DSPSetIRQLine(int irqline, int state)
+{
+//NOTE: This doesn't take INT_LAT5 into account. !!! FIX !!!
+ uint32 mask = INT_LAT0 << irqline;
+ dsp_control &= ~mask; // Clear the latch bit
+//CC only!
+#ifdef DSP_DEBUG_CC
+ctrl1[8] = ctrl2[8] = dsp_control;
+#endif
+//!!!!!!!!
+
+ if (state)
+ {
+ dsp_control |= mask; // Set the latch bit
+ DSPHandleIRQs();
+//CC only!
+#ifdef DSP_DEBUG_CC
+ctrl1[8] = ctrl2[8] = dsp_control;
+DSPHandleIRQsNP();
+#endif
+//!!!!!!!!
+ }
+
+ // Not sure if this is correct behavior, but according to JTRM,
+ // the IRQ output of JERRY is fed to this IRQ in the GPU...
+// Not sure this is right--DSP interrupts seem to be different from the JERRY interrupts!
+// GPUSetIRQLine(GPUIRQ_DSP, ASSERT_LINE);
+}
+
+void DSPInit(void)
+{
+// memory_malloc_secure((void **)&dsp_ram_8, 0x2000, "DSP work RAM");
+// memory_malloc_secure((void **)&dsp_reg_bank_0, 32 * sizeof(int32), "DSP bank 0 regs");
+// memory_malloc_secure((void **)&dsp_reg_bank_1, 32 * sizeof(int32), "DSP bank 1 regs");
+
+ dsp_build_branch_condition_table();
+ DSPReset();
+}
+
+void DSPReset(void)
+{
+ dsp_pc = 0x00F1B000;
+ dsp_acc = 0x00000000;
+ dsp_remain = 0x00000000;
+ dsp_modulo = 0xFFFFFFFF;
+ dsp_flags = 0x00040000;
+ dsp_matrix_control = 0x00000000;
+ dsp_pointer_to_matrix = 0x00000000;
+ dsp_data_organization = 0xFFFFFFFF;
+ dsp_control = 0x00002000; // Report DSP version 2
+ dsp_div_control = 0x00000000;
+ dsp_in_exec = 0;
+
+ dsp_reg = dsp_reg_bank_0;
+ dsp_alternate_reg = dsp_reg_bank_1;
+
+ for(int i=0; i<32; i++)
+ dsp_reg[i] = dsp_alternate_reg[i] = 0x00000000;
+
+ CLR_ZNC;
+ IMASKCleared = false;
+ FlushDSPPipeline();
+ dsp_reset_stats();
+ memset(dsp_ram_8, 0xFF, 0x2000);
+}
+
+void DSPDumpDisassembly(void)
+{
+ char buffer[512];
+
+ WriteLog("\n---[DSP code at 00F1B000]---------------------------\n");
+ uint32 j = 0xF1B000;
+ while (j <= 0xF1CFFF)
+ {
+ uint32 oldj = j;
+ j += dasmjag(JAGUAR_DSP, buffer, j);
+ WriteLog("\t%08X: %s\n", oldj, buffer);
+ }
+}
+
+void DSPDumpRegisters(void)
+{
+//Shoud add modulus, etc to dump here...
+ WriteLog("\n---[DSP flags: NCZ %d%d%d, DSP PC: %08X]------------\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, dsp_pc);
+ WriteLog("\nRegisters bank 0\n");
+ for(int j=0; j<8; j++)
+ {
+ WriteLog("\tR%02i = %08X R%02i = %08X R%02i = %08X R%02i = %08X\n",
+ (j << 2) + 0, dsp_reg_bank_0[(j << 2) + 0],
+ (j << 2) + 1, dsp_reg_bank_0[(j << 2) + 1],
+ (j << 2) + 2, dsp_reg_bank_0[(j << 2) + 2],
+ (j << 2) + 3, dsp_reg_bank_0[(j << 2) + 3]);
+ }
+ WriteLog("Registers bank 1\n");
+ for(int j=0; j<8; j++)
+ {
+ WriteLog("\tR%02i = %08X R%02i = %08X R%02i = %08X R%02i = %08X\n",
+ (j << 2) + 0, dsp_reg_bank_1[(j << 2) + 0],
+ (j << 2) + 1, dsp_reg_bank_1[(j << 2) + 1],
+ (j << 2) + 2, dsp_reg_bank_1[(j << 2) + 2],
+ (j << 2) + 3, dsp_reg_bank_1[(j << 2) + 3]);
+ }
+}
+
+void DSPDone(void)
+{
+ int i, j;
+ WriteLog("DSP: Stopped at PC=%08X dsp_modulo=%08X (dsp %s running)\n", dsp_pc, dsp_modulo, (DSP_RUNNING ? "was" : "wasn't"));
+ WriteLog("DSP: %sin interrupt handler\n", (dsp_flags & IMASK ? "" : "not "));
+
+ // get the active interrupt bits
+ int bits = ((dsp_control >> 10) & 0x20) | ((dsp_control >> 6) & 0x1F);
+ // get the interrupt mask
+ int mask = ((dsp_flags >> 11) & 0x20) | ((dsp_flags >> 4) & 0x1F);
+
+ WriteLog("DSP: pending=%08X enabled=%08X\n", bits, mask);
+ WriteLog("\nRegisters bank 0\n");
+ for(int j=0; j<8; j++)
+ {
+ WriteLog("\tR%02i=%08X R%02i=%08X R%02i=%08X R%02i=%08X\n",
+ (j << 2) + 0, dsp_reg_bank_0[(j << 2) + 0],
+ (j << 2) + 1, dsp_reg_bank_0[(j << 2) + 1],
+ (j << 2) + 2, dsp_reg_bank_0[(j << 2) + 2],
+ (j << 2) + 3, dsp_reg_bank_0[(j << 2) + 3]);
+ }
+ WriteLog("\nRegisters bank 1\n");
+ for (j=0; j<8; j++)
+ {
+ WriteLog("\tR%02i=%08X R%02i=%08X R%02i=%08X R%02i=%08X\n",
+ (j << 2) + 0, dsp_reg_bank_1[(j << 2) + 0],
+ (j << 2) + 1, dsp_reg_bank_1[(j << 2) + 1],
+ (j << 2) + 2, dsp_reg_bank_1[(j << 2) + 2],
+ (j << 2) + 3, dsp_reg_bank_1[(j << 2) + 3]);
+
+ }
+
+ static char buffer[512];
+ j = DSP_WORK_RAM_BASE;
+ while (j <= 0xF1BFFF)
+ {
+ uint32 oldj = j;
+ j += dasmjag(JAGUAR_DSP, buffer, j);
+ WriteLog("\t%08X: %s\n", oldj, buffer);
+ }//*/
+
+ WriteLog("DSP opcodes use:\n");
+ for (i=0;i<64;i++)
+ {
+ if (dsp_opcode_use[i])
+ WriteLog("\t%s %i\n", dsp_opcode_str[i], dsp_opcode_use[i]);
+ }//*/
+
+// memory_free(dsp_ram_8);
+// memory_free(dsp_reg_bank_0);
+// memory_free(dsp_reg_bank_1);
+ if (dsp_branch_condition_table)
+ free(dsp_branch_condition_table);
+
+ if (mirror_table)
+ free(mirror_table);
+}
+
+
+
+//
+// DSP comparison core...
+//
+#ifdef DSP_DEBUG_CC
+static uint16 lastExec;
+void DSPExecComp(int32 cycles)
+{
+ while (cycles > 0 && DSP_RUNNING)
+ {
+ // Load up vars for non-pipelined core
+ memcpy(dsp_ram_8, ram1, 0x2000);
+ memcpy(dsp_reg_bank_0, regs1, 32 * 4);
+ memcpy(dsp_reg_bank_1, ®s1[32], 32 * 4);
+ dsp_pc = ctrl1[0];
+ dsp_acc = ctrl1[1];
+ dsp_remain = ctrl1[2];
+ dsp_modulo = ctrl1[3];
+ dsp_flags = ctrl1[4];
+ dsp_matrix_control = ctrl1[5];
+ dsp_pointer_to_matrix = ctrl1[6];
+ dsp_data_organization = ctrl1[7];
+ dsp_control = ctrl1[8];
+ dsp_div_control = ctrl1[9];
+ IMASKCleared = ctrl1[10];
+ dsp_flag_z = ctrl1[11];
+ dsp_flag_n = ctrl1[12];
+ dsp_flag_c = ctrl1[13];
+DSPUpdateRegisterBanks();
+
+ // Decrement cycles based on non-pipelined core...
+ uint16 instr1 = DSPReadWord(dsp_pc, DSP);
+ cycles -= dsp_opcode_cycles[instr1 >> 10];
+
+//WriteLog("\tAbout to execute non-pipelined core on tick #%u (DSP_PC=%08X)...\n", (uint32)count, dsp_pc);
+ DSPExec(1); // Do *one* instruction
+
+ // Save vars
+ memcpy(ram1, dsp_ram_8, 0x2000);
+ memcpy(regs1, dsp_reg_bank_0, 32 * 4);
+ memcpy(®s1[32], dsp_reg_bank_1, 32 * 4);
+ ctrl1[0] = dsp_pc;
+ ctrl1[1] = dsp_acc;
+ ctrl1[2] = dsp_remain;
+ ctrl1[3] = dsp_modulo;
+ ctrl1[4] = dsp_flags;
+ ctrl1[5] = dsp_matrix_control;
+ ctrl1[6] = dsp_pointer_to_matrix;
+ ctrl1[7] = dsp_data_organization;
+ ctrl1[8] = dsp_control;
+ ctrl1[9] = dsp_div_control;
+ ctrl1[10] = IMASKCleared;
+ ctrl1[11] = dsp_flag_z;
+ ctrl1[12] = dsp_flag_n;
+ ctrl1[13] = dsp_flag_c;
+
+ // Load up vars for pipelined core
+ memcpy(dsp_ram_8, ram2, 0x2000);
+ memcpy(dsp_reg_bank_0, regs2, 32 * 4);
+ memcpy(dsp_reg_bank_1, ®s2[32], 32 * 4);
+ dsp_pc = ctrl2[0];
+ dsp_acc = ctrl2[1];
+ dsp_remain = ctrl2[2];
+ dsp_modulo = ctrl2[3];
+ dsp_flags = ctrl2[4];
+ dsp_matrix_control = ctrl2[5];
+ dsp_pointer_to_matrix = ctrl2[6];
+ dsp_data_organization = ctrl2[7];
+ dsp_control = ctrl2[8];
+ dsp_div_control = ctrl2[9];
+ IMASKCleared = ctrl2[10];
+ dsp_flag_z = ctrl2[11];
+ dsp_flag_n = ctrl2[12];
+ dsp_flag_c = ctrl2[13];
+DSPUpdateRegisterBanks();
+
+//WriteLog("\tAbout to execute pipelined core on tick #%u (DSP_PC=%08X)....\n", (uint32)count, dsp_pc);
+ DSPExecP2(1); // Do *one* instruction
+
+ // Save vars
+ memcpy(ram2, dsp_ram_8, 0x2000);
+ memcpy(regs2, dsp_reg_bank_0, 32 * 4);
+ memcpy(®s2[32], dsp_reg_bank_1, 32 * 4);
+ ctrl2[0] = dsp_pc;
+ ctrl2[1] = dsp_acc;
+ ctrl2[2] = dsp_remain;
+ ctrl2[3] = dsp_modulo;
+ ctrl2[4] = dsp_flags;
+ ctrl2[5] = dsp_matrix_control;
+ ctrl2[6] = dsp_pointer_to_matrix;
+ ctrl2[7] = dsp_data_organization;
+ ctrl2[8] = dsp_control;
+ ctrl2[9] = dsp_div_control;
+ ctrl2[10] = IMASKCleared;
+ ctrl2[11] = dsp_flag_z;
+ ctrl2[12] = dsp_flag_n;
+ ctrl2[13] = dsp_flag_c;
+
+ if (instr1 != lastExec)
+ {
+// WriteLog("\nCores diverged at instruction tick #%u!\nAttemping to synchronize...\n\n", count);
+
+// uint32 ppc = ctrl2[0] - (pipeline[plPtrExec].opcode == 38 ? 6 : (pipeline[plPtrExec].opcode == PIPELINE_STALL ? 0 : 2)) - (pipeline[plPtrWrite].opcode == 38 ? 6 : (pipeline[plPtrWrite].opcode == PIPELINE_STALL ? 0 : 2));
+//WriteLog("[DSP_PC1=%08X, DSP_PC2=%08X]\n", ctrl1[0], ppc);
+// if (ctrl1[0] < ppc) // P ran ahead of NP
+//How to test this crap???
+// if (1)
+ {
+ DSPExecP2(1); // Do one more instruction
+
+ // Save vars
+ memcpy(ram2, dsp_ram_8, 0x2000);
+ memcpy(regs2, dsp_reg_bank_0, 32 * 4);
+ memcpy(®s2[32], dsp_reg_bank_1, 32 * 4);
+ ctrl2[0] = dsp_pc;
+ ctrl2[1] = dsp_acc;
+ ctrl2[2] = dsp_remain;
+ ctrl2[3] = dsp_modulo;
+ ctrl2[4] = dsp_flags;
+ ctrl2[5] = dsp_matrix_control;
+ ctrl2[6] = dsp_pointer_to_matrix;
+ ctrl2[7] = dsp_data_organization;
+ ctrl2[8] = dsp_control;
+ ctrl2[9] = dsp_div_control;
+ ctrl2[10] = IMASKCleared;
+ ctrl2[11] = dsp_flag_z;
+ ctrl2[12] = dsp_flag_n;
+ ctrl2[13] = dsp_flag_c;
+ }
+// else // NP ran ahead of P
+ if (instr1 != lastExec) // Must be the other way...
+
+ {
+ // Load up vars for non-pipelined core
+ memcpy(dsp_ram_8, ram1, 0x2000);
+ memcpy(dsp_reg_bank_0, regs1, 32 * 4);
+ memcpy(dsp_reg_bank_1, ®s1[32], 32 * 4);
+ dsp_pc = ctrl1[0];
+ dsp_acc = ctrl1[1];
+ dsp_remain = ctrl1[2];
+ dsp_modulo = ctrl1[3];
+ dsp_flags = ctrl1[4];
+ dsp_matrix_control = ctrl1[5];
+ dsp_pointer_to_matrix = ctrl1[6];
+ dsp_data_organization = ctrl1[7];
+ dsp_control = ctrl1[8];
+ dsp_div_control = ctrl1[9];
+ IMASKCleared = ctrl1[10];
+ dsp_flag_z = ctrl1[11];
+ dsp_flag_n = ctrl1[12];
+ dsp_flag_c = ctrl1[13];
+DSPUpdateRegisterBanks();
+
+for(int k=0; k<2; k++)
+{
+ // Decrement cycles based on non-pipelined core...
+ instr1 = DSPReadWord(dsp_pc, DSP);
+ cycles -= dsp_opcode_cycles[instr1 >> 10];
+
+//WriteLog("\tAbout to execute non-pipelined core on tick #%u (DSP_PC=%08X)...\n", (uint32)count, dsp_pc);
+ DSPExec(1); // Do *one* instruction
+}
+
+ // Save vars
+ memcpy(ram1, dsp_ram_8, 0x2000);
+ memcpy(regs1, dsp_reg_bank_0, 32 * 4);
+ memcpy(®s1[32], dsp_reg_bank_1, 32 * 4);
+ ctrl1[0] = dsp_pc;
+ ctrl1[1] = dsp_acc;
+ ctrl1[2] = dsp_remain;
+ ctrl1[3] = dsp_modulo;
+ ctrl1[4] = dsp_flags;
+ ctrl1[5] = dsp_matrix_control;
+ ctrl1[6] = dsp_pointer_to_matrix;
+ ctrl1[7] = dsp_data_organization;
+ ctrl1[8] = dsp_control;
+ ctrl1[9] = dsp_div_control;
+ ctrl1[10] = IMASKCleared;
+ ctrl1[11] = dsp_flag_z;
+ ctrl1[12] = dsp_flag_n;
+ ctrl1[13] = dsp_flag_c;
+ }
+ }
+
+ if (instr1 != lastExec)
+ {
+ WriteLog("\nCores diverged at instruction tick #%u!\nStopped!\n\n", count);
+
+ WriteLog("Instruction for non-pipelined core: %04X\n", instr1);
+ WriteLog("Instruction for pipelined core: %04X\n", lastExec);
+
+ log_done();
+ exit(1);
+ }
+
+ count++;
+ }
+}
+#endif
+
+
+//
+// DSP execution core
+//
+//static bool R20Set = false, tripwire = false;
+//static uint32 pcQueue[32], ptrPCQ = 0;
+void DSPExec(int32 cycles)
+{
+/*HACKS!!! -> if (cycles != 1 && jaguar_mainRom_crc32 == 0xba74c3ed)
+ dsp_check_if_i2s_interrupt_needed();*/
+
+#ifdef DSP_SINGLE_STEPPING
+ if (dsp_control & 0x18)
+ {
+ cycles = 1;
+ dsp_control &= ~0x10;
+ }
+#endif
+//There is *no* good reason to do this here!
+// DSPHandleIRQs();
+ dsp_releaseTimeSlice_flag = 0;
+ dsp_in_exec++;
+
+ while (cycles > 0 && DSP_RUNNING)
+ {
+/*extern uint32 totalFrames;
+//F1B2F6: LOAD (R14+$04), R24 [NCZ:001, R14+$04=00F20018, R24=FFFFFFFF] -> Jaguar: Unknown word read at 00F20018 by DSP (M68K PC=00E32E)
+//-> 43 + 1 + 24 -> $2B + $01 + $18 -> 101011 00001 11000 -> 1010 1100 0011 1000 -> AC38
+//C470 -> 1100 0100 0111 0000 -> 110001 00011 10000 -> 49, 3, 16 -> STORE R16, (R14+$0C)
+//F1B140:
+if (totalFrames >= 377 && GET16(dsp_ram_8, 0x0002F6) == 0xAC38 && dsp_pc == 0xF1B140)
+{
+ doDSPDis = true;
+ WriteLog("Starting disassembly at frame #%u...\n", totalFrames);
+}
+if (dsp_pc == 0xF1B092)
+ doDSPDis = false;//*/
+/*if (dsp_pc == 0xF1B140)
+ doDSPDis = true;//*/
+
+ if (IMASKCleared) // If IMASK was cleared,
+ {
+#ifdef DSP_DEBUG_IRQ
+ WriteLog("DSP: Finished interrupt.\n");
+#endif
+ DSPHandleIRQsNP(); // See if any other interrupts are pending!
+ IMASKCleared = false;
+ }
+
+/*if (badWrite)
+{
+ WriteLog("\nDSP: Encountered bad write in Atari Synth module. PC=%08X, R15=%08X\n", dsp_pc, dsp_reg[15]);
+ for(int i=0; i<80; i+=4)
+ WriteLog(" %08X: %08X\n", dsp_reg[15]+i, JaguarReadLong(dsp_reg[15]+i));
+ WriteLog("\n");
+}//*/
+/*if (dsp_pc == 0xF1B55E)
+{
+ WriteLog("DSP: At $F1B55E--R15 = %08X at %u ms%s...\n", dsp_reg[15], SDL_GetTicks(), (dsp_flags & IMASK ? " (inside interrupt)" : ""));
+}//*/
+/*if (dsp_pc == 0xF1B7D2) // Start here???
+ doDSPDis = true;
+pcQueue[ptrPCQ++] = dsp_pc;
+ptrPCQ %= 32;*/
+ uint16 opcode = DSPReadWord(dsp_pc, DSP);
+ uint32 index = opcode >> 10;
+ dsp_opcode_first_parameter = (opcode >> 5) & 0x1F;
+ dsp_opcode_second_parameter = opcode & 0x1F;
+ dsp_pc += 2;
+ dsp_opcode[index]();
+ dsp_opcode_use[index]++;
+ cycles -= dsp_opcode_cycles[index];
+/*if (dsp_reg_bank_0[20] == 0xF1A100 & !R20Set)
+{
+ WriteLog("DSP: R20 set to $F1A100 at %u ms%s...\n", SDL_GetTicks(), (dsp_flags & IMASK ? " (inside interrupt)" : ""));
+ R20Set = true;
+}
+if (dsp_reg_bank_0[20] != 0xF1A100 && R20Set)
+{
+ WriteLog("DSP: R20 corrupted at %u ms from starting%s!\nAborting!\n", SDL_GetTicks(), (dsp_flags & IMASK ? " (inside interrupt)" : ""));
+ DSPDumpRegisters();
+ DSPDumpDisassembly();
+ exit(1);
+}
+if ((dsp_pc < 0xF1B000 || dsp_pc > 0xF1CFFE) && !tripwire)
+{
+ char buffer[512];
+ WriteLog("DSP: Jumping outside of DSP RAM at %u ms. Register dump:\n", SDL_GetTicks());
+ DSPDumpRegisters();
+ tripwire = true;
+ WriteLog("\nBacktrace:\n");
+ for(int i=0; i<32; i++)
+ {
+ dasmjag(JAGUAR_DSP, buffer, pcQueue[(ptrPCQ + i) % 32]);
+ WriteLog("\t%08X: %s\n", pcQueue[(ptrPCQ + i) % 32], buffer);
+ }
+ WriteLog("\n");
+}*/
+ }
+
+ dsp_in_exec--;
+}
+
+//
+// DSP opcode handlers
+//
+
+// There is a problem here with interrupt handlers the JUMP and JR instructions that
+// can cause trouble because an interrupt can occur *before* the instruction following the
+// jump can execute... !!! FIX !!!
+static void dsp_opcode_jump(void)
+{
+#ifdef DSP_DIS_JUMP
+const char * condition[32] =
+{ "T", "nz", "z", "???", "nc", "nc nz", "nc z", "???", "c", "c nz",
+ "c z", "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "nn", "nn nz", "nn z", "???", "n", "n nz", "n z", "???",
+ "???", "???", "???", "F" };
+ if (doDSPDis)
+ WriteLog("%06X: JUMP %s, (R%02u) [NCZ:%u%u%u, R%02u=%08X] ", dsp_pc-2, condition[IMM_2], IMM_1, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM);
+#endif
+ // normalize flags
+/* dsp_flag_c=dsp_flag_c?1:0;
+ dsp_flag_z=dsp_flag_z?1:0;
+ dsp_flag_n=dsp_flag_n?1:0;*/
+ // KLUDGE: Used by BRANCH_CONDITION
+ uint32 jaguar_flags = (dsp_flag_n << 2) | (dsp_flag_c << 1) | dsp_flag_z;
+
+ if (BRANCH_CONDITION(IMM_2))
+ {
+#ifdef DSP_DIS_JUMP
+ if (doDSPDis)
+ WriteLog("Branched!\n");
+#endif
+ uint32 delayed_pc = RM;
+ DSPExec(1);
+ dsp_pc = delayed_pc;
+ }
+#ifdef DSP_DIS_JUMP
+ else
+ if (doDSPDis)
+ WriteLog("Branch NOT taken.\n");
+#endif
+}
+
+static void dsp_opcode_jr(void)
+{
+#ifdef DSP_DIS_JR
+const char * condition[32] =
+{ "T", "nz", "z", "???", "nc", "nc nz", "nc z", "???", "c", "c nz",
+ "c z", "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "nn", "nn nz", "nn z", "???", "n", "n nz", "n z", "???",
+ "???", "???", "???", "F" };
+ if (doDSPDis)
+ WriteLog("%06X: JR %s, %06X [NCZ:%u%u%u] ", dsp_pc-2, condition[IMM_2], dsp_pc+((IMM_1 & 0x10 ? 0xFFFFFFF0 | IMM_1 : IMM_1) * 2), dsp_flag_n, dsp_flag_c, dsp_flag_z);
+#endif
+ // normalize flags
+/* dsp_flag_c=dsp_flag_c?1:0;
+ dsp_flag_z=dsp_flag_z?1:0;
+ dsp_flag_n=dsp_flag_n?1:0;*/
+ // KLUDGE: Used by BRANCH_CONDITION
+ uint32 jaguar_flags = (dsp_flag_n << 2) | (dsp_flag_c << 1) | dsp_flag_z;
+
+ if (BRANCH_CONDITION(IMM_2))
+ {
+#ifdef DSP_DIS_JR
+ if (doDSPDis)
+ WriteLog("Branched!\n");
+#endif
+ int32 offset = (IMM_1 & 0x10 ? 0xFFFFFFF0 | IMM_1 : IMM_1); // Sign extend IMM_1
+ int32 delayed_pc = dsp_pc + (offset * 2);
+ DSPExec(1);
+ dsp_pc = delayed_pc;
+ }
+#ifdef DSP_DIS_JR
+ else
+ if (doDSPDis)
+ WriteLog("Branch NOT taken.\n");
+#endif
+}
+
+static void dsp_opcode_add(void)
+{
+#ifdef DSP_DIS_ADD
+ if (doDSPDis)
+ WriteLog("%06X: ADD R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ uint32 res = RN + RM;
+ SET_ZNC_ADD(RN, RM, res);
+ RN = res;
+#ifdef DSP_DIS_ADD
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_addc(void)
+{
+#ifdef DSP_DIS_ADDC
+ if (doDSPDis)
+ WriteLog("%06X: ADDC R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ uint32 res = RN + RM + dsp_flag_c;
+ uint32 carry = dsp_flag_c;
+// SET_ZNC_ADD(RN, RM, res); //???BUG??? Yes!
+ SET_ZNC_ADD(RN + carry, RM, res);
+// SET_ZNC_ADD(RN, RM + carry, res);
+ RN = res;
+#ifdef DSP_DIS_ADDC
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_addq(void)
+{
+#ifdef DSP_DIS_ADDQ
+ if (doDSPDis)
+ WriteLog("%06X: ADDQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, dsp_convert_zero[IMM_1], IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ uint32 r1 = dsp_convert_zero[IMM_1];
+ uint32 res = RN + r1;
+ CLR_ZNC; SET_ZNC_ADD(RN, r1, res);
+ RN = res;
+#ifdef DSP_DIS_ADDQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_sub(void)
+{
+#ifdef DSP_DIS_SUB
+ if (doDSPDis)
+ WriteLog("%06X: SUB R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ uint32 res = RN - RM;
+ SET_ZNC_SUB(RN, RM, res);
+ RN = res;
+#ifdef DSP_DIS_SUB
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_subc(void)
+{
+#ifdef DSP_DIS_SUBC
+ if (doDSPDis)
+ WriteLog("%06X: SUBC R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ uint32 res = RN - RM - dsp_flag_c;
+ uint32 borrow = dsp_flag_c;
+ SET_ZNC_SUB(RN - borrow, RM, res);
+ RN = res;
+#ifdef DSP_DIS_SUBC
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_subq(void)
+{
+#ifdef DSP_DIS_SUBQ
+ if (doDSPDis)
+ WriteLog("%06X: SUBQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, dsp_convert_zero[IMM_1], IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ uint32 r1 = dsp_convert_zero[IMM_1];
+ uint32 res = RN - r1;
+ SET_ZNC_SUB(RN, r1, res);
+ RN = res;
+#ifdef DSP_DIS_SUBQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_cmp(void)
+{
+#ifdef DSP_DIS_CMP
+ if (doDSPDis)
+ WriteLog("%06X: CMP R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ uint32 res = RN - RM;
+ SET_ZNC_SUB(RN, RM, res);
+#ifdef DSP_DIS_CMP
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z);
+#endif
+}
+
+static void dsp_opcode_cmpq(void)
+{
+ static int32 sqtable[32] =
+ { 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1 };
+#ifdef DSP_DIS_CMPQ
+ if (doDSPDis)
+ WriteLog("%06X: CMPQ #%d, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, sqtable[IMM_1], IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ uint32 r1 = sqtable[IMM_1 & 0x1F]; // I like this better -> (INT8)(jaguar.op >> 2) >> 3;
+ uint32 res = RN - r1;
+ SET_ZNC_SUB(RN, r1, res);
+#ifdef DSP_DIS_CMPQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z);
+#endif
+}
+
+static void dsp_opcode_and(void)
+{
+#ifdef DSP_DIS_AND
+ if (doDSPDis)
+ WriteLog("%06X: AND R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = RN & RM;
+ SET_ZN(RN);
+#ifdef DSP_DIS_AND
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_or(void)
+{
+#ifdef DSP_DIS_OR
+ if (doDSPDis)
+ WriteLog("%06X: OR R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = RN | RM;
+ SET_ZN(RN);
+#ifdef DSP_DIS_OR
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_xor(void)
+{
+#ifdef DSP_DIS_XOR
+ if (doDSPDis)
+ WriteLog("%06X: XOR R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = RN ^ RM;
+ SET_ZN(RN);
+#ifdef DSP_DIS_XOR
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_not(void)
+{
+#ifdef DSP_DIS_NOT
+ if (doDSPDis)
+ WriteLog("%06X: NOT R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ RN = ~RN;
+ SET_ZN(RN);
+#ifdef DSP_DIS_NOT
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_move_pc(void)
+{
+ RN = dsp_pc - 2;
+}
+
+static void dsp_opcode_store_r14_indexed(void)
+{
+#ifdef DSP_DIS_STORE14I
+ if (doDSPDis)
+ WriteLog("%06X: STORE R%02u, (R14+$%02X) [NCZ:%u%u%u, R%02u=%08X, R14+$%02X=%08X]\n", dsp_pc-2, IMM_2, dsp_convert_zero[IMM_1] << 2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN, dsp_convert_zero[IMM_1] << 2, dsp_reg[14]+(dsp_convert_zero[IMM_1] << 2));
+#endif
+ DSPWriteLong(dsp_reg[14] + (dsp_convert_zero[IMM_1] << 2), RN, DSP);
+}
+
+static void dsp_opcode_store_r15_indexed(void)
+{
+#ifdef DSP_DIS_STORE15I
+ if (doDSPDis)
+ WriteLog("%06X: STORE R%02u, (R15+$%02X) [NCZ:%u%u%u, R%02u=%08X, R15+$%02X=%08X]\n", dsp_pc-2, IMM_2, dsp_convert_zero[IMM_1] << 2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN, dsp_convert_zero[IMM_1] << 2, dsp_reg[15]+(dsp_convert_zero[IMM_1] << 2));
+#endif
+ DSPWriteLong(dsp_reg[15] + (dsp_convert_zero[IMM_1] << 2), RN, DSP);
+}
+
+static void dsp_opcode_load_r14_ri(void)
+{
+#ifdef DSP_DIS_LOAD14R
+ if (doDSPDis)
+ WriteLog("%06X: LOAD (R14+R%02u), R%02u [NCZ:%u%u%u, R14+R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM+dsp_reg[14], IMM_2, RN);
+#endif
+ RN = DSPReadLong(dsp_reg[14] + RM, DSP);
+#ifdef DSP_DIS_LOAD14R
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_load_r15_ri(void)
+{
+#ifdef DSP_DIS_LOAD15R
+ if (doDSPDis)
+ WriteLog("%06X: LOAD (R15+R%02u), R%02u [NCZ:%u%u%u, R15+R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM+dsp_reg[15], IMM_2, RN);
+#endif
+ RN = DSPReadLong(dsp_reg[15] + RM, DSP);
+#ifdef DSP_DIS_LOAD15R
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_store_r14_ri(void)
+{
+ DSPWriteLong(dsp_reg[14] + RM, RN, DSP);
+}
+
+static void dsp_opcode_store_r15_ri(void)
+{
+ DSPWriteLong(dsp_reg[15] + RM, RN, DSP);
+}
+
+static void dsp_opcode_nop(void)
+{
+#ifdef DSP_DIS_NOP
+ if (doDSPDis)
+ WriteLog("%06X: NOP [NCZ:%u%u%u]\n", dsp_pc-2, dsp_flag_n, dsp_flag_c, dsp_flag_z);
+#endif
+}
+
+static void dsp_opcode_storeb(void)
+{
+#ifdef DSP_DIS_STOREB
+ if (doDSPDis)
+ WriteLog("%06X: STOREB R%02u, (R%02u) [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_pc-2, IMM_2, IMM_1, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN, IMM_1, RM);
+#endif
+ if (RM >= DSP_WORK_RAM_BASE && RM <= (DSP_WORK_RAM_BASE + 0x1FFF))
+ DSPWriteLong(RM, RN & 0xFF, DSP);
+ else
+ JaguarWriteByte(RM, RN, DSP);
+}
+
+static void dsp_opcode_storew(void)
+{
+#ifdef DSP_DIS_STOREW
+ if (doDSPDis)
+ WriteLog("%06X: STOREW R%02u, (R%02u) [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_pc-2, IMM_2, IMM_1, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN, IMM_1, RM);
+#endif
+ if (RM >= DSP_WORK_RAM_BASE && RM <= (DSP_WORK_RAM_BASE + 0x1FFF))
+ DSPWriteLong(RM, RN & 0xFFFF, DSP);
+ else
+ JaguarWriteWord(RM, RN, DSP);
+}
+
+static void dsp_opcode_store(void)
+{
+#ifdef DSP_DIS_STORE
+ if (doDSPDis)
+ WriteLog("%06X: STORE R%02u, (R%02u) [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_pc-2, IMM_2, IMM_1, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN, IMM_1, RM);
+#endif
+ DSPWriteLong(RM, RN, DSP);
+}
+
+static void dsp_opcode_loadb(void)
+{
+#ifdef DSP_DIS_LOADB
+ if (doDSPDis)
+ WriteLog("%06X: LOADB (R%02u), R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ if (RM >= DSP_WORK_RAM_BASE && RM <= (DSP_WORK_RAM_BASE + 0x1FFF))
+ RN = DSPReadLong(RM, DSP) & 0xFF;
+ else
+ RN = JaguarReadByte(RM, DSP);
+#ifdef DSP_DIS_LOADB
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_loadw(void)
+{
+#ifdef DSP_DIS_LOADW
+ if (doDSPDis)
+ WriteLog("%06X: LOADW (R%02u), R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ if (RM >= DSP_WORK_RAM_BASE && RM <= (DSP_WORK_RAM_BASE + 0x1FFF))
+ RN = DSPReadLong(RM, DSP) & 0xFFFF;
+ else
+ RN = JaguarReadWord(RM, DSP);
+#ifdef DSP_DIS_LOADW
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_load(void)
+{
+#ifdef DSP_DIS_LOAD
+ if (doDSPDis)
+ WriteLog("%06X: LOAD (R%02u), R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = DSPReadLong(RM, DSP);
+#ifdef DSP_DIS_LOAD
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_load_r14_indexed(void)
+{
+#ifdef DSP_DIS_LOAD14I
+ if (doDSPDis)
+ WriteLog("%06X: LOAD (R14+$%02X), R%02u [NCZ:%u%u%u, R14+$%02X=%08X, R%02u=%08X] -> ", dsp_pc-2, dsp_convert_zero[IMM_1] << 2, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, dsp_convert_zero[IMM_1] << 2, dsp_reg[14]+(dsp_convert_zero[IMM_1] << 2), IMM_2, RN);
+#endif
+ RN = DSPReadLong(dsp_reg[14] + (dsp_convert_zero[IMM_1] << 2), DSP);
+#ifdef DSP_DIS_LOAD14I
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_load_r15_indexed(void)
+{
+#ifdef DSP_DIS_LOAD15I
+ if (doDSPDis)
+ WriteLog("%06X: LOAD (R15+$%02X), R%02u [NCZ:%u%u%u, R15+$%02X=%08X, R%02u=%08X] -> ", dsp_pc-2, dsp_convert_zero[IMM_1] << 2, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, dsp_convert_zero[IMM_1] << 2, dsp_reg[15]+(dsp_convert_zero[IMM_1] << 2), IMM_2, RN);
+#endif
+ RN = DSPReadLong(dsp_reg[15] + (dsp_convert_zero[IMM_1] << 2), DSP);
+#ifdef DSP_DIS_LOAD15I
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_movei(void)
+{
+#ifdef DSP_DIS_MOVEI
+ if (doDSPDis)
+ WriteLog("%06X: MOVEI #$%08X, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, (uint32)DSPReadWord(dsp_pc) | ((uint32)DSPReadWord(dsp_pc + 2) << 16), IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ // This instruction is followed by 32-bit value in LSW / MSW format...
+ RN = (uint32)DSPReadWord(dsp_pc, DSP) | ((uint32)DSPReadWord(dsp_pc + 2, DSP) << 16);
+ dsp_pc += 4;
+#ifdef DSP_DIS_MOVEI
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_moveta(void)
+{
+#ifdef DSP_DIS_MOVETA
+ if (doDSPDis)
+ WriteLog("%06X: MOVETA R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u(alt)=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, ALTERNATE_RN);
+#endif
+ ALTERNATE_RN = RM;
+#ifdef DSP_DIS_MOVETA
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u(alt)=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, ALTERNATE_RN);
+#endif
+}
+
+static void dsp_opcode_movefa(void)
+{
+#ifdef DSP_DIS_MOVEFA
+ if (doDSPDis)
+ WriteLog("%06X: MOVEFA R%02u, R%02u [NCZ:%u%u%u, R%02u(alt)=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, ALTERNATE_RM, IMM_2, RN);
+#endif
+ RN = ALTERNATE_RM;
+#ifdef DSP_DIS_MOVEFA
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u(alt)=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, ALTERNATE_RM, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_move(void)
+{
+#ifdef DSP_DIS_MOVE
+ if (doDSPDis)
+ WriteLog("%06X: MOVE R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = RM;
+#ifdef DSP_DIS_MOVE
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_moveq(void)
+{
+#ifdef DSP_DIS_MOVEQ
+ if (doDSPDis)
+ WriteLog("%06X: MOVEQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ RN = IMM_1;
+#ifdef DSP_DIS_MOVEQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_resmac(void)
+{
+#ifdef DSP_DIS_RESMAC
+ if (doDSPDis)
+ WriteLog("%06X: RESMAC R%02u [NCZ:%u%u%u, R%02u=%08X, DSP_ACC=%02X%08X] -> ", dsp_pc-2, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN, (uint8)(dsp_acc >> 32), (uint32)(dsp_acc & 0xFFFFFFFF));
+#endif
+ RN = (uint32)dsp_acc;
+#ifdef DSP_DIS_RESMAC
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_imult(void)
+{
+#ifdef DSP_DIS_IMULT
+ if (doDSPDis)
+ WriteLog("%06X: IMULT R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = (int16)RN * (int16)RM;
+ SET_ZN(RN);
+#ifdef DSP_DIS_IMULT
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_mult(void)
+{
+#ifdef DSP_DIS_MULT
+ if (doDSPDis)
+ WriteLog("%06X: MULT R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = (uint16)RM * (uint16)RN;
+ SET_ZN(RN);
+#ifdef DSP_DIS_MULT
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_bclr(void)
+{
+#ifdef DSP_DIS_BCLR
+ if (doDSPDis)
+ WriteLog("%06X: BCLR #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ uint32 res = RN & ~(1 << IMM_1);
+ RN = res;
+ SET_ZN(res);
+#ifdef DSP_DIS_BCLR
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_btst(void)
+{
+#ifdef DSP_DIS_BTST
+ if (doDSPDis)
+ WriteLog("%06X: BTST #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ dsp_flag_z = (~RN >> IMM_1) & 1;
+#ifdef DSP_DIS_BTST
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_bset(void)
+{
+#ifdef DSP_DIS_BSET
+ if (doDSPDis)
+ WriteLog("%06X: BSET #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ uint32 res = RN | (1 << IMM_1);
+ RN = res;
+ SET_ZN(res);
+#ifdef DSP_DIS_BSET
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_subqt(void)
+{
+#ifdef DSP_DIS_SUBQT
+ if (doDSPDis)
+ WriteLog("%06X: SUBQT #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, dsp_convert_zero[IMM_1], IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ RN -= dsp_convert_zero[IMM_1];
+#ifdef DSP_DIS_SUBQT
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_addqt(void)
+{
+#ifdef DSP_DIS_ADDQT
+ if (doDSPDis)
+ WriteLog("%06X: ADDQT #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, dsp_convert_zero[IMM_1], IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ RN += dsp_convert_zero[IMM_1];
+#ifdef DSP_DIS_ADDQT
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_imacn(void)
+{
+#ifdef DSP_DIS_IMACN
+ if (doDSPDis)
+ WriteLog("%06X: IMACN R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ int32 res = (int16)RM * (int16)RN;
+ dsp_acc += (int64)res;
+//Should we AND the result to fit into 40 bits here???
+#ifdef DSP_DIS_IMACN
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, DSP_ACC=%02X%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, (uint8)(dsp_acc >> 32), (uint32)(dsp_acc & 0xFFFFFFFF));
+#endif
+}
+
+static void dsp_opcode_mtoi(void)
+{
+ RN = (((int32)RM >> 8) & 0xFF800000) | (RM & 0x007FFFFF);
+ SET_ZN(RN);
+}
+
+static void dsp_opcode_normi(void)
+{
+ uint32 _Rm = RM;
+ uint32 res = 0;
+
+ if (_Rm)
+ {
+ while ((_Rm & 0xffc00000) == 0)
+ {
+ _Rm <<= 1;
+ res--;
+ }
+ while ((_Rm & 0xff800000) != 0)
+ {
+ _Rm >>= 1;
+ res++;
+ }
+ }
+ RN = res;
+ SET_ZN(RN);
+}
+
+static void dsp_opcode_mmult(void)
+{
+ int count = dsp_matrix_control&0x0f;
+ uint32 addr = dsp_pointer_to_matrix; // in the gpu ram
+ int64 accum = 0;
+ uint32 res;
+
+ if (!(dsp_matrix_control & 0x10))
+ {
+ for (int i = 0; i < count; i++)
+ {
+ int16 a;
+ if (i&0x01)
+ a=(int16)((dsp_alternate_reg[dsp_opcode_first_parameter + (i>>1)]>>16)&0xffff);
+ else
+ a=(int16)(dsp_alternate_reg[dsp_opcode_first_parameter + (i>>1)]&0xffff);
+ int16 b=((int16)DSPReadWord(addr + 2, DSP));
+ accum += a*b;
+ addr += 4;
+ }
+ }
+ else
+ {
+ for (int i = 0; i < count; i++)
+ {
+ int16 a;
+ if (i&0x01)
+ a=(int16)((dsp_alternate_reg[dsp_opcode_first_parameter + (i>>1)]>>16)&0xffff);
+ else
+ a=(int16)(dsp_alternate_reg[dsp_opcode_first_parameter + (i>>1)]&0xffff);
+ int16 b=((int16)DSPReadWord(addr + 2, DSP));
+ accum += a*b;
+ addr += 4 * count;
+ }
+ }
+ RN = res = (int32)accum;
+ // carry flag to do
+//NOTE: The flags are set based upon the last add/multiply done...
+ SET_ZN(RN);
+}
+
+static void dsp_opcode_abs(void)
+{
+#ifdef DSP_DIS_ABS
+ if (doDSPDis)
+ WriteLog("%06X: ABS R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ uint32 _Rn = RN;
+ uint32 res;
+
+ if (_Rn == 0x80000000)
+ dsp_flag_n = 1;
+ else
+ {
+ dsp_flag_c = ((_Rn & 0x80000000) >> 31);
+ res = RN = (_Rn & 0x80000000 ? -_Rn : _Rn);
+ CLR_ZN; SET_Z(res);
+ }
+#ifdef DSP_DIS_ABS
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_div(void)
+{
+ uint32 _Rm=RM;
+ uint32 _Rn=RN;
+
+ if (_Rm)
+ {
+ if (dsp_div_control & 1)
+ {
+ dsp_remain = (((uint64)_Rn) << 16) % _Rm;
+ if (dsp_remain&0x80000000)
+ dsp_remain-=_Rm;
+ RN = (((uint64)_Rn) << 16) / _Rm;
+ }
+ else
+ {
+ dsp_remain = _Rn % _Rm;
+ if (dsp_remain&0x80000000)
+ dsp_remain-=_Rm;
+ RN/=_Rm;
+ }
+ }
+ else
+ RN=0xffffffff;
+}
+
+static void dsp_opcode_imultn(void)
+{
+#ifdef DSP_DIS_IMULTN
+ if (doDSPDis)
+ WriteLog("%06X: IMULTN R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ // This is OK, since this multiply won't overflow 32 bits...
+ int32 res = (int32)((int16)RN * (int16)RM);
+ dsp_acc = (int64)res;
+ SET_ZN(res);
+#ifdef DSP_DIS_IMULTN
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, DSP_ACC=%02X%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, (uint8)(dsp_acc >> 32), (uint32)(dsp_acc & 0xFFFFFFFF));
+#endif
+}
+
+static void dsp_opcode_neg(void)
+{
+#ifdef DSP_DIS_NEG
+ if (doDSPDis)
+ WriteLog("%06X: NEG R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ uint32 res = -RN;
+ SET_ZNC_SUB(0, RN, res);
+ RN = res;
+#ifdef DSP_DIS_NEG
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_shlq(void)
+{
+#ifdef DSP_DIS_SHLQ
+ if (doDSPDis)
+ WriteLog("%06X: SHLQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, 32 - IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ int32 r1 = 32 - IMM_1;
+ uint32 res = RN << r1;
+ SET_ZN(res); dsp_flag_c = (RN >> 31) & 1;
+ RN = res;
+#ifdef DSP_DIS_SHLQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_shrq(void)
+{
+#ifdef DSP_DIS_SHRQ
+ if (doDSPDis)
+ WriteLog("%06X: SHRQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, dsp_convert_zero[IMM_1], IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ int32 r1 = dsp_convert_zero[IMM_1];
+ uint32 res = RN >> r1;
+ SET_ZN(res); dsp_flag_c = RN & 1;
+ RN = res;
+#ifdef DSP_DIS_SHRQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_ror(void)
+{
+#ifdef DSP_DIS_ROR
+ if (doDSPDis)
+ WriteLog("%06X: ROR R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ uint32 r1 = RM & 0x1F;
+ uint32 res = (RN >> r1) | (RN << (32 - r1));
+ SET_ZN(res); dsp_flag_c = (RN >> 31) & 1;
+ RN = res;
+#ifdef DSP_DIS_ROR
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_rorq(void)
+{
+#ifdef DSP_DIS_RORQ
+ if (doDSPDis)
+ WriteLog("%06X: RORQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, dsp_convert_zero[IMM_1], IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ uint32 r1 = dsp_convert_zero[IMM_1 & 0x1F];
+ uint32 r2 = RN;
+ uint32 res = (r2 >> r1) | (r2 << (32 - r1));
+ RN = res;
+ SET_ZN(res); dsp_flag_c = (r2 >> 31) & 0x01;
+#ifdef DSP_DIS_RORQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_sha(void)
+{
+ int32 sRm=(int32)RM;
+ uint32 _Rn=RN;
+
+ if (sRm<0)
+ {
+ uint32 shift=-sRm;
+ if (shift>=32) shift=32;
+ dsp_flag_c=(_Rn&0x80000000)>>31;
+ while (shift)
+ {
+ _Rn<<=1;
+ shift--;
+ }
+ }
+ else
+ {
+ uint32 shift=sRm;
+ if (shift>=32) shift=32;
+ dsp_flag_c=_Rn&0x1;
+ while (shift)
+ {
+ _Rn=((int32)_Rn)>>1;
+ shift--;
+ }
+ }
+ RN = _Rn;
+ SET_ZN(RN);
+}
+
+static void dsp_opcode_sharq(void)
+{
+#ifdef DSP_DIS_SHARQ
+ if (doDSPDis)
+ WriteLog("%06X: SHARQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", dsp_pc-2, dsp_convert_zero[IMM_1], IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+ uint32 res = (int32)RN >> dsp_convert_zero[IMM_1];
+ SET_ZN(res); dsp_flag_c = RN & 0x01;
+ RN = res;
+#ifdef DSP_DIS_SHARQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+static void dsp_opcode_sh(void)
+{
+ int32 sRm=(int32)RM;
+ uint32 _Rn=RN;
+
+ if (sRm<0)
+ {
+ uint32 shift=(-sRm);
+ if (shift>=32) shift=32;
+ dsp_flag_c=(_Rn&0x80000000)>>31;
+ while (shift)
+ {
+ _Rn<<=1;
+ shift--;
+ }
+ }
+ else
+ {
+ uint32 shift=sRm;
+ if (shift>=32) shift=32;
+ dsp_flag_c=_Rn&0x1;
+ while (shift)
+ {
+ _Rn>>=1;
+ shift--;
+ }
+ }
+ RN = _Rn;
+ SET_ZN(RN);
+}
+
+void dsp_opcode_addqmod(void)
+{
+#ifdef DSP_DIS_ADDQMOD
+ if (doDSPDis)
+ WriteLog("%06X: ADDQMOD #%u, R%02u [NCZ:%u%u%u, R%02u=%08X, DSP_MOD=%08X] -> ", dsp_pc-2, dsp_convert_zero[IMM_1], IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN, dsp_modulo);
+#endif
+ uint32 r1 = dsp_convert_zero[IMM_1];
+ uint32 r2 = RN;
+ uint32 res = r2 + r1;
+ res = (res & (~dsp_modulo)) | (r2 & dsp_modulo);
+ RN = res;
+ SET_ZNC_ADD(r2, r1, res);
+#ifdef DSP_DIS_ADDQMOD
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN);
+#endif
+}
+
+void dsp_opcode_subqmod(void)
+{
+ uint32 r1 = dsp_convert_zero[IMM_1];
+ uint32 r2 = RN;
+ uint32 res = r2 - r1;
+ res = (res & (~dsp_modulo)) | (r2 & dsp_modulo);
+ RN = res;
+
+ SET_ZNC_SUB(r2, r1, res);
+}
+
+void dsp_opcode_mirror(void)
+{
+ uint32 r1 = RN;
+ RN = (mirror_table[r1 & 0xFFFF] << 16) | mirror_table[r1 >> 16];
+ SET_ZN(RN);
+}
+
+void dsp_opcode_sat32s(void)
+{
+ int32 r2 = (uint32)RN;
+ int32 temp = dsp_acc >> 32;
+ uint32 res = (temp < -1) ? (int32)0x80000000 : (temp > 0) ? (int32)0x7FFFFFFF : r2;
+ RN = res;
+ SET_ZN(res);
+}
+
+void dsp_opcode_sat16s(void)
+{
+ int32 r2 = RN;
+ uint32 res = (r2 < -32768) ? -32768 : (r2 > 32767) ? 32767 : r2;
+ RN = res;
+ SET_ZN(res);
+}
+
+//
+// New pipelined DSP core
+//
+
+static void DSP_abs(void);
+static void DSP_add(void);
+static void DSP_addc(void);
+static void DSP_addq(void);
+static void DSP_addqmod(void);
+static void DSP_addqt(void);
+static void DSP_and(void);
+static void DSP_bclr(void);
+static void DSP_bset(void);
+static void DSP_btst(void);
+static void DSP_cmp(void);
+static void DSP_cmpq(void);
+static void DSP_div(void);
+static void DSP_imacn(void);
+static void DSP_imult(void);
+static void DSP_imultn(void);
+static void DSP_illegal(void);
+static void DSP_jr(void);
+static void DSP_jump(void);
+static void DSP_load(void);
+static void DSP_loadb(void);
+static void DSP_loadw(void);
+static void DSP_load_r14_i(void);
+static void DSP_load_r14_r(void);
+static void DSP_load_r15_i(void);
+static void DSP_load_r15_r(void);
+static void DSP_mirror(void);
+static void DSP_mmult(void);
+static void DSP_move(void);
+static void DSP_movefa(void);
+static void DSP_movei(void);
+static void DSP_movepc(void);
+static void DSP_moveq(void);
+static void DSP_moveta(void);
+static void DSP_mtoi(void);
+static void DSP_mult(void);
+static void DSP_neg(void);
+static void DSP_nop(void);
+static void DSP_normi(void);
+static void DSP_not(void);
+static void DSP_or(void);
+static void DSP_resmac(void);
+static void DSP_ror(void);
+static void DSP_rorq(void);
+static void DSP_sat16s(void);
+static void DSP_sat32s(void);
+static void DSP_sh(void);
+static void DSP_sha(void);
+static void DSP_sharq(void);
+static void DSP_shlq(void);
+static void DSP_shrq(void);
+static void DSP_store(void);
+static void DSP_storeb(void);
+static void DSP_storew(void);
+static void DSP_store_r14_i(void);
+static void DSP_store_r14_r(void);
+static void DSP_store_r15_i(void);
+static void DSP_store_r15_r(void);
+static void DSP_sub(void);
+static void DSP_subc(void);
+static void DSP_subq(void);
+static void DSP_subqmod(void);
+static void DSP_subqt(void);
+static void DSP_xor(void);
+
+void (* DSPOpcode[64])() =
+{
+ DSP_add, DSP_addc, DSP_addq, DSP_addqt,
+ DSP_sub, DSP_subc, DSP_subq, DSP_subqt,
+ DSP_neg, DSP_and, DSP_or, DSP_xor,
+ DSP_not, DSP_btst, DSP_bset, DSP_bclr,
+
+ DSP_mult, DSP_imult, DSP_imultn, DSP_resmac,
+ DSP_imacn, DSP_div, DSP_abs, DSP_sh,
+ DSP_shlq, DSP_shrq, DSP_sha, DSP_sharq,
+ DSP_ror, DSP_rorq, DSP_cmp, DSP_cmpq,
+
+ DSP_subqmod, DSP_sat16s, DSP_move, DSP_moveq,
+ DSP_moveta, DSP_movefa, DSP_movei, DSP_loadb,
+ DSP_loadw, DSP_load, DSP_sat32s, DSP_load_r14_i,
+ DSP_load_r15_i, DSP_storeb, DSP_storew, DSP_store,
+
+ DSP_mirror, DSP_store_r14_i, DSP_store_r15_i, DSP_movepc,
+ DSP_jump, DSP_jr, DSP_mmult, DSP_mtoi,
+ DSP_normi, DSP_nop, DSP_load_r14_r, DSP_load_r15_r,
+ DSP_store_r14_r, DSP_store_r15_r, DSP_illegal, DSP_addqmod
+};
+
+bool readAffected[64][2] =
+{
+ { true, true}, { true, true}, {false, true}, {false, true},
+ { true, true}, { true, true}, {false, true}, {false, true},
+ {false, true}, { true, true}, { true, true}, { true, true},
+ {false, true}, {false, true}, {false, true}, {false, true},
+
+ { true, true}, { true, true}, { true, true}, {false, true},
+ { true, true}, { true, true}, {false, true}, { true, true},
+ {false, true}, {false, true}, { true, true}, {false, true},
+ { true, true}, {false, true}, { true, true}, {false, true},
+
+ {false, true}, {false, true}, { true, false}, {false, false},
+ { true, false}, {false, false}, {false, false}, { true, false},
+ { true, false}, { true, false}, {false, true}, { true, false},
+ { true, false}, { true, true}, { true, true}, { true, true},
+
+ {false, true}, { true, true}, { true, true}, {false, true},
+ { true, false}, { true, false}, { true, true}, { true, false},
+ { true, false}, {false, false}, { true, false}, { true, false},
+ { true, true}, { true, true}, {false, false}, {false, true}
+};
+
+bool isLoadStore[65] =
+{
+ false, false, false, false, false, false, false, false,
+ false, false, false, false, false, false, false, false,
+
+ false, false, false, false, false, false, false, false,
+ false, false, false, false, false, false, false, false,
+
+ false, false, false, false, false, false, false, true,
+ true, true, false, true, true, true, true, true,
+
+ false, true, true, false, false, false, false, false,
+ false, false, true, true, true, true, false, false, false
+};
+
+void FlushDSPPipeline(void)
+{
+ plPtrFetch = 3, plPtrRead = 2, plPtrExec = 1, plPtrWrite = 0;
+
+ for(int i=0; i<4; i++)
+ pipeline[i].opcode = PIPELINE_STALL;
+
+ for(int i=0; i<32; i++)
+ scoreboard[i] = 0;
+}
+
+//
+// New pipelined DSP execution core
+//
+/*void DSPExecP(int32 cycles)
+{
+// bool inhibitFetch = false;
+
+ dsp_releaseTimeSlice_flag = 0;
+ dsp_in_exec++;
+
+ while (cycles > 0 && DSP_RUNNING)
+ {
+WriteLog("DSPExecP: Pipeline status...\n");
+WriteLog("\tF -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrFetch].opcode, pipeline[plPtrFetch].operand1, pipeline[plPtrFetch].operand2, pipeline[plPtrFetch].reg1, pipeline[plPtrFetch].reg2, pipeline[plPtrFetch].result, pipeline[plPtrFetch].writebackRegister);
+WriteLog("\tR -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrRead].opcode, pipeline[plPtrRead].operand1, pipeline[plPtrRead].operand2, pipeline[plPtrRead].reg1, pipeline[plPtrRead].reg2, pipeline[plPtrRead].result, pipeline[plPtrRead].writebackRegister);
+WriteLog("\tE -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrExec].opcode, pipeline[plPtrExec].operand1, pipeline[plPtrExec].operand2, pipeline[plPtrExec].reg1, pipeline[plPtrExec].reg2, pipeline[plPtrExec].result, pipeline[plPtrExec].writebackRegister);
+WriteLog("\tW -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrWrite].opcode, pipeline[plPtrWrite].operand1, pipeline[plPtrWrite].operand2, pipeline[plPtrWrite].reg1, pipeline[plPtrWrite].reg2, pipeline[plPtrWrite].result, pipeline[plPtrWrite].writebackRegister);
+WriteLog(" --> Scoreboard: ");
+for(int i=0; i<32; i++)
+ WriteLog("%s ", scoreboard[i] ? "T" : "F");
+WriteLog("\n");
+ // Stage 1: Instruction fetch
+// if (!inhibitFetch)
+// {
+ pipeline[plPtrFetch].instruction = DSPReadWord(dsp_pc, DSP);
+ pipeline[plPtrFetch].opcode = pipeline[plPtrFetch].instruction >> 10;
+ pipeline[plPtrFetch].operand1 = (pipeline[plPtrFetch].instruction >> 5) & 0x1F;
+ pipeline[plPtrFetch].operand2 = pipeline[plPtrFetch].instruction & 0x1F;
+ if (pipeline[plPtrFetch].opcode == 38)
+ pipeline[plPtrFetch].result = (uint32)DSPReadWord(dsp_pc + 2, DSP)
+ | ((uint32)DSPReadWord(dsp_pc + 4, DSP) << 16);
+// }
+// else
+// inhibitFetch = false;
+WriteLog("DSPExecP: Fetching instruction (%04X) from DSP_PC = %08X...\n", pipeline[plPtrFetch].instruction, dsp_pc);
+
+WriteLog("DSPExecP: Pipeline status (after stage 1)...\n");
+WriteLog("\tF -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrFetch].opcode, pipeline[plPtrFetch].operand1, pipeline[plPtrFetch].operand2, pipeline[plPtrFetch].reg1, pipeline[plPtrFetch].reg2, pipeline[plPtrFetch].result, pipeline[plPtrFetch].writebackRegister);
+WriteLog("\tR -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrRead].opcode, pipeline[plPtrRead].operand1, pipeline[plPtrRead].operand2, pipeline[plPtrRead].reg1, pipeline[plPtrRead].reg2, pipeline[plPtrRead].result, pipeline[plPtrRead].writebackRegister);
+WriteLog("\tE -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrExec].opcode, pipeline[plPtrExec].operand1, pipeline[plPtrExec].operand2, pipeline[plPtrExec].reg1, pipeline[plPtrExec].reg2, pipeline[plPtrExec].result, pipeline[plPtrExec].writebackRegister);
+WriteLog("\tW -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrWrite].opcode, pipeline[plPtrWrite].operand1, pipeline[plPtrWrite].operand2, pipeline[plPtrWrite].reg1, pipeline[plPtrWrite].reg2, pipeline[plPtrWrite].result, pipeline[plPtrWrite].writebackRegister);
+ // Stage 2: Read registers
+//Ok, stalls here depend on whether or not the instruction reads two registers or not
+//and *which* register (1 or 2) is the one being read... !!! FIX !!!
+ if (scoreboard[pipeline[plPtrRead].operand2])
+ && pipeline[plPtrRead].opcode != PIPELINE_STALL)
+ // We have a hit in the scoreboard, so we have to stall the pipeline...
+{
+//This is crappy, crappy CRAPPY! And it doesn't work! !!! FIX !!!
+// dsp_pc -= (pipeline[plPtrRead].opcode == 38 ? 6 : 2);
+WriteLog(" --> Stalling pipeline: scoreboard = %s\n", scoreboard[pipeline[plPtrRead].operand2] ? "true" : "false");
+ pipeline[plPtrFetch] = pipeline[plPtrRead];
+ pipeline[plPtrRead].opcode = PIPELINE_STALL;
+}
+ else
+ {
+ pipeline[plPtrRead].reg1 = dsp_reg[pipeline[plPtrRead].operand1];
+ pipeline[plPtrRead].reg2 = dsp_reg[pipeline[plPtrRead].operand2];
+ pipeline[plPtrRead].writebackRegister = pipeline[plPtrRead].operand2; // Set it to RN
+
+ if (pipeline[plPtrRead].opcode != PIPELINE_STALL)
+ // Shouldn't we be more selective with the register scoreboarding?
+ // Yes, we should. !!! FIX !!!
+ scoreboard[pipeline[plPtrRead].operand2] = true;
+//Advance PC here??? Yes.
+// dsp_pc += (pipeline[plPtrRead].opcode == 38 ? 6 : 2);
+//This is a mangling of the pipeline stages, but what else to do???
+ dsp_pc += (pipeline[plPtrFetch].opcode == 38 ? 6 : 2);
+ }
+
+WriteLog("DSPExecP: Pipeline status (after stage 2)...\n");
+WriteLog("\tF -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrFetch].opcode, pipeline[plPtrFetch].operand1, pipeline[plPtrFetch].operand2, pipeline[plPtrFetch].reg1, pipeline[plPtrFetch].reg2, pipeline[plPtrFetch].result, pipeline[plPtrFetch].writebackRegister);
+WriteLog("\tR -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrRead].opcode, pipeline[plPtrRead].operand1, pipeline[plPtrRead].operand2, pipeline[plPtrRead].reg1, pipeline[plPtrRead].reg2, pipeline[plPtrRead].result, pipeline[plPtrRead].writebackRegister);
+WriteLog("\tE -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrExec].opcode, pipeline[plPtrExec].operand1, pipeline[plPtrExec].operand2, pipeline[plPtrExec].reg1, pipeline[plPtrExec].reg2, pipeline[plPtrExec].result, pipeline[plPtrExec].writebackRegister);
+WriteLog("\tW -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrWrite].opcode, pipeline[plPtrWrite].operand1, pipeline[plPtrWrite].operand2, pipeline[plPtrWrite].reg1, pipeline[plPtrWrite].reg2, pipeline[plPtrWrite].result, pipeline[plPtrWrite].writebackRegister);
+ // Stage 3: Execute
+ if (pipeline[plPtrExec].opcode != PIPELINE_STALL)
+ {
+WriteLog("DSPExecP: About to execute opcode %s...\n", dsp_opcode_str[pipeline[plPtrExec].opcode]);
+ DSPOpcode[pipeline[plPtrExec].opcode]();
+ dsp_opcode_use[pipeline[plPtrExec].opcode]++;
+ cycles -= dsp_opcode_cycles[pipeline[plPtrExec].opcode];
+ }
+ else
+ cycles--;
+
+WriteLog("DSPExecP: Pipeline status (after stage 3)...\n");
+WriteLog("\tF -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrFetch].opcode, pipeline[plPtrFetch].operand1, pipeline[plPtrFetch].operand2, pipeline[plPtrFetch].reg1, pipeline[plPtrFetch].reg2, pipeline[plPtrFetch].result, pipeline[plPtrFetch].writebackRegister);
+WriteLog("\tR -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrRead].opcode, pipeline[plPtrRead].operand1, pipeline[plPtrRead].operand2, pipeline[plPtrRead].reg1, pipeline[plPtrRead].reg2, pipeline[plPtrRead].result, pipeline[plPtrRead].writebackRegister);
+WriteLog("\tE -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrExec].opcode, pipeline[plPtrExec].operand1, pipeline[plPtrExec].operand2, pipeline[plPtrExec].reg1, pipeline[plPtrExec].reg2, pipeline[plPtrExec].result, pipeline[plPtrExec].writebackRegister);
+WriteLog("\tW -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u \n", pipeline[plPtrWrite].opcode, pipeline[plPtrWrite].operand1, pipeline[plPtrWrite].operand2, pipeline[plPtrWrite].reg1, pipeline[plPtrWrite].reg2, pipeline[plPtrWrite].result, pipeline[plPtrWrite].writebackRegister);
+ // Stage 4: Write back register
+ if (pipeline[plPtrWrite].opcode != PIPELINE_STALL)
+ {
+ if (pipeline[plPtrWrite].writebackRegister != 0xFF)
+ dsp_reg[pipeline[plPtrWrite].writebackRegister] = pipeline[plPtrWrite].result;
+
+ scoreboard[pipeline[plPtrWrite].operand1]
+ = scoreboard[pipeline[plPtrWrite].operand2] = false;
+ }
+
+ // Push instructions through the pipeline...
+ plPtrFetch = (++plPtrFetch) & 0x03;
+ plPtrRead = (++plPtrRead) & 0x03;
+ plPtrExec = (++plPtrExec) & 0x03;
+ plPtrWrite = (++plPtrWrite) & 0x03;
+ }
+
+ dsp_in_exec--;
+}*/
+
+
+//Problems: JR and any other instruction that relies on DSP_PC is getting WRONG values!
+//!!! FIX !!!
+// Should be fixed now. Another problem is figuring how to do the sequence following
+// a branch followed with the JR & JUMP instructions...
+//
+// There are two conflicting problems:
+
+/*
+F1B236: LOAD (R31), R03 [NCZ:000, R31=00F1CFDC, R03=00F14000] -> [NCZ:000, R03=00F1B084]
+F1B238: BCLR #3, R00 [NCZ:000, R00=00004039] -> [NCZ:000, R00=00004031]
+F1B23A: ADDQ #2, R03 [NCZ:000, R03=00F1B084] -> [NCZ:000, R03=00F1B086]
+F1B23C: SUBQ #1, R17 [NCZ:000, R17=00000040] -> [NCZ:000, R17=0000003F]
+F1B23E: MOVEI #$00F1CFE0, R31 [NCZ:000, R31=00F1CFDC] -> [NCZ:000, R31=00F1CFE0]
+F1B244: JR z, F1B254 [NCZ:000] Branch NOT taken.
+F1B246: BSET #10, R00 [NCZ:000, R00=00004031] -> [NCZ:000, R00=00004431]
+F1B248: MOVEI #$00F1A100, R01 [NCZ:000, R01=00F1A148] -> [NCZ:000, R01=00F1A100]
+F1B24E: STORE R00, (R01) [NCZ:000, R00=00004431, R01=00F1A100]
+DSP: Writing 00004431 to DSP_FLAGS by DSP...
+DSP: Finished interrupt.
+; Without pipeline effects, the value in R03 is erroneously read from bank 1 instead of
+; bank 0 (where is was prepared)!
+F1B250: JUMP T, (R03) [NCZ:001, R03=00000000] Branched!
+F1B252: NOP [NCZ:001]
+*/
+
+// The other is when you see this at the end of an IRQ:
+
+/*
+JUMP T, (R29) ; R29 = Previous stack + 2
+STORE R28, (R30) ; R28 = Modified flags register, R30 = $F1A100
+
+; Actually, this is OK if we do the atomic JUMP/JR operation correctly:
+; 1) The STORE goes through the pipeline and is executed/written back
+; 2) The pipeline is flushed
+; 3) The DSP_PC is set to the new address
+; 4) Execution resumes
+
+JUMP T, (R25) ; Oops! Because of pipeline effects R25 has the value from
+ ; bank 0 instead of the current bank 1 and so goes astray!
+*/
+
+//One other thing: Since these stages are supposed to happen simulaneously, try executing
+//them in reverse order to see if that reduces pipeline stalls from late writebacks...
+
+
+/*
+Small problem here: The return address when INT0 comes up is $F1B088, but when INT1
+follows it, the JUMP out of the previous interrupt is bypassed immediately--this is
+because the STORE instruction writes back on stage #2 of the pipeline instead of stage #3...
+If it were done properly, the STORE write back would occur *after* (well, technically,
+during) the execution of the the JUMP that follows it.
+
+!!! FIX !!! [DONE]
+
+F1B08A: JR z, F1B082 [NCZ:001] Branched!
+F1B08A: NOP [NCZ:001]
+[STALL...]
+F1B080: MOVEI #$00F1B178, R00 [NCZ:001, R00=00F1B178] -> [NCZ:001, R00=00F1B178]
+[STALL...]
+[STALL...]
+F1B086: LOAD (R00), R01 [NCZ:001, R00=00F1B178, R01=00000000] -> [NCZ:001, R01=00000000]
+[STALL...]
+[STALL...]
+F1B088: OR R01, R01 [NCZ:001, R01=00000000, R01=00000000] -> [NCZ:001, R01=00000000, R01=00000000]
+F1B08A: JR z, F1B082 [NCZ:001] Branched!
+F1B08A: NOP [NCZ:001]
+[STALL...]
+F1B080: MOVEI #$00F1B178, R00 [NCZ:001, R00=00F1B178] -> [NCZ:001, R00=00F1B178]
+[STALL...]
+[STALL...]
+Write to DSP CTRL: 00002301 --> Starting to run at 00F1B088 by M68K...
+DSP: CPU -> DSP interrupt
+DSP: Generating interrupt #0... [PC will return to 00F1B088, R31 = 00F1CFE0]
+Write to DSP CTRL: 00000001 --> Starting to run at 00F1B000 by M68K...
+[STALL...]
+F1B000: MOVEI #$00F1B0D4, R30 [NCZ:001, R30=00F1B000] -> [NCZ:001, R30=00F1B0D4]
+[STALL...]
+[STALL...]
+F1B006: JUMP T, (R30) [NCZ:001, R30=00F1B0D4] Branched!
+F1B006: NOP [NCZ:001]
+[STALL...]
+F1B0D4: MOVEI #$00F1A100, R01 [NCZ:001, R01=00F1A100] -> [NCZ:001, R01=00F1A100]
+[STALL...]
+[STALL...]
+F1B0DA: LOAD (R01), R00 [NCZ:001, R01=00F1A100, R00=00004431] -> [NCZ:001, R00=00004039]
+F1B0DC: MOVEI #$00F1B0C8, R01 [NCZ:001, R01=00F1A100] -> [NCZ:001, R01=00F1B0C8]
+[STALL...]
+[STALL...]
+F1B0E2: LOAD (R01), R02 [NCZ:001, R01=00F1B0C8, R02=00000000] -> [NCZ:001, R02=00000001]
+F1B0E4: MOVEI #$00F1B0CC, R01 [NCZ:001, R01=00F1B0C8] -> [NCZ:001, R01=00F1B0CC]
+[STALL...]
+[STALL...]
+F1B0EA: LOAD (R01), R03 [NCZ:001, R01=00F1B0CC, R03=00F1B086] -> [NCZ:001, R03=00000064]
+F1B0EC: MOVEI #$00F1B0D0, R01 [NCZ:001, R01=00F1B0CC] -> [NCZ:001, R01=00F1B0D0]
+[STALL...]
+[STALL...]
+F1B0F2: LOAD (R01), R04 [NCZ:001, R01=00F1B0D0, R04=00000000] -> [NCZ:001, R04=00000008]
+F1B0F4: MOVEI #$00F1B0BC, R01 [NCZ:001, R01=00F1B0D0] -> [NCZ:001, R01=00F1B0BC]
+[STALL...]
+[STALL...]
+F1B0FA: ADD R04, R01 [NCZ:001, R04=00000008, R01=00F1B0BC] -> [NCZ:000, R04=00000008, R01=00F1B0C4]
+[STALL...]
+[STALL...]
+F1B0FC: LOAD (R01), R01 [NCZ:000, R01=00F1B0C4, R01=00F1B0C4] -> [NCZ:000, R01=00F1B12E]
+[STALL...]
+[STALL...]
+F1B0FE: JUMP T, (R01) [NCZ:000, R01=00F1B12E] Branched!
+F1B0FE: NOP [NCZ:000]
+[STALL...]
+F1B12E: MOVE R02, R08 [NCZ:000, R02=00000001, R08=00000000] -> [NCZ:000, R02=00000001, R08=00000001]
+[STALL...]
+[STALL...]
+F1B132: MOVEI #$00F1B102, R01 [NCZ:000, R01=00F1B12E] -> [NCZ:000, R01=00F1B102]
+[STALL...]
+[STALL...]
+F1B138: JUMP T, (R01) [NCZ:000, R01=00F1B102] Branched!
+F1B138: NOP [NCZ:000]
+[STALL...]
+F1B102: MOVEI #$00F1B0C8, R01 [NCZ:000, R01=00F1B102] -> [NCZ:000, R01=00F1B0C8]
+[STALL...]
+[STALL...]
+F1B108: STORE R08, (R01) [NCZ:000, R08=00000000, R01=00F1B0C8]
+F1B10A: MOVEI #$00F1B0D0, R01 [NCZ:000, R01=00F1B0C8] -> [NCZ:000, R01=00F1B0D0]
+F1B110: MOVEQ #0, R04 [NCZ:000, R04=00000008] -> [NCZ:000, R04=00000000]
+[STALL...]
+[STALL...]
+F1B112: STORE R04, (R01) [NCZ:000, R04=00000000, R01=00F1B0D0]
+F1B114: BCLR #3, R00 [NCZ:000, R00=00004039] -> [NCZ:000, R00=00004031]
+[STALL...]
+[STALL...]
+F1B116: BSET #9, R00 [NCZ:000, R00=00004031] -> [NCZ:000, R00=00004231]
+F1B118: LOAD (R31), R04 [NCZ:000, R31=00F1CFDC, R04=00000000] -> [NCZ:000, R04=00F1B086]
+F1B11A: MOVEI #$00F1CFE0, R31 [NCZ:000, R31=00F1CFDC] -> [NCZ:000, R31=00F1CFE0]
+[STALL...]
+F1B120: ADDQ #2, R04 [NCZ:000, R04=00F1B086] -> [NCZ:000, R04=00F1B088]
+F1B122: MOVEI #$00F1A100, R01 [NCZ:000, R01=00F1B0D0] -> [NCZ:000, R01=00F1A100]
+[STALL...]
+[STALL...]
+F1B128: STORE R00, (R01) [NCZ:000, R00=00004231, R01=00F1A100]
+DSP: Writing 00004231 to DSP_FLAGS by DSP (REGPAGE is set)...
+DSP: Finished interrupt.
+DSP: Generating interrupt #1... [PC will return to 00F1B12A, R31 = 00F1CFE0]
+[STALL...]
+F1B010: MOVEI #$00F1B1FC, R30 [NCZ:001, R30=00F1B010] -> [NCZ:001, R30=00F1B1FC]
+[STALL...]
+[STALL...]
+F1B016: JUMP T, (R30) [NCZ:001, R30=00F1B1FC] Branched!
+F1B016: NOP [NCZ:001]
+[STALL...]
+F1B1FC: MOVEI #$00F1A100, R01 [NCZ:001, R01=00F1A100] -> [NCZ:001, R01=00F1A100]
+*/
+
+uint32 pcQueue1[0x400];
+uint32 pcQPtr1 = 0;
+static uint32 prevR1;
+//Let's try a 3 stage pipeline....
+//Looks like 3 stage is correct, otherwise bad things happen...
+void DSPExecP2(int32 cycles)
+{
+ dsp_releaseTimeSlice_flag = 0;
+ dsp_in_exec++;
+
+ while (cycles > 0 && DSP_RUNNING)
+ {
+/*extern uint32 totalFrames;
+//F1B2F6: LOAD (R14+$04), R24 [NCZ:001, R14+$04=00F20018, R24=FFFFFFFF] -> Jaguar: Unknown word read at 00F20018 by DSP (M68K PC=00E32E)
+//-> 43 + 1 + 24 -> $2B + $01 + $18 -> 101011 00001 11000 -> 1010 1100 0011 1000 -> AC38
+//C470 -> 1100 0100 0111 0000 -> 110001 00011 10000 -> 49, 3, 16 -> STORE R16, (R14+$0C)
+//F1B140:
+if (totalFrames >= 377 && GET16(dsp_ram_8, 0x0002F6) == 0xAC38 && dsp_pc == 0xF1B140)
+{
+ doDSPDis = true;
+ WriteLog("Starting disassembly at frame #%u...\n", totalFrames);
+}
+if (dsp_pc == 0xF1B092)
+ doDSPDis = false;//*/
+/*if (totalFrames >= 373 && GET16(dsp_ram_8, 0x0002F6) == 0xAC38)
+ doDSPDis = true;//*/
+/*if (totalFrames >= 373 && dsp_pc == 0xF1B0A0)
+ doDSPDis = true;//*/
+/*if (dsp_pc == 0xF1B0A0)
+ doDSPDis = true;//*/
+/*if (dsp_pc == 0xF1B0D2) && dsp_reg[1] == 0x2140C)
+ doDSPDis = true;//*/
+//Two parter... (not sure how to write this)
+//if (dsp_pc == 0xF1B0D2)
+// prevR1 = dsp_reg[1];
+
+//F1B0D2: ADDQT #8, R01 [NCZ:000, R01=0002140C] -> [NCZ:000, R01=00021414]
+//F1B0D2: ADDQT #8, R01 [NCZ:000, R01=0002140C] -> [NCZ:000, R01=00021414]
+
+
+pcQueue1[pcQPtr1++] = dsp_pc;
+pcQPtr1 &= 0x3FF;
+
+if ((dsp_pc < 0xF1B000 || dsp_pc > 0xF1CFFF) && !doDSPDis)
+{
+ WriteLog("DSP: PC has stepped out of bounds...\n\nBacktrace:\n\n");
+ doDSPDis = true;
+
+ char buffer[512];
+
+ for(int i=0; i<0x400; i++)
+ {
+ dasmjag(JAGUAR_DSP, buffer, pcQueue1[(i + pcQPtr1) & 0x3FF]);
+ WriteLog("\t%08X: %s\n", pcQueue1[(i + pcQPtr1) & 0x3FF], buffer);
+ }
+ WriteLog("\n");
+}//*/
+ if (IMASKCleared) // If IMASK was cleared,
+ {
+#ifdef DSP_DEBUG_IRQ
+ WriteLog("DSP: Finished interrupt.\n");
+#endif
+ DSPHandleIRQs(); // See if any other interrupts are pending!
+ IMASKCleared = false;
+ }
+
+//if (dsp_flags & REGPAGE)
+// WriteLog(" --> REGPAGE has just been set!\n");
+#ifdef DSP_DEBUG_PL2
+if (doDSPDis)
+{
+WriteLog("DSPExecP: Pipeline status [PC=%08X]...\n", dsp_pc);
+WriteLog("\tR -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrRead].opcode, pipeline[plPtrRead].operand1, pipeline[plPtrRead].operand2, pipeline[plPtrRead].reg1, pipeline[plPtrRead].reg2, pipeline[plPtrRead].result, pipeline[plPtrRead].writebackRegister, dsp_opcode_str[pipeline[plPtrRead].opcode]);
+WriteLog("\tE -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrExec].opcode, pipeline[plPtrExec].operand1, pipeline[plPtrExec].operand2, pipeline[plPtrExec].reg1, pipeline[plPtrExec].reg2, pipeline[plPtrExec].result, pipeline[plPtrExec].writebackRegister, dsp_opcode_str[pipeline[plPtrExec].opcode]);
+WriteLog("\tW -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrWrite].opcode, pipeline[plPtrWrite].operand1, pipeline[plPtrWrite].operand2, pipeline[plPtrWrite].reg1, pipeline[plPtrWrite].reg2, pipeline[plPtrWrite].result, pipeline[plPtrWrite].writebackRegister, dsp_opcode_str[pipeline[plPtrWrite].opcode]);
+WriteLog(" --> Scoreboard: ");
+for(int i=0; i<32; i++)
+ WriteLog("%s ", scoreboard[i] ? "T" : "F");
+WriteLog("\n");
+}
+#endif
+ // Stage 1a: Instruction fetch
+ pipeline[plPtrRead].instruction = DSPReadWord(dsp_pc, DSP);
+ pipeline[plPtrRead].opcode = pipeline[plPtrRead].instruction >> 10;
+ pipeline[plPtrRead].operand1 = (pipeline[plPtrRead].instruction >> 5) & 0x1F;
+ pipeline[plPtrRead].operand2 = pipeline[plPtrRead].instruction & 0x1F;
+ if (pipeline[plPtrRead].opcode == 38)
+ pipeline[plPtrRead].result = (uint32)DSPReadWord(dsp_pc + 2, DSP)
+ | ((uint32)DSPReadWord(dsp_pc + 4, DSP) << 16);
+#ifdef DSP_DEBUG_PL2
+if (doDSPDis)
+{
+WriteLog("DSPExecP: Fetching instruction (%04X) from DSP_PC = %08X...\n", pipeline[plPtrRead].instruction, dsp_pc);
+WriteLog("DSPExecP: Pipeline status (after stage 1a) [PC=%08X]...\n", dsp_pc);
+WriteLog("\tR -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrRead].opcode, pipeline[plPtrRead].operand1, pipeline[plPtrRead].operand2, pipeline[plPtrRead].reg1, pipeline[plPtrRead].reg2, pipeline[plPtrRead].result, pipeline[plPtrRead].writebackRegister, dsp_opcode_str[pipeline[plPtrRead].opcode]);
+WriteLog("\tE -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrExec].opcode, pipeline[plPtrExec].operand1, pipeline[plPtrExec].operand2, pipeline[plPtrExec].reg1, pipeline[plPtrExec].reg2, pipeline[plPtrExec].result, pipeline[plPtrExec].writebackRegister, dsp_opcode_str[pipeline[plPtrExec].opcode]);
+WriteLog("\tW -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrWrite].opcode, pipeline[plPtrWrite].operand1, pipeline[plPtrWrite].operand2, pipeline[plPtrWrite].reg1, pipeline[plPtrWrite].reg2, pipeline[plPtrWrite].result, pipeline[plPtrWrite].writebackRegister, dsp_opcode_str[pipeline[plPtrWrite].opcode]);
+}
+#endif
+ // Stage 1b: Read registers
+//Small problem--when say LOAD or STORE (R14/5+$nn) is executed AFTER an instruction that
+//modifies R14/5, we don't check the scoreboard for R14/5 (and we need to!)... !!! FIX !!!
+//Ugly, but [DONE]
+//Another problem: Any sequential combination of LOAD and STORE operations will cause the
+//pipeline to stall, and we don't take care of that here. !!! FIX !!!
+ if ((scoreboard[pipeline[plPtrRead].operand1] && readAffected[pipeline[plPtrRead].opcode][0])
+ || (scoreboard[pipeline[plPtrRead].operand2] && readAffected[pipeline[plPtrRead].opcode][1])
+ || ((pipeline[plPtrRead].opcode == 43 || pipeline[plPtrRead].opcode == 58) && scoreboard[14])
+ || ((pipeline[plPtrRead].opcode == 44 || pipeline[plPtrRead].opcode == 59) && scoreboard[15])
+//Not sure that this is the best way to fix the LOAD/STORE problem... But it seems to
+//work--somewhat...
+ || (isLoadStore[pipeline[plPtrRead].opcode] && isLoadStore[pipeline[plPtrExec].opcode]))
+ // We have a hit in the scoreboard, so we have to stall the pipeline...
+#ifdef DSP_DEBUG_PL2
+{
+if (doDSPDis)
+{
+WriteLog(" --> Stalling pipeline: ");
+if (readAffected[pipeline[plPtrRead].opcode][0])
+ WriteLog("scoreboard[%u] = %s (reg 1) ", pipeline[plPtrRead].operand1, scoreboard[pipeline[plPtrRead].operand1] ? "true" : "false");
+if (readAffected[pipeline[plPtrRead].opcode][1])
+ WriteLog("scoreboard[%u] = %s (reg 2)", pipeline[plPtrRead].operand2, scoreboard[pipeline[plPtrRead].operand2] ? "true" : "false");
+WriteLog("\n");
+}
+#endif
+ pipeline[plPtrRead].opcode = PIPELINE_STALL;
+#ifdef DSP_DEBUG_PL2
+}
+#endif
+ else
+ {
+ pipeline[plPtrRead].reg1 = dsp_reg[pipeline[plPtrRead].operand1];
+ pipeline[plPtrRead].reg2 = dsp_reg[pipeline[plPtrRead].operand2];
+ pipeline[plPtrRead].writebackRegister = pipeline[plPtrRead].operand2; // Set it to RN
+
+ // Shouldn't we be more selective with the register scoreboarding?
+ // Yes, we should. !!! FIX !!! Kinda [DONE]
+#ifndef NEW_SCOREBOARD
+ scoreboard[pipeline[plPtrRead].operand2] = affectsScoreboard[pipeline[plPtrRead].opcode];
+#else
+//Hopefully this will fix the dual MOVEQ # problem...
+ scoreboard[pipeline[plPtrRead].operand2] += (affectsScoreboard[pipeline[plPtrRead].opcode] ? 1 : 0);
+#endif
+
+//Advance PC here??? Yes.
+ dsp_pc += (pipeline[plPtrRead].opcode == 38 ? 6 : 2);
+ }
+
+#ifdef DSP_DEBUG_PL2
+if (doDSPDis)
+{
+WriteLog("DSPExecP: Pipeline status (after stage 1b) [PC=%08X]...\n", dsp_pc);
+WriteLog("\tR -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrRead].opcode, pipeline[plPtrRead].operand1, pipeline[plPtrRead].operand2, pipeline[plPtrRead].reg1, pipeline[plPtrRead].reg2, pipeline[plPtrRead].result, pipeline[plPtrRead].writebackRegister, dsp_opcode_str[pipeline[plPtrRead].opcode]);
+WriteLog("\tE -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrExec].opcode, pipeline[plPtrExec].operand1, pipeline[plPtrExec].operand2, pipeline[plPtrExec].reg1, pipeline[plPtrExec].reg2, pipeline[plPtrExec].result, pipeline[plPtrExec].writebackRegister, dsp_opcode_str[pipeline[plPtrExec].opcode]);
+WriteLog("\tW -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrWrite].opcode, pipeline[plPtrWrite].operand1, pipeline[plPtrWrite].operand2, pipeline[plPtrWrite].reg1, pipeline[plPtrWrite].reg2, pipeline[plPtrWrite].result, pipeline[plPtrWrite].writebackRegister, dsp_opcode_str[pipeline[plPtrWrite].opcode]);
+}
+#endif
+ // Stage 2: Execute
+ if (pipeline[plPtrExec].opcode != PIPELINE_STALL)
+ {
+if (doDSPDis)
+ WriteLog("\t[inst=%02u][R28=%08X, alt R28=%08X, REGPAGE=%s]\n", pipeline[plPtrExec].opcode, dsp_reg[28], dsp_alternate_reg[28], (dsp_flags & REGPAGE ? "set" : "not set"));
+#ifdef DSP_DEBUG_PL2
+if (doDSPDis)
+{
+WriteLog("DSPExecP: About to execute opcode %s...\n", dsp_opcode_str[pipeline[plPtrExec].opcode]);
+}
+#endif
+//CC only!
+#ifdef DSP_DEBUG_CC
+lastExec = pipeline[plPtrExec].instruction;
+//WriteLog("[lastExec = %04X]\n", lastExec);
+#endif
+ cycles -= dsp_opcode_cycles[pipeline[plPtrExec].opcode];
+ dsp_opcode_use[pipeline[plPtrExec].opcode]++;
+ DSPOpcode[pipeline[plPtrExec].opcode]();
+//WriteLog(" --> Returned from execute. DSP_PC: %08X\n", dsp_pc);
+ }
+ else
+{
+//Let's not, until we do the stalling correctly...
+//But, we gotta while we're doing the comparison core...!
+//Or do we? cycles--;
+//Really, the whole thing is wrong. When the pipeline is correctly stuffed, most instructions
+//will execute in one clock cycle (others, like DIV, will likely not). So, the challenge is
+//to model this clock cycle behavior correctly...
+//Also, the pipeline stalls too much--mostly because the transparent writebacks at stage 3
+//don't affect the reads at stage 1...
+#ifdef DSP_DEBUG_STALL
+if (doDSPDis)
+ WriteLog("[STALL... DSP_PC = %08X]\n", dsp_pc);
+#endif
+}
+
+#ifdef DSP_DEBUG_PL2
+if (doDSPDis)
+{
+WriteLog("DSPExecP: Pipeline status (after stage 2) [PC=%08X]...\n", dsp_pc);
+WriteLog("\tR -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrRead].opcode, pipeline[plPtrRead].operand1, pipeline[plPtrRead].operand2, pipeline[plPtrRead].reg1, pipeline[plPtrRead].reg2, pipeline[plPtrRead].result, pipeline[plPtrRead].writebackRegister, dsp_opcode_str[pipeline[plPtrRead].opcode]);
+WriteLog("\tE -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrExec].opcode, pipeline[plPtrExec].operand1, pipeline[plPtrExec].operand2, pipeline[plPtrExec].reg1, pipeline[plPtrExec].reg2, pipeline[plPtrExec].result, pipeline[plPtrExec].writebackRegister, dsp_opcode_str[pipeline[plPtrExec].opcode]);
+WriteLog("\tW -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrWrite].opcode, pipeline[plPtrWrite].operand1, pipeline[plPtrWrite].operand2, pipeline[plPtrWrite].reg1, pipeline[plPtrWrite].reg2, pipeline[plPtrWrite].result, pipeline[plPtrWrite].writebackRegister, dsp_opcode_str[pipeline[plPtrWrite].opcode]);
+WriteLog("\n");
+}
+#endif
+ // Stage 3: Write back register/memory address
+ if (pipeline[plPtrWrite].opcode != PIPELINE_STALL)
+ {
+/*if (pipeline[plPtrWrite].writebackRegister == 3
+ && (pipeline[plPtrWrite].result < 0xF14000 || pipeline[plPtrWrite].result > 0xF1CFFF)
+ && !doDSPDis)
+{
+ WriteLog("DSP: Register R03 has stepped out of bounds...\n\n");
+ doDSPDis = true;
+}//*/
+ if (pipeline[plPtrWrite].writebackRegister != 0xFF)
+ {
+ if (pipeline[plPtrWrite].writebackRegister != 0xFE)
+ dsp_reg[pipeline[plPtrWrite].writebackRegister] = pipeline[plPtrWrite].result;
+ else
+ {
+ if (pipeline[plPtrWrite].type == TYPE_BYTE)
+ JaguarWriteByte(pipeline[plPtrWrite].address, pipeline[plPtrWrite].value);
+ else if (pipeline[plPtrWrite].type == TYPE_WORD)
+ JaguarWriteWord(pipeline[plPtrWrite].address, pipeline[plPtrWrite].value);
+ else
+ JaguarWriteLong(pipeline[plPtrWrite].address, pipeline[plPtrWrite].value);
+ }
+ }
+
+#ifndef NEW_SCOREBOARD
+ if (affectsScoreboard[pipeline[plPtrWrite].opcode])
+ scoreboard[pipeline[plPtrWrite].operand2] = false;
+#else
+//Yup, sequential MOVEQ # problem fixing (I hope!)...
+ if (affectsScoreboard[pipeline[plPtrWrite].opcode])
+ if (scoreboard[pipeline[plPtrWrite].operand2])
+ scoreboard[pipeline[plPtrWrite].operand2]--;
+#endif
+ }
+
+ // Push instructions through the pipeline...
+ plPtrRead = (++plPtrRead) & 0x03;
+ plPtrExec = (++plPtrExec) & 0x03;
+ plPtrWrite = (++plPtrWrite) & 0x03;
+ }
+
+ dsp_in_exec--;
+}
+
+
+
+/*
+//#define DSP_DEBUG_PL3
+//Let's try a 2 stage pipeline....
+void DSPExecP3(int32 cycles)
+{
+ dsp_releaseTimeSlice_flag = 0;
+ dsp_in_exec++;
+
+ while (cycles > 0 && DSP_RUNNING)
+ {
+//if (dsp_pc < 0xF1B000 || dsp_pc > 0xF1CFFF)
+// doDSPDis = true;
+#ifdef DSP_DEBUG_PL3
+WriteLog("DSPExecP: Pipeline status...\n");
+WriteLog("\tF/R -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrRead].opcode, pipeline[plPtrRead].operand1, pipeline[plPtrRead].operand2, pipeline[plPtrRead].reg1, pipeline[plPtrRead].reg2, pipeline[plPtrRead].result, pipeline[plPtrRead].writebackRegister, dsp_opcode_str[pipeline[plPtrRead].opcode]);
+WriteLog("\tE/W -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrExec].opcode, pipeline[plPtrExec].operand1, pipeline[plPtrExec].operand2, pipeline[plPtrExec].reg1, pipeline[plPtrExec].reg2, pipeline[plPtrExec].result, pipeline[plPtrExec].writebackRegister, dsp_opcode_str[pipeline[plPtrExec].opcode]);
+WriteLog(" --> Scoreboard: ");
+for(int i=0; i<32; i++)
+ WriteLog("%s ", scoreboard[i] ? "T" : "F");
+WriteLog("\n");
+#endif
+ // Stage 1a: Instruction fetch
+ pipeline[plPtrRead].instruction = DSPReadWord(dsp_pc, DSP);
+ pipeline[plPtrRead].opcode = pipeline[plPtrRead].instruction >> 10;
+ pipeline[plPtrRead].operand1 = (pipeline[plPtrRead].instruction >> 5) & 0x1F;
+ pipeline[plPtrRead].operand2 = pipeline[plPtrRead].instruction & 0x1F;
+ if (pipeline[plPtrRead].opcode == 38)
+ pipeline[plPtrRead].result = (uint32)DSPReadWord(dsp_pc + 2, DSP)
+ | ((uint32)DSPReadWord(dsp_pc + 4, DSP) << 16);
+#ifdef DSP_DEBUG_PL3
+WriteLog("DSPExecP: Fetching instruction (%04X) from DSP_PC = %08X...\n", pipeline[plPtrRead].instruction, dsp_pc);
+WriteLog("DSPExecP: Pipeline status (after stage 1a)...\n");
+WriteLog("\tF/R -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrRead].opcode, pipeline[plPtrRead].operand1, pipeline[plPtrRead].operand2, pipeline[plPtrRead].reg1, pipeline[plPtrRead].reg2, pipeline[plPtrRead].result, pipeline[plPtrRead].writebackRegister, dsp_opcode_str[pipeline[plPtrRead].opcode]);
+WriteLog("\tE/W -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrExec].opcode, pipeline[plPtrExec].operand1, pipeline[plPtrExec].operand2, pipeline[plPtrExec].reg1, pipeline[plPtrExec].reg2, pipeline[plPtrExec].result, pipeline[plPtrExec].writebackRegister, dsp_opcode_str[pipeline[plPtrExec].opcode]);
+#endif
+ // Stage 1b: Read registers
+ if ((scoreboard[pipeline[plPtrRead].operand1] && readAffected[pipeline[plPtrRead].opcode][0])
+ || (scoreboard[pipeline[plPtrRead].operand2] && readAffected[pipeline[plPtrRead].opcode][1]))
+ // We have a hit in the scoreboard, so we have to stall the pipeline...
+#ifdef DSP_DEBUG_PL3
+{
+WriteLog(" --> Stalling pipeline: ");
+if (readAffected[pipeline[plPtrRead].opcode][0])
+ WriteLog("scoreboard[%u] = %s (reg 1) ", pipeline[plPtrRead].operand1, scoreboard[pipeline[plPtrRead].operand1] ? "true" : "false");
+if (readAffected[pipeline[plPtrRead].opcode][1])
+ WriteLog("scoreboard[%u] = %s (reg 2)", pipeline[plPtrRead].operand2, scoreboard[pipeline[plPtrRead].operand2] ? "true" : "false");
+WriteLog("\n");
+#endif
+ pipeline[plPtrRead].opcode = PIPELINE_STALL;
+#ifdef DSP_DEBUG_PL3
+}
+#endif
+ else
+ {
+ pipeline[plPtrRead].reg1 = dsp_reg[pipeline[plPtrRead].operand1];
+ pipeline[plPtrRead].reg2 = dsp_reg[pipeline[plPtrRead].operand2];
+ pipeline[plPtrRead].writebackRegister = pipeline[plPtrRead].operand2; // Set it to RN
+
+ // Shouldn't we be more selective with the register scoreboarding?
+ // Yes, we should. !!! FIX !!! [Kinda DONE]
+ scoreboard[pipeline[plPtrRead].operand2] = affectsScoreboard[pipeline[plPtrRead].opcode];
+
+//Advance PC here??? Yes.
+ dsp_pc += (pipeline[plPtrRead].opcode == 38 ? 6 : 2);
+ }
+
+#ifdef DSP_DEBUG_PL3
+WriteLog("DSPExecP: Pipeline status (after stage 1b)...\n");
+WriteLog("\tF/R -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrRead].opcode, pipeline[plPtrRead].operand1, pipeline[plPtrRead].operand2, pipeline[plPtrRead].reg1, pipeline[plPtrRead].reg2, pipeline[plPtrRead].result, pipeline[plPtrRead].writebackRegister, dsp_opcode_str[pipeline[plPtrRead].opcode]);
+WriteLog("\tE/W -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrExec].opcode, pipeline[plPtrExec].operand1, pipeline[plPtrExec].operand2, pipeline[plPtrExec].reg1, pipeline[plPtrExec].reg2, pipeline[plPtrExec].result, pipeline[plPtrExec].writebackRegister, dsp_opcode_str[pipeline[plPtrExec].opcode]);
+#endif
+ // Stage 2a: Execute
+ if (pipeline[plPtrExec].opcode != PIPELINE_STALL)
+ {
+#ifdef DSP_DEBUG_PL3
+WriteLog("DSPExecP: About to execute opcode %s...\n", dsp_opcode_str[pipeline[plPtrExec].opcode]);
+#endif
+ DSPOpcode[pipeline[plPtrExec].opcode]();
+ dsp_opcode_use[pipeline[plPtrExec].opcode]++;
+ cycles -= dsp_opcode_cycles[pipeline[plPtrExec].opcode];
+ }
+ else
+ cycles--;
+
+#ifdef DSP_DEBUG_PL3
+WriteLog("DSPExecP: Pipeline status (after stage 2a)...\n");
+WriteLog("\tF/R -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrRead].opcode, pipeline[plPtrRead].operand1, pipeline[plPtrRead].operand2, pipeline[plPtrRead].reg1, pipeline[plPtrRead].reg2, pipeline[plPtrRead].result, pipeline[plPtrRead].writebackRegister, dsp_opcode_str[pipeline[plPtrRead].opcode]);
+WriteLog("\tE/W -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", pipeline[plPtrExec].opcode, pipeline[plPtrExec].operand1, pipeline[plPtrExec].operand2, pipeline[plPtrExec].reg1, pipeline[plPtrExec].reg2, pipeline[plPtrExec].result, pipeline[plPtrExec].writebackRegister, dsp_opcode_str[pipeline[plPtrExec].opcode]);
+WriteLog("\n");
+#endif
+ // Stage 2b: Write back register
+ if (pipeline[plPtrExec].opcode != PIPELINE_STALL)
+ {
+ if (pipeline[plPtrExec].writebackRegister != 0xFF)
+ dsp_reg[pipeline[plPtrExec].writebackRegister] = pipeline[plPtrExec]..result;
+
+ if (affectsScoreboard[pipeline[plPtrExec].opcode])
+ scoreboard[pipeline[plPtrExec].operand2] = false;
+ }
+
+ // Push instructions through the pipeline...
+ plPtrRead = (++plPtrRead) & 0x03;
+ plPtrExec = (++plPtrExec) & 0x03;
+ }
+
+ dsp_in_exec--;
+}*/
+
+//
+// DSP pipelined opcode handlers
+//
+
+#define PRM pipeline[plPtrExec].reg1
+#define PRN pipeline[plPtrExec].reg2
+#define PIMM1 pipeline[plPtrExec].operand1
+#define PIMM2 pipeline[plPtrExec].operand2
+#define PRES pipeline[plPtrExec].result
+#define PWBR pipeline[plPtrExec].writebackRegister
+#define NO_WRITEBACK pipeline[plPtrExec].writebackRegister = 0xFF
+//#define DSP_PPC dsp_pc - (pipeline[plPtrRead].opcode == 38 ? 6 : 2) - (pipeline[plPtrExec].opcode == 38 ? 6 : 2)
+#define DSP_PPC dsp_pc - (pipeline[plPtrRead].opcode == 38 ? 6 : (pipeline[plPtrRead].opcode == PIPELINE_STALL ? 0 : 2)) - (pipeline[plPtrExec].opcode == 38 ? 6 : (pipeline[plPtrExec].opcode == PIPELINE_STALL ? 0 : 2))
+#define WRITEBACK_ADDR pipeline[plPtrExec].writebackRegister = 0xFE
+
+static void DSP_abs(void)
+{
+#ifdef DSP_DIS_ABS
+ if (doDSPDis)
+ WriteLog("%06X: ABS R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ uint32 _Rn = PRN;
+
+ if (_Rn == 0x80000000)
+ dsp_flag_n = 1;
+ else
+ {
+ dsp_flag_c = ((_Rn & 0x80000000) >> 31);
+ PRES = (_Rn & 0x80000000 ? -_Rn : _Rn);
+ CLR_ZN; SET_Z(PRES);
+ }
+#ifdef DSP_DIS_ABS
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_add(void)
+{
+#ifdef DSP_DIS_ADD
+ if (doDSPDis)
+ WriteLog("%06X: ADD R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ uint32 res = PRN + PRM;
+ SET_ZNC_ADD(PRN, PRM, res);
+ PRES = res;
+#ifdef DSP_DIS_ADD
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRES);
+#endif
+}
+
+static void DSP_addc(void)
+{
+#ifdef DSP_DIS_ADDC
+ if (doDSPDis)
+ WriteLog("%06X: ADDC R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ uint32 res = PRN + PRM + dsp_flag_c;
+ uint32 carry = dsp_flag_c;
+// SET_ZNC_ADD(PRN, PRM, res); //???BUG??? Yes!
+ SET_ZNC_ADD(PRN + carry, PRM, res);
+// SET_ZNC_ADD(PRN, PRM + carry, res);
+ PRES = res;
+#ifdef DSP_DIS_ADDC
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRES);
+#endif
+}
+
+static void DSP_addq(void)
+{
+#ifdef DSP_DIS_ADDQ
+ if (doDSPDis)
+ WriteLog("%06X: ADDQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, dsp_convert_zero[PIMM1], PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ uint32 r1 = dsp_convert_zero[PIMM1];
+ uint32 res = PRN + r1;
+ CLR_ZNC; SET_ZNC_ADD(PRN, r1, res);
+ PRES = res;
+#ifdef DSP_DIS_ADDQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_addqmod(void)
+{
+#ifdef DSP_DIS_ADDQMOD
+ if (doDSPDis)
+ WriteLog("%06X: ADDQMOD #%u, R%02u [NCZ:%u%u%u, R%02u=%08X, DSP_MOD=%08X] -> ", DSP_PPC, dsp_convert_zero[PIMM1], PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN, dsp_modulo);
+#endif
+ uint32 r1 = dsp_convert_zero[PIMM1];
+ uint32 r2 = PRN;
+ uint32 res = r2 + r1;
+ res = (res & (~dsp_modulo)) | (r2 & dsp_modulo);
+ PRES = res;
+ SET_ZNC_ADD(r2, r1, res);
+#ifdef DSP_DIS_ADDQMOD
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_addqt(void)
+{
+#ifdef DSP_DIS_ADDQT
+ if (doDSPDis)
+ WriteLog("%06X: ADDQT #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, dsp_convert_zero[PIMM1], PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ PRES = PRN + dsp_convert_zero[PIMM1];
+#ifdef DSP_DIS_ADDQT
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_and(void)
+{
+#ifdef DSP_DIS_AND
+ if (doDSPDis)
+ WriteLog("%06X: AND R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ PRES = PRN & PRM;
+ SET_ZN(PRES);
+#ifdef DSP_DIS_AND
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRES);
+#endif
+}
+
+static void DSP_bclr(void)
+{
+#ifdef DSP_DIS_BCLR
+ if (doDSPDis)
+ WriteLog("%06X: BCLR #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ PRES = PRN & ~(1 << PIMM1);
+ SET_ZN(PRES);
+#ifdef DSP_DIS_BCLR
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_bset(void)
+{
+#ifdef DSP_DIS_BSET
+ if (doDSPDis)
+ WriteLog("%06X: BSET #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ PRES = PRN | (1 << PIMM1);
+ SET_ZN(PRES);
+#ifdef DSP_DIS_BSET
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_btst(void)
+{
+#ifdef DSP_DIS_BTST
+ if (doDSPDis)
+ WriteLog("%06X: BTST #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ dsp_flag_z = (~PRN >> PIMM1) & 1;
+ NO_WRITEBACK;
+#ifdef DSP_DIS_BTST
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+}
+
+static void DSP_cmp(void)
+{
+#ifdef DSP_DIS_CMP
+ if (doDSPDis)
+ WriteLog("%06X: CMP R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ uint32 res = PRN - PRM;
+ SET_ZNC_SUB(PRN, PRM, res);
+ NO_WRITEBACK;
+#ifdef DSP_DIS_CMP
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z);
+#endif
+}
+
+static void DSP_cmpq(void)
+{
+ static int32 sqtable[32] =
+ { 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1 };
+#ifdef DSP_DIS_CMPQ
+ if (doDSPDis)
+ WriteLog("%06X: CMPQ #%d, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, sqtable[PIMM1], PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ uint32 r1 = sqtable[PIMM1 & 0x1F]; // I like this better -> (INT8)(jaguar.op >> 2) >> 3;
+ uint32 res = PRN - r1;
+ SET_ZNC_SUB(PRN, r1, res);
+ NO_WRITEBACK;
+#ifdef DSP_DIS_CMPQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z);
+#endif
+}
+
+static void DSP_div(void)
+{
+ uint32 _Rm = PRM, _Rn = PRN;
+
+ if (_Rm)
+ {
+ if (dsp_div_control & 1)
+ {
+ dsp_remain = (((uint64)_Rn) << 16) % _Rm;
+ if (dsp_remain & 0x80000000)
+ dsp_remain -= _Rm;
+ PRES = (((uint64)_Rn) << 16) / _Rm;
+ }
+ else
+ {
+ dsp_remain = _Rn % _Rm;
+ if (dsp_remain & 0x80000000)
+ dsp_remain -= _Rm;
+ PRES = PRN / _Rm;
+ }
+ }
+ else
+ PRES = 0xFFFFFFFF;
+}
+
+static void DSP_imacn(void)
+{
+#ifdef DSP_DIS_IMACN
+ if (doDSPDis)
+ WriteLog("%06X: IMACN R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ int32 res = (int16)PRM * (int16)PRN;
+ dsp_acc += (int64)res;
+//Should we AND the result to fit into 40 bits here???
+ NO_WRITEBACK;
+#ifdef DSP_DIS_IMACN
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, DSP_ACC=%02X%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, (uint8)(dsp_acc >> 32), (uint32)(dsp_acc & 0xFFFFFFFF));
+#endif
+}
+
+static void DSP_imult(void)
+{
+#ifdef DSP_DIS_IMULT
+ if (doDSPDis)
+ WriteLog("%06X: IMULT R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ PRES = (int16)PRN * (int16)PRM;
+ SET_ZN(PRES);
+#ifdef DSP_DIS_IMULT
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRES);
+#endif
+}
+
+static void DSP_imultn(void)
+{
+#ifdef DSP_DIS_IMULTN
+ if (doDSPDis)
+ WriteLog("%06X: IMULTN R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ // This is OK, since this multiply won't overflow 32 bits...
+ int32 res = (int32)((int16)PRN * (int16)PRM);
+ dsp_acc = (int64)res;
+ SET_ZN(res);
+ NO_WRITEBACK;
+#ifdef DSP_DIS_IMULTN
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, DSP_ACC=%02X%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, (uint8)(dsp_acc >> 32), (uint32)(dsp_acc & 0xFFFFFFFF));
+#endif
+}
+
+static void DSP_illegal(void)
+{
+#ifdef DSP_DIS_ILLEGAL
+ if (doDSPDis)
+ WriteLog("%06X: ILLEGAL [NCZ:%u%u%u]\n", DSP_PPC, dsp_flag_n, dsp_flag_c, dsp_flag_z);
+#endif
+ NO_WRITEBACK;
+}
+
+// There is a problem here with interrupt handlers the JUMP and JR instructions that
+// can cause trouble because an interrupt can occur *before* the instruction following the
+// jump can execute... !!! FIX !!!
+// This can probably be solved by judicious coding in the pipeline execution core...
+// And should be fixed now...
+static void DSP_jr(void)
+{
+#ifdef DSP_DIS_JR
+const char * condition[32] =
+{ "T", "nz", "z", "???", "nc", "nc nz", "nc z", "???", "c", "c nz",
+ "c z", "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "nn", "nn nz", "nn z", "???", "n", "n nz", "n z", "???",
+ "???", "???", "???", "F" };
+ if (doDSPDis)
+//How come this is always off by 2???
+ WriteLog("%06X: JR %s, %06X [NCZ:%u%u%u] ", DSP_PPC, condition[PIMM2], DSP_PPC+((PIMM1 & 0x10 ? 0xFFFFFFF0 | PIMM1 : PIMM1) * 2)+2, dsp_flag_n, dsp_flag_c, dsp_flag_z);
+#endif
+ // KLUDGE: Used by BRANCH_CONDITION macro
+ uint32 jaguar_flags = (dsp_flag_n << 2) | (dsp_flag_c << 1) | dsp_flag_z;
+
+ if (BRANCH_CONDITION(PIMM2))
+ {
+#ifdef DSP_DIS_JR
+ if (doDSPDis)
+ WriteLog("Branched!\n");
+#endif
+ int32 offset = (PIMM1 & 0x10 ? 0xFFFFFFF0 | PIMM1 : PIMM1); // Sign extend PIMM1
+//Account for pipeline effects...
+ uint32 newPC = dsp_pc + (offset * 2) - (pipeline[plPtrRead].opcode == 38 ? 6 : (pipeline[plPtrRead].opcode == PIPELINE_STALL ? 0 : 2));
+//WriteLog(" --> Old PC: %08X, new PC: %08X\n", dsp_pc, newPC);
+
+ // Now that we've branched, we have to make sure that the following instruction
+ // is executed atomically with this one and then flush the pipeline before setting
+ // the new PC.
+
+ // Step 1: Handle writebacks at stage 3 of pipeline
+/* if (pipeline[plPtrWrite].opcode != PIPELINE_STALL)
+ {
+ if (pipeline[plPtrWrite].writebackRegister != 0xFF)
+ dsp_reg[pipeline[plPtrWrite].writebackRegister] = pipeline[plPtrWrite].result;
+
+ if (affectsScoreboard[pipeline[plPtrWrite].opcode])
+ scoreboard[pipeline[plPtrWrite].operand2] = false;
+ }//*/
+ if (pipeline[plPtrWrite].opcode != PIPELINE_STALL)
+ {
+ if (pipeline[plPtrWrite].writebackRegister != 0xFF)
+ {
+ if (pipeline[plPtrWrite].writebackRegister != 0xFE)
+ dsp_reg[pipeline[plPtrWrite].writebackRegister] = pipeline[plPtrWrite].result;
+ else
+ {
+ if (pipeline[plPtrWrite].type == TYPE_BYTE)
+ JaguarWriteByte(pipeline[plPtrWrite].address, pipeline[plPtrWrite].value);
+ else if (pipeline[plPtrWrite].type == TYPE_WORD)
+ JaguarWriteWord(pipeline[plPtrWrite].address, pipeline[plPtrWrite].value);
+ else
+ JaguarWriteLong(pipeline[plPtrWrite].address, pipeline[plPtrWrite].value);
+ }
+ }
+
+#ifndef NEW_SCOREBOARD
+ if (affectsScoreboard[pipeline[plPtrWrite].opcode])
+ scoreboard[pipeline[plPtrWrite].operand2] = false;
+#else
+//Yup, sequential MOVEQ # problem fixing (I hope!)...
+ if (affectsScoreboard[pipeline[plPtrWrite].opcode])
+ if (scoreboard[pipeline[plPtrWrite].operand2])
+ scoreboard[pipeline[plPtrWrite].operand2]--;
+#endif
+ }
+
+ // Step 2: Push instruction through pipeline & execute following instruction
+ // NOTE: By putting our following instruction at stage 3 of the pipeline,
+ // we effectively handle the final push of the instruction through the
+ // pipeline when the new PC takes effect (since when we return, the
+ // pipeline code will be executing the writeback stage. If we reverse
+ // the execution order of the pipeline stages, this will no longer be
+ // the case!)...
+ pipeline[plPtrExec] = pipeline[plPtrRead];
+//This is BAD. We need to get that next opcode and execute it!
+//NOTE: The problem is here because of a bad stall. Once those are fixed, we can probably
+// remove this crap.
+ if (pipeline[plPtrExec].opcode == PIPELINE_STALL)
+ {
+ uint16 instruction = DSPReadWord(dsp_pc, DSP);
+ pipeline[plPtrExec].opcode = instruction >> 10;
+ pipeline[plPtrExec].operand1 = (instruction >> 5) & 0x1F;
+ pipeline[plPtrExec].operand2 = instruction & 0x1F;
+ pipeline[plPtrExec].reg1 = dsp_reg[pipeline[plPtrExec].operand1];
+ pipeline[plPtrExec].reg2 = dsp_reg[pipeline[plPtrExec].operand2];
+ pipeline[plPtrExec].writebackRegister = pipeline[plPtrExec].operand2; // Set it to RN
+ }//*/
+ dsp_pc += 2; // For DSP_DIS_* accuracy
+ DSPOpcode[pipeline[plPtrExec].opcode]();
+ dsp_opcode_use[pipeline[plPtrExec].opcode]++;
+ pipeline[plPtrWrite] = pipeline[plPtrExec];
+
+ // Step 3: Flush pipeline & set new PC
+ pipeline[plPtrRead].opcode = pipeline[plPtrExec].opcode = PIPELINE_STALL;
+ dsp_pc = newPC;
+ }
+ else
+#ifdef DSP_DIS_JR
+ {
+ if (doDSPDis)
+ WriteLog("Branch NOT taken.\n");
+#endif
+ NO_WRITEBACK;
+#ifdef DSP_DIS_JR
+ }
+#endif
+// WriteLog(" --> DSP_PC: %08X\n", dsp_pc);
+}
+
+static void DSP_jump(void)
+{
+#ifdef DSP_DIS_JUMP
+const char * condition[32] =
+{ "T", "nz", "z", "???", "nc", "nc nz", "nc z", "???", "c", "c nz",
+ "c z", "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "nn", "nn nz", "nn z", "???", "n", "n nz", "n z", "???",
+ "???", "???", "???", "F" };
+ if (doDSPDis)
+ WriteLog("%06X: JUMP %s, (R%02u) [NCZ:%u%u%u, R%02u=%08X] ", DSP_PPC, condition[PIMM2], PIMM1, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM);
+#endif
+ // KLUDGE: Used by BRANCH_CONDITION macro
+ uint32 jaguar_flags = (dsp_flag_n << 2) | (dsp_flag_c << 1) | dsp_flag_z;
+
+ if (BRANCH_CONDITION(PIMM2))
+ {
+#ifdef DSP_DIS_JUMP
+ if (doDSPDis)
+ WriteLog("Branched!\n");
+#endif
+ uint32 PCSave = PRM;
+ // Now that we've branched, we have to make sure that the following instruction
+ // is executed atomically with this one and then flush the pipeline before setting
+ // the new PC.
+
+ // Step 1: Handle writebacks at stage 3 of pipeline
+/* if (pipeline[plPtrWrite].opcode != PIPELINE_STALL)
+ {
+ if (pipeline[plPtrWrite].writebackRegister != 0xFF)
+ dsp_reg[pipeline[plPtrWrite].writebackRegister] = pipeline[plPtrWrite].result;
+
+ if (affectsScoreboard[pipeline[plPtrWrite].opcode])
+ scoreboard[pipeline[plPtrWrite].operand2] = false;
+ }//*/
+ if (pipeline[plPtrWrite].opcode != PIPELINE_STALL)
+ {
+ if (pipeline[plPtrWrite].writebackRegister != 0xFF)
+ {
+ if (pipeline[plPtrWrite].writebackRegister != 0xFE)
+ dsp_reg[pipeline[plPtrWrite].writebackRegister] = pipeline[plPtrWrite].result;
+ else
+ {
+ if (pipeline[plPtrWrite].type == TYPE_BYTE)
+ JaguarWriteByte(pipeline[plPtrWrite].address, pipeline[plPtrWrite].value);
+ else if (pipeline[plPtrWrite].type == TYPE_WORD)
+ JaguarWriteWord(pipeline[plPtrWrite].address, pipeline[plPtrWrite].value);
+ else
+ JaguarWriteLong(pipeline[plPtrWrite].address, pipeline[plPtrWrite].value);
+ }
+ }
+
+#ifndef NEW_SCOREBOARD
+ if (affectsScoreboard[pipeline[plPtrWrite].opcode])
+ scoreboard[pipeline[plPtrWrite].operand2] = false;
+#else
+//Yup, sequential MOVEQ # problem fixing (I hope!)...
+ if (affectsScoreboard[pipeline[plPtrWrite].opcode])
+ if (scoreboard[pipeline[plPtrWrite].operand2])
+ scoreboard[pipeline[plPtrWrite].operand2]--;
+#endif
+ }
+
+ // Step 2: Push instruction through pipeline & execute following instruction
+ // NOTE: By putting our following instruction at stage 3 of the pipeline,
+ // we effectively handle the final push of the instruction through the
+ // pipeline when the new PC takes effect (since when we return, the
+ // pipeline code will be executing the writeback stage. If we reverse
+ // the execution order of the pipeline stages, this will no longer be
+ // the case!)...
+ pipeline[plPtrExec] = pipeline[plPtrRead];
+//This is BAD. We need to get that next opcode and execute it!
+//Also, same problem in JR!
+//NOTE: The problem is here because of a bad stall. Once those are fixed, we can probably
+// remove this crap.
+ if (pipeline[plPtrExec].opcode == PIPELINE_STALL)
+ {
+ uint16 instruction = DSPReadWord(dsp_pc, DSP);
+ pipeline[plPtrExec].opcode = instruction >> 10;
+ pipeline[plPtrExec].operand1 = (instruction >> 5) & 0x1F;
+ pipeline[plPtrExec].operand2 = instruction & 0x1F;
+ pipeline[plPtrExec].reg1 = dsp_reg[pipeline[plPtrExec].operand1];
+ pipeline[plPtrExec].reg2 = dsp_reg[pipeline[plPtrExec].operand2];
+ pipeline[plPtrExec].writebackRegister = pipeline[plPtrExec].operand2; // Set it to RN
+ }//*/
+ dsp_pc += 2; // For DSP_DIS_* accuracy
+ DSPOpcode[pipeline[plPtrExec].opcode]();
+ dsp_opcode_use[pipeline[plPtrExec].opcode]++;
+ pipeline[plPtrWrite] = pipeline[plPtrExec];
+
+ // Step 3: Flush pipeline & set new PC
+ pipeline[plPtrRead].opcode = pipeline[plPtrExec].opcode = PIPELINE_STALL;
+ dsp_pc = PCSave;
+ }
+ else
+#ifdef DSP_DIS_JUMP
+ {
+ if (doDSPDis)
+ WriteLog("Branch NOT taken.\n");
+#endif
+ NO_WRITEBACK;
+#ifdef DSP_DIS_JUMP
+ }
+#endif
+}
+
+static void DSP_load(void)
+{
+#ifdef DSP_DIS_LOAD
+ if (doDSPDis)
+ WriteLog("%06X: LOAD (R%02u), R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ PRES = DSPReadLong(PRM, DSP);
+#ifdef DSP_DIS_LOAD
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_loadb(void)
+{
+#ifdef DSP_DIS_LOADB
+ if (doDSPDis)
+ WriteLog("%06X: LOADB (R%02u), R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ if (PRM >= DSP_WORK_RAM_BASE && PRM <= (DSP_WORK_RAM_BASE + 0x1FFF))
+ PRES = DSPReadLong(PRM, DSP) & 0xFF;
+ else
+ PRES = JaguarReadByte(PRM, DSP);
+#ifdef DSP_DIS_LOADB
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_loadw(void)
+{
+#ifdef DSP_DIS_LOADW
+ if (doDSPDis)
+ WriteLog("%06X: LOADW (R%02u), R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ if (PRM >= DSP_WORK_RAM_BASE && PRM <= (DSP_WORK_RAM_BASE + 0x1FFF))
+ PRES = DSPReadLong(PRM, DSP) & 0xFFFF;
+ else
+ PRES = JaguarReadWord(PRM, DSP);
+#ifdef DSP_DIS_LOADW
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_load_r14_i(void)
+{
+#ifdef DSP_DIS_LOAD14I
+ if (doDSPDis)
+ WriteLog("%06X: LOAD (R14+$%02X), R%02u [NCZ:%u%u%u, R14+$%02X=%08X, R%02u=%08X] -> ", DSP_PPC, dsp_convert_zero[PIMM1] << 2, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, dsp_convert_zero[PIMM1] << 2, dsp_reg[14]+(dsp_convert_zero[PIMM1] << 2), PIMM2, PRN);
+#endif
+ PRES = DSPReadLong(dsp_reg[14] + (dsp_convert_zero[PIMM1] << 2), DSP);
+#ifdef DSP_DIS_LOAD14I
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_load_r14_r(void)
+{
+#ifdef DSP_DIS_LOAD14R
+ if (doDSPDis)
+ WriteLog("%06X: LOAD (R14+R%02u), R%02u [NCZ:%u%u%u, R14+R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM+dsp_reg[14], PIMM2, PRES);
+#endif
+ PRES = DSPReadLong(dsp_reg[14] + PRM, DSP);
+#ifdef DSP_DIS_LOAD14R
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_load_r15_i(void)
+{
+#ifdef DSP_DIS_LOAD15I
+ if (doDSPDis)
+ WriteLog("%06X: LOAD (R15+$%02X), R%02u [NCZ:%u%u%u, R15+$%02X=%08X, R%02u=%08X] -> ", DSP_PPC, dsp_convert_zero[PIMM1] << 2, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, dsp_convert_zero[PIMM1] << 2, dsp_reg[15]+(dsp_convert_zero[PIMM1] << 2), PIMM2, PRN);
+#endif
+ PRES = DSPReadLong(dsp_reg[15] + (dsp_convert_zero[PIMM1] << 2), DSP);
+#ifdef DSP_DIS_LOAD15I
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_load_r15_r(void)
+{
+#ifdef DSP_DIS_LOAD15R
+ if (doDSPDis)
+ WriteLog("%06X: LOAD (R15+R%02u), R%02u [NCZ:%u%u%u, R15+R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM+dsp_reg[15], PIMM2, PRN);
+#endif
+ PRES = DSPReadLong(dsp_reg[15] + PRM, DSP);
+#ifdef DSP_DIS_LOAD15R
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_mirror(void)
+{
+ uint32 r1 = PRN;
+ PRES = (mirror_table[r1 & 0xFFFF] << 16) | mirror_table[r1 >> 16];
+ SET_ZN(PRES);
+}
+
+static void DSP_mmult(void)
+{
+ int count = dsp_matrix_control&0x0f;
+ uint32 addr = dsp_pointer_to_matrix; // in the gpu ram
+ int64 accum = 0;
+ uint32 res;
+
+ if (!(dsp_matrix_control & 0x10))
+ {
+ for (int i = 0; i < count; i++)
+ {
+ int16 a;
+ if (i&0x01)
+ a=(int16)((dsp_alternate_reg[dsp_opcode_first_parameter + (i>>1)]>>16)&0xffff);
+ else
+ a=(int16)(dsp_alternate_reg[dsp_opcode_first_parameter + (i>>1)]&0xffff);
+ int16 b=((int16)DSPReadWord(addr + 2, DSP));
+ accum += a*b;
+ addr += 4;
+ }
+ }
+ else
+ {
+ for (int i = 0; i < count; i++)
+ {
+ int16 a;
+ if (i&0x01)
+ a=(int16)((dsp_alternate_reg[dsp_opcode_first_parameter + (i>>1)]>>16)&0xffff);
+ else
+ a=(int16)(dsp_alternate_reg[dsp_opcode_first_parameter + (i>>1)]&0xffff);
+ int16 b=((int16)DSPReadWord(addr + 2, DSP));
+ accum += a*b;
+ addr += 4 * count;
+ }
+ }
+
+ PRES = res = (int32)accum;
+ // carry flag to do
+//NOTE: The flags are set based upon the last add/multiply done...
+ SET_ZN(PRES);
+}
+
+static void DSP_move(void)
+{
+#ifdef DSP_DIS_MOVE
+ if (doDSPDis)
+ WriteLog("%06X: MOVE R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ PRES = PRM;
+#ifdef DSP_DIS_MOVE
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRES);
+#endif
+}
+
+static void DSP_movefa(void)
+{
+#ifdef DSP_DIS_MOVEFA
+ if (doDSPDis)
+// WriteLog("%06X: MOVEFA R%02u, R%02u [NCZ:%u%u%u, R%02u(alt)=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, ALTERNATE_RM, PIMM2, PRN);
+ WriteLog("%06X: MOVEFA R%02u, R%02u [NCZ:%u%u%u, R%02u(alt)=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, dsp_alternate_reg[PIMM1], PIMM2, PRN);
+#endif
+// PRES = ALTERNATE_RM;
+ PRES = dsp_alternate_reg[PIMM1];
+#ifdef DSP_DIS_MOVEFA
+ if (doDSPDis)
+// WriteLog("[NCZ:%u%u%u, R%02u(alt)=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, ALTERNATE_RM, PIMM2, PRN);
+ WriteLog("[NCZ:%u%u%u, R%02u(alt)=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, dsp_alternate_reg[PIMM1], PIMM2, PRES);
+#endif
+}
+
+static void DSP_movei(void)
+{
+#ifdef DSP_DIS_MOVEI
+ if (doDSPDis)
+ WriteLog("%06X: MOVEI #$%08X, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, PRES, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+// // This instruction is followed by 32-bit value in LSW / MSW format...
+// PRES = (uint32)DSPReadWord(dsp_pc, DSP) | ((uint32)DSPReadWord(dsp_pc + 2, DSP) << 16);
+// dsp_pc += 4;
+#ifdef DSP_DIS_MOVEI
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_movepc(void)
+{
+#ifdef DSP_DIS_MOVEPC
+ if (doDSPDis)
+ WriteLog("%06X: MOVE PC, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+//Need to fix this to take into account pipelining effects... !!! FIX !!! [DONE]
+// PRES = dsp_pc - 2;
+//Account for pipeline effects...
+ PRES = dsp_pc - 2 - (pipeline[plPtrRead].opcode == 38 ? 6 : (pipeline[plPtrRead].opcode == PIPELINE_STALL ? 0 : 2));
+#ifdef DSP_DIS_MOVEPC
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_moveq(void)
+{
+#ifdef DSP_DIS_MOVEQ
+ if (doDSPDis)
+ WriteLog("%06X: MOVEQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ PRES = PIMM1;
+#ifdef DSP_DIS_MOVEQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_moveta(void)
+{
+#ifdef DSP_DIS_MOVETA
+ if (doDSPDis)
+// WriteLog("%06X: MOVETA R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u(alt)=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, ALTERNATE_RN);
+ WriteLog("%06X: MOVETA R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u(alt)=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, dsp_alternate_reg[PIMM2]);
+#endif
+// ALTERNATE_RN = PRM;
+ dsp_alternate_reg[PIMM2] = PRM;
+ NO_WRITEBACK;
+#ifdef DSP_DIS_MOVETA
+ if (doDSPDis)
+// WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u(alt)=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, ALTERNATE_RN);
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u(alt)=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, dsp_alternate_reg[PIMM2]);
+#endif
+}
+
+static void DSP_mtoi(void)
+{
+ PRES = (((int32)PRM >> 8) & 0xFF800000) | (PRM & 0x007FFFFF);
+ SET_ZN(PRES);
+}
+
+static void DSP_mult(void)
+{
+#ifdef DSP_DIS_MULT
+ if (doDSPDis)
+ WriteLog("%06X: MULT R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ PRES = (uint16)PRM * (uint16)PRN;
+ SET_ZN(PRES);
+#ifdef DSP_DIS_MULT
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRES);
+#endif
+}
+
+static void DSP_neg(void)
+{
+#ifdef DSP_DIS_NEG
+ if (doDSPDis)
+ WriteLog("%06X: NEG R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ uint32 res = -PRN;
+ SET_ZNC_SUB(0, PRN, res);
+ PRES = res;
+#ifdef DSP_DIS_NEG
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_nop(void)
+{
+#ifdef DSP_DIS_NOP
+ if (doDSPDis)
+ WriteLog("%06X: NOP [NCZ:%u%u%u]\n", DSP_PPC, dsp_flag_n, dsp_flag_c, dsp_flag_z);
+#endif
+ NO_WRITEBACK;
+}
+
+static void DSP_normi(void)
+{
+ uint32 _Rm = PRM;
+ uint32 res = 0;
+
+ if (_Rm)
+ {
+ while ((_Rm & 0xffc00000) == 0)
+ {
+ _Rm <<= 1;
+ res--;
+ }
+ while ((_Rm & 0xff800000) != 0)
+ {
+ _Rm >>= 1;
+ res++;
+ }
+ }
+ PRES = res;
+ SET_ZN(PRES);
+}
+
+static void DSP_not(void)
+{
+#ifdef DSP_DIS_NOT
+ if (doDSPDis)
+ WriteLog("%06X: NOT R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ PRES = ~PRN;
+ SET_ZN(PRES);
+#ifdef DSP_DIS_NOT
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_or(void)
+{
+#ifdef DSP_DIS_OR
+ if (doDSPDis)
+ WriteLog("%06X: OR R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ PRES = PRN | PRM;
+ SET_ZN(PRES);
+#ifdef DSP_DIS_OR
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRES);
+#endif
+}
+
+static void DSP_resmac(void)
+{
+#ifdef DSP_DIS_RESMAC
+ if (doDSPDis)
+ WriteLog("%06X: RESMAC R%02u [NCZ:%u%u%u, R%02u=%08X, DSP_ACC=%02X%08X] -> ", DSP_PPC, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN, (uint8)(dsp_acc >> 32), (uint32)(dsp_acc & 0xFFFFFFFF));
+#endif
+ PRES = (uint32)dsp_acc;
+#ifdef DSP_DIS_RESMAC
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+}
+
+static void DSP_ror(void)
+{
+#ifdef DSP_DIS_ROR
+ if (doDSPDis)
+ WriteLog("%06X: ROR R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ uint32 r1 = PRM & 0x1F;
+ uint32 res = (PRN >> r1) | (PRN << (32 - r1));
+ SET_ZN(res); dsp_flag_c = (PRN >> 31) & 1;
+ PRES = res;
+#ifdef DSP_DIS_ROR
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRES);
+#endif
+}
+
+static void DSP_rorq(void)
+{
+#ifdef DSP_DIS_RORQ
+ if (doDSPDis)
+ WriteLog("%06X: RORQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, dsp_convert_zero[PIMM1], PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ uint32 r1 = dsp_convert_zero[PIMM1 & 0x1F];
+ uint32 r2 = PRN;
+ uint32 res = (r2 >> r1) | (r2 << (32 - r1));
+ PRES = res;
+ SET_ZN(res); dsp_flag_c = (r2 >> 31) & 0x01;
+#ifdef DSP_DIS_RORQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_sat16s(void)
+{
+ int32 r2 = PRN;
+ uint32 res = (r2 < -32768) ? -32768 : (r2 > 32767) ? 32767 : r2;
+ PRES = res;
+ SET_ZN(res);
+}
+
+static void DSP_sat32s(void)
+{
+ int32 r2 = (uint32)PRN;
+ int32 temp = dsp_acc >> 32;
+ uint32 res = (temp < -1) ? (int32)0x80000000 : (temp > 0) ? (int32)0x7FFFFFFF : r2;
+ PRES = res;
+ SET_ZN(res);
+}
+
+static void DSP_sh(void)
+{
+ int32 sRm = (int32)PRM;
+ uint32 _Rn = PRN;
+
+ if (sRm < 0)
+ {
+ uint32 shift = -sRm;
+
+ if (shift >= 32)
+ shift = 32;
+
+ dsp_flag_c = (_Rn & 0x80000000) >> 31;
+
+ while (shift)
+ {
+ _Rn <<= 1;
+ shift--;
+ }
+ }
+ else
+ {
+ uint32 shift = sRm;
+
+ if (shift >= 32)
+ shift = 32;
+
+ dsp_flag_c = _Rn & 0x1;
+
+ while (shift)
+ {
+ _Rn >>= 1;
+ shift--;
+ }
+ }
+
+ PRES = _Rn;
+ SET_ZN(PRES);
+}
+
+static void DSP_sha(void)
+{
+ int32 sRm = (int32)PRM;
+ uint32 _Rn = PRN;
+
+ if (sRm < 0)
+ {
+ uint32 shift = -sRm;
+
+ if (shift >= 32)
+ shift = 32;
+
+ dsp_flag_c = (_Rn & 0x80000000) >> 31;
+
+ while (shift)
+ {
+ _Rn <<= 1;
+ shift--;
+ }
+ }
+ else
+ {
+ uint32 shift = sRm;
+
+ if (shift >= 32)
+ shift = 32;
+
+ dsp_flag_c = _Rn & 0x1;
+
+ while (shift)
+ {
+ _Rn = ((int32)_Rn) >> 1;
+ shift--;
+ }
+ }
+
+ PRES = _Rn;
+ SET_ZN(PRES);
+}
+
+static void DSP_sharq(void)
+{
+#ifdef DSP_DIS_SHARQ
+ if (doDSPDis)
+ WriteLog("%06X: SHARQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, dsp_convert_zero[PIMM1], PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ uint32 res = (int32)PRN >> dsp_convert_zero[PIMM1];
+ SET_ZN(res); dsp_flag_c = PRN & 0x01;
+ PRES = res;
+#ifdef DSP_DIS_SHARQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_shlq(void)
+{
+#ifdef DSP_DIS_SHLQ
+ if (doDSPDis)
+ WriteLog("%06X: SHLQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, 32 - PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ int32 r1 = 32 - PIMM1;
+ uint32 res = PRN << r1;
+ SET_ZN(res); dsp_flag_c = (PRN >> 31) & 1;
+ PRES = res;
+#ifdef DSP_DIS_SHLQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_shrq(void)
+{
+#ifdef DSP_DIS_SHRQ
+ if (doDSPDis)
+ WriteLog("%06X: SHRQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, dsp_convert_zero[PIMM1], PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ int32 r1 = dsp_convert_zero[PIMM1];
+ uint32 res = PRN >> r1;
+ SET_ZN(res); dsp_flag_c = PRN & 1;
+ PRES = res;
+#ifdef DSP_DIS_SHRQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_store(void)
+{
+#ifdef DSP_DIS_STORE
+ if (doDSPDis)
+ WriteLog("%06X: STORE R%02u, (R%02u) [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", DSP_PPC, PIMM2, PIMM1, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN, PIMM1, PRM);
+#endif
+// DSPWriteLong(PRM, PRN, DSP);
+// NO_WRITEBACK;
+ pipeline[plPtrExec].address = PRM;
+ pipeline[plPtrExec].value = PRN;
+ pipeline[plPtrExec].type = TYPE_DWORD;
+ WRITEBACK_ADDR;
+}
+
+static void DSP_storeb(void)
+{
+#ifdef DSP_DIS_STOREB
+ if (doDSPDis)
+ WriteLog("%06X: STOREB R%02u, (R%02u) [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", DSP_PPC, PIMM2, PIMM1, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN, PIMM1, PRM);
+#endif
+// if (PRM >= DSP_WORK_RAM_BASE && PRM <= (DSP_WORK_RAM_BASE + 0x1FFF))
+// DSPWriteLong(PRM, PRN & 0xFF, DSP);
+// else
+// JaguarWriteByte(PRM, PRN, DSP);
+//
+// NO_WRITEBACK;
+ pipeline[plPtrExec].address = PRM;
+
+ if (PRM >= DSP_WORK_RAM_BASE && PRM <= (DSP_WORK_RAM_BASE + 0x1FFF))
+ {
+ pipeline[plPtrExec].value = PRN & 0xFF;
+ pipeline[plPtrExec].type = TYPE_DWORD;
+ }
+ else
+ {
+ pipeline[plPtrExec].value = PRN;
+ pipeline[plPtrExec].type = TYPE_BYTE;
+ }
+
+ WRITEBACK_ADDR;
+}
+
+static void DSP_storew(void)
+{
+#ifdef DSP_DIS_STOREW
+ if (doDSPDis)
+ WriteLog("%06X: STOREW R%02u, (R%02u) [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", DSP_PPC, PIMM2, PIMM1, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN, PIMM1, PRM);
+#endif
+// if (PRM >= DSP_WORK_RAM_BASE && PRM <= (DSP_WORK_RAM_BASE + 0x1FFF))
+// DSPWriteLong(PRM, PRN & 0xFFFF, DSP);
+// else
+// JaguarWriteWord(PRM, PRN, DSP);
+//
+// NO_WRITEBACK;
+ pipeline[plPtrExec].address = PRM;
+
+ if (PRM >= DSP_WORK_RAM_BASE && PRM <= (DSP_WORK_RAM_BASE + 0x1FFF))
+ {
+ pipeline[plPtrExec].value = PRN & 0xFFFF;
+ pipeline[plPtrExec].type = TYPE_DWORD;
+ }
+ else
+ {
+ pipeline[plPtrExec].value = PRN;
+ pipeline[plPtrExec].type = TYPE_WORD;
+ }
+ WRITEBACK_ADDR;
+}
+
+static void DSP_store_r14_i(void)
+{
+#ifdef DSP_DIS_STORE14I
+ if (doDSPDis)
+ WriteLog("%06X: STORE R%02u, (R14+$%02X) [NCZ:%u%u%u, R%02u=%08X, R14+$%02X=%08X]\n", DSP_PPC, PIMM2, dsp_convert_zero[PIMM1] << 2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN, dsp_convert_zero[PIMM1] << 2, dsp_reg[14]+(dsp_convert_zero[PIMM1] << 2));
+#endif
+// DSPWriteLong(dsp_reg[14] + (dsp_convert_zero[PIMM1] << 2), PRN, DSP);
+// NO_WRITEBACK;
+ pipeline[plPtrExec].address = dsp_reg[14] + (dsp_convert_zero[PIMM1] << 2);
+ pipeline[plPtrExec].value = PRN;
+ pipeline[plPtrExec].type = TYPE_DWORD;
+ WRITEBACK_ADDR;
+}
+
+static void DSP_store_r14_r(void)
+{
+// DSPWriteLong(dsp_reg[14] + PRM, PRN, DSP);
+// NO_WRITEBACK;
+ pipeline[plPtrExec].address = dsp_reg[14] + PRM;
+ pipeline[plPtrExec].value = PRN;
+ pipeline[plPtrExec].type = TYPE_DWORD;
+ WRITEBACK_ADDR;
+}
+
+static void DSP_store_r15_i(void)
+{
+#ifdef DSP_DIS_STORE15I
+ if (doDSPDis)
+ WriteLog("%06X: STORE R%02u, (R15+$%02X) [NCZ:%u%u%u, R%02u=%08X, R15+$%02X=%08X]\n", DSP_PPC, PIMM2, dsp_convert_zero[PIMM1] << 2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN, dsp_convert_zero[PIMM1] << 2, dsp_reg[15]+(dsp_convert_zero[PIMM1] << 2));
+#endif
+// DSPWriteLong(dsp_reg[15] + (dsp_convert_zero[PIMM1] << 2), PRN, DSP);
+// NO_WRITEBACK;
+ pipeline[plPtrExec].address = dsp_reg[15] + (dsp_convert_zero[PIMM1] << 2);
+ pipeline[plPtrExec].value = PRN;
+ pipeline[plPtrExec].type = TYPE_DWORD;
+ WRITEBACK_ADDR;
+}
+
+static void DSP_store_r15_r(void)
+{
+// DSPWriteLong(dsp_reg[15] + PRM, PRN, DSP);
+// NO_WRITEBACK;
+ pipeline[plPtrExec].address = dsp_reg[15] + PRM;
+ pipeline[plPtrExec].value = PRN;
+ pipeline[plPtrExec].type = TYPE_DWORD;
+ WRITEBACK_ADDR;
+}
+
+static void DSP_sub(void)
+{
+#ifdef DSP_DIS_SUB
+ if (doDSPDis)
+ WriteLog("%06X: SUB R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ uint32 res = PRN - PRM;
+ SET_ZNC_SUB(PRN, PRM, res);
+ PRES = res;
+#ifdef DSP_DIS_SUB
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRES);
+#endif
+}
+
+static void DSP_subc(void)
+{
+#ifdef DSP_DIS_SUBC
+ if (doDSPDis)
+ WriteLog("%06X: SUBC R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ uint32 res = PRN - PRM - dsp_flag_c;
+ uint32 borrow = dsp_flag_c;
+ SET_ZNC_SUB(PRN - borrow, PRM, res);
+ PRES = res;
+#ifdef DSP_DIS_SUBC
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRES);
+#endif
+}
+
+static void DSP_subq(void)
+{
+#ifdef DSP_DIS_SUBQ
+ if (doDSPDis)
+ WriteLog("%06X: SUBQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, dsp_convert_zero[PIMM1], PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ uint32 r1 = dsp_convert_zero[PIMM1];
+ uint32 res = PRN - r1;
+ SET_ZNC_SUB(PRN, r1, res);
+ PRES = res;
+#ifdef DSP_DIS_SUBQ
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_subqmod(void)
+{
+ uint32 r1 = dsp_convert_zero[PIMM1];
+ uint32 r2 = PRN;
+ uint32 res = r2 - r1;
+ res = (res & (~dsp_modulo)) | (r2 & dsp_modulo);
+ PRES = res;
+ SET_ZNC_SUB(r2, r1, res);
+}
+
+static void DSP_subqt(void)
+{
+#ifdef DSP_DIS_SUBQT
+ if (doDSPDis)
+ WriteLog("%06X: SUBQT #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", DSP_PPC, dsp_convert_zero[PIMM1], PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRN);
+#endif
+ PRES = PRN - dsp_convert_zero[PIMM1];
+#ifdef DSP_DIS_SUBQT
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES);
+#endif
+}
+
+static void DSP_xor(void)
+{
+#ifdef DSP_DIS_XOR
+ if (doDSPDis)
+ WriteLog("%06X: XOR R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN);
+#endif
+ PRES = PRN ^ PRM;
+ SET_ZN(PRES);
+#ifdef DSP_DIS_XOR
+ if (doDSPDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRES);
+#endif
+}
diff --git a/src/jaguar/dsp.h b/src/jaguar/dsp.h
new file mode 100644
index 00000000..44e8b707
--- /dev/null
+++ b/src/jaguar/dsp.h
@@ -0,0 +1,42 @@
+//
+// DSP.H
+//
+
+#ifndef __DSP_H__
+#define __DSP_H__
+
+//#include "types.h"
+#include "memory.h"
+
+#define DSP_CONTROL_RAM_BASE 0x00F1A100
+#define DSP_WORK_RAM_BASE 0x00F1B000
+
+void DSPInit(void);
+void DSPReset(void);
+void DSPExec(int32);
+void DSPDone(void);
+void DSPUpdateRegisterBanks(void);
+void DSPHandleIRQs(void);
+void DSPSetIRQLine(int irqline, int state);
+uint8 DSPReadByte(uint32 offset, uint32 who = UNKNOWN);
+uint16 DSPReadWord(uint32 offset, uint32 who = UNKNOWN);
+uint32 DSPReadLong(uint32 offset, uint32 who = UNKNOWN);
+void DSPWriteByte(uint32 offset, uint8 data, uint32 who = UNKNOWN);
+void DSPWriteWord(uint32 offset, uint16 data, uint32 who = UNKNOWN);
+void DSPWriteLong(uint32 offset, uint32 data, uint32 who = UNKNOWN);
+void DSPReleaseTimeslice(void);
+
+void DSPExecP(int32 cycles);
+void DSPExecP2(int32 cycles);
+//void DSPExecP3(int32 cycles);
+void DSPExecComp(int32 cycles);
+
+// Exported vars
+
+extern bool doDSPDis;
+
+// DSP interrupt numbers (in $F1A100, bits 4-8 & 16)
+
+enum { DSPIRQ_CPU = 0, DSPIRQ_SSI, DSPIRQ_TIMER0, DSPIRQ_TIMER1, DSPIRQ_EXT0, DSPIRQ_EXT1 };
+
+#endif // __DSP_H__
diff --git a/src/jaguar/eeprom.c b/src/jaguar/eeprom.c
new file mode 100644
index 00000000..266a11ae
--- /dev/null
+++ b/src/jaguar/eeprom.c
@@ -0,0 +1,334 @@
+//
+// Jaguar EEPROM handler
+//
+// by Cal2
+// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
+// Cleanups/enhancements by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+//
+
+#include "eeprom.h"
+
+#include <stdlib.h>
+#include <string.h> // For memset
+#include "jaguar.h"
+#include "log.h"
+#include "settings.h"
+
+#define eeprom_LOG
+
+static uint16 eeprom_ram[64];
+
+//
+// Private function prototypes
+//
+
+static void EEPROMSave(void);
+static void eeprom_set_di(uint32 state);
+static void eeprom_set_cs(uint32 state);
+static uint32 eeprom_get_do(void);
+
+enum { EE_STATE_START = 1, EE_STATE_OP_A, EE_STATE_OP_B, EE_STATE_0, EE_STATE_1,
+ EE_STATE_2, EE_STATE_3, EE_STATE_0_0, EE_READ_ADDRESS, EE_STATE_0_0_0,
+ EE_STATE_0_0_1, EE_STATE_0_0_2, EE_STATE_0_0_3, EE_STATE_0_0_1_0, EE_READ_DATA,
+ EE_STATE_BUSY, EE_STATE_1_0, EE_STATE_1_1, EE_STATE_2_0, EE_STATE_3_0 };
+
+// Local global variables
+
+static uint16 jerry_ee_state = EE_STATE_START;
+static uint16 jerry_ee_op = 0;
+static uint16 jerry_ee_rstate = 0;
+static uint16 jerry_ee_address_data = 0;
+static uint16 jerry_ee_address_cnt = 6;
+static uint16 jerry_ee_data = 0;
+static uint16 jerry_ee_data_cnt = 16;
+static uint16 jerry_writes_enabled = 0;
+static uint16 jerry_ee_direct_jump = 0;
+static char eeprom_filename[MAX_PATH];
+static bool foundEEPROM = false;
+
+void EepromInit(void)
+{
+ sprintf(eeprom_filename, "%s%08X.eep", vjs.EEPROMPath, (unsigned int)jaguarMainROMCRC32);
+ FILE * fp = fopen(eeprom_filename, "rb");
+
+ if (fp)
+ {
+ fread(eeprom_ram, 1, 128, fp);
+ fclose(fp);
+ WriteLog("EEPROM: Loaded from %s\n", eeprom_filename);
+ foundEEPROM = true;
+ }
+ else
+ WriteLog("EEPROM: Could not open file \"%s\"!\n", eeprom_filename);
+}
+
+void EepromReset(void)
+{
+ if (!foundEEPROM)
+ memset(eeprom_ram, 0xFF, 64 * sizeof(uint16));
+}
+
+void EepromDone(void)
+{
+ WriteLog("EEPROM: Done.\n");
+}
+
+static void EEPROMSave(void)
+{
+ FILE * fp = fopen(eeprom_filename, "wb");
+
+ if (fp == NULL)
+ {
+ WriteLog("EEPROM: Could not create file \"%s!\"\n", eeprom_filename);
+ return;
+ }
+
+ fwrite(eeprom_ram, 1, 128, fp);
+ fclose(fp);
+}
+
+uint8 EepromReadByte(uint32 offset)
+{
+ switch (offset)
+ {
+ case 0xF14001:
+ return eeprom_get_do();
+ case 0xF14801:
+ break;
+ case 0xF15001:
+ eeprom_set_cs(1);
+ break;
+// default: WriteLog("EEPROM: unmapped 0x%.8x\n", offset); break;
+ }
+
+ return 0x00;
+}
+
+uint16 EepromReadWord(uint32 offset)
+{
+ return ((uint16)EepromReadByte(offset + 0) << 8) | EepromReadByte(offset + 1);
+}
+
+void EepromWriteByte(uint32 offset, uint8 data)
+{
+ switch (offset)
+ {
+ case 0xF14001:
+ break;
+ case 0xF14801:
+ eeprom_set_di(data & 0x01);
+ break;
+ case 0xF15001:
+ eeprom_set_cs(1);
+ break;
+// default: WriteLog("eeprom: unmapped 0x%.8x\n",offset); break;
+ }
+}
+
+void EepromWriteWord(uint32 offset, uint16 data)
+{
+ EepromWriteByte(offset + 0, (data >> 8) & 0xFF);
+ EepromWriteByte(offset + 1, data & 0xFF);
+}
+
+static void eeprom_set_di(uint32 data)
+{
+// WriteLog("eeprom: di=%i\n",data);
+// WriteLog("eeprom: state %i\n",jerry_ee_state);
+ switch (jerry_ee_state)
+ {
+ case EE_STATE_START:
+ jerry_ee_state = EE_STATE_OP_A;
+ break;
+ case EE_STATE_OP_A:
+ jerry_ee_op = (data << 1);
+ jerry_ee_state = EE_STATE_OP_B;
+ break;
+ case EE_STATE_OP_B:
+ jerry_ee_op |= data;
+ jerry_ee_direct_jump = 0;
+// WriteLog("eeprom: opcode %i\n",jerry_ee_op);
+ switch (jerry_ee_op)
+ {
+ case 0: jerry_ee_state = EE_STATE_0; break;
+ case 1: jerry_ee_state = EE_STATE_1; break;
+ case 2: jerry_ee_state = EE_STATE_2; break;
+ case 3: jerry_ee_state = EE_STATE_3; break;
+ }
+ eeprom_set_di(data);
+ break;
+ case EE_STATE_0:
+ jerry_ee_rstate = EE_STATE_0_0;
+ jerry_ee_state = EE_READ_ADDRESS;
+ jerry_ee_direct_jump = 1;
+ jerry_ee_address_cnt = 6;
+ jerry_ee_address_data = 0;
+ break;
+ case EE_STATE_0_0:
+ switch ((jerry_ee_address_data >> 4) & 0x03)
+ {
+ case 0: jerry_ee_state=EE_STATE_0_0_0; break;
+ case 1: jerry_ee_state=EE_STATE_0_0_1; break;
+ case 2: jerry_ee_state=EE_STATE_0_0_2; break;
+ case 3: jerry_ee_state=EE_STATE_0_0_3; break;
+ }
+ eeprom_set_di(data);
+ break;
+ case EE_STATE_0_0_0:
+ // writes disable
+ // WriteLog("eeprom: read only\n");
+ jerry_writes_enabled = 0;
+ jerry_ee_state = EE_STATE_START;
+ break;
+ case EE_STATE_0_0_1:
+ // writes all
+ jerry_ee_rstate = EE_STATE_0_0_1_0;
+ jerry_ee_state = EE_READ_DATA;
+ jerry_ee_data_cnt = 16;
+ jerry_ee_data = 0;
+ jerry_ee_direct_jump = 1;
+ break;
+ case EE_STATE_0_0_1_0:
+ // WriteLog("eeprom: filling eeprom with 0x%.4x\n",data);
+ if (jerry_writes_enabled)
+ for(int i=0; i<64; i++)
+ eeprom_ram[i] = jerry_ee_data;
+ EEPROMSave(); // Save it NOW!
+ //else
+ // WriteLog("eeprom: not writing because read only\n");
+ jerry_ee_state = EE_STATE_BUSY;
+ break;
+ case EE_STATE_0_0_2:
+ // erase all
+ //WriteLog("eeprom: erasing eeprom\n");
+ if (jerry_writes_enabled)
+ for(int i=0; i<64; i++)
+ eeprom_ram[i] = 0xFFFF;
+
+ jerry_ee_state = EE_STATE_BUSY;
+ break;
+ case EE_STATE_0_0_3:
+ // writes enable
+ //WriteLog("eeprom: read/write\n");
+ jerry_writes_enabled = 1;
+ jerry_ee_state = EE_STATE_START;
+ break;
+ case EE_STATE_1:
+ jerry_ee_rstate = EE_STATE_1_0;
+ jerry_ee_state = EE_READ_ADDRESS;
+ jerry_ee_address_cnt = 6;
+ jerry_ee_address_data = 0;
+ jerry_ee_direct_jump = 1;
+ break;
+ case EE_STATE_1_0:
+ jerry_ee_rstate = EE_STATE_1_1;
+ jerry_ee_state = EE_READ_DATA;
+ jerry_ee_data_cnt = 16;
+ jerry_ee_data = 0;
+ jerry_ee_direct_jump = 1;
+ break;
+ case EE_STATE_1_1:
+ //WriteLog("eeprom: writing 0x%.4x at 0x%.2x\n",jerry_ee_data,jerry_ee_address_data);
+ if (jerry_writes_enabled)
+ eeprom_ram[jerry_ee_address_data] = jerry_ee_data;
+ EEPROMSave(); // Save it NOW!
+ jerry_ee_state = EE_STATE_BUSY;
+ break;
+ case EE_STATE_2:
+ jerry_ee_rstate = EE_STATE_2_0;
+ jerry_ee_state = EE_READ_ADDRESS;
+ jerry_ee_address_cnt = 6;
+ jerry_ee_address_data = 0;
+ jerry_ee_data_cnt = 16;
+ jerry_ee_data = 0;
+ break;
+ case EE_STATE_3:
+ jerry_ee_rstate = EE_STATE_3_0;
+ jerry_ee_state = EE_READ_ADDRESS;
+ jerry_ee_address_cnt = 6;
+ jerry_ee_address_data = 0;
+ jerry_ee_direct_jump = 1;
+ break;
+ case EE_STATE_3_0:
+ //WriteLog("eeprom: erasing 0x%.2x\n",jerry_ee_address_data);
+ if (jerry_writes_enabled)
+ eeprom_ram[jerry_ee_address_data] = 0xFFFF;
+ jerry_ee_state = EE_STATE_BUSY;
+ break;
+ case EE_READ_DATA:
+ //WriteLog("eeprom:\t\t\t%i bit %i\n",data,jerry_ee_data_cnt-1);
+ jerry_ee_data <<= 1;
+ jerry_ee_data |= data;
+ jerry_ee_data_cnt--;
+ if (!jerry_ee_data_cnt)
+ {
+ jerry_ee_state = jerry_ee_rstate;
+ if (jerry_ee_direct_jump)
+ eeprom_set_di(data);
+ }
+ break;
+ case EE_READ_ADDRESS:
+ jerry_ee_address_data <<= 1;
+ jerry_ee_address_data |= data;
+ jerry_ee_address_cnt--;
+// WriteLog("eeprom:\t%i bits remaining\n",jerry_ee_address_cnt);
+ if (!jerry_ee_address_cnt)
+ {
+ jerry_ee_state = jerry_ee_rstate;
+ //WriteLog("eeprom:\t\tread address 0x%.2x\n",jerry_ee_address_data);
+ if (jerry_ee_direct_jump)
+ eeprom_set_di(data);
+ }
+ break;
+ default:
+ jerry_ee_state = EE_STATE_OP_A;
+ }
+}
+
+static void eeprom_set_cs(uint32 state)
+{
+// WriteLog("eeprom: cs=%i\n",state);
+ jerry_ee_state = EE_STATE_START;
+ jerry_ee_op = 0;
+ jerry_ee_rstate = 0;
+ jerry_ee_address_data = 0;
+ jerry_ee_address_cnt = 6;
+ jerry_ee_data = 0;
+ jerry_ee_data_cnt = 16;
+ jerry_writes_enabled = 1;
+}
+
+static uint32 eeprom_get_do(void)
+{
+ uint16 data = 1;
+
+ switch (jerry_ee_state)
+ {
+ case EE_STATE_START:
+ data = 1;
+ break;
+ case EE_STATE_BUSY:
+ jerry_ee_state = EE_STATE_START;
+ data = 0;
+ break;
+ case EE_STATE_2_0:
+ jerry_ee_data_cnt--;
+ data = (eeprom_ram[jerry_ee_address_data] & (1 << jerry_ee_data_cnt)) >> jerry_ee_data_cnt;
+ if (!jerry_ee_data_cnt)
+ {
+ //WriteLog("eeprom: read 0x%.4x at 0x%.2x cpu %i pc=0x%.8x\n",eeprom_ram[jerry_ee_address_data],jerry_ee_address_data,jaguar_cpu_in_exec,s68000readPC());
+ jerry_ee_state = EE_STATE_START;
+ }
+ break;
+ }
+
+// WriteLog("eeprom: do=%i\n",data);
+ return data;
+}
diff --git a/src/jaguar/eeprom.h b/src/jaguar/eeprom.h
new file mode 100644
index 00000000..02b92c24
--- /dev/null
+++ b/src/jaguar/eeprom.h
@@ -0,0 +1,20 @@
+//
+// EEPROM.H: Header file
+//
+
+#ifndef __EEPROM_H__
+#define __EEPROM_H__
+
+#include "types.h"
+
+void EepromInit(void);
+void EepromReset(void);
+void EepromDone(void);
+void EepromUpdate(void);
+
+uint8 EepromReadByte(uint32 offset);
+uint16 EepromReadWord(uint32 offset);
+void EepromWriteByte(uint32 offset, uint8 data);
+void EepromWriteWord(uint32 offset, uint16 data);
+
+#endif // __EEPROM_H__
diff --git a/src/jaguar/event.c b/src/jaguar/event.c
new file mode 100644
index 00000000..2fbfa33c
--- /dev/null
+++ b/src/jaguar/event.c
@@ -0,0 +1,262 @@
+//
+// System time handlers
+//
+// by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+//
+
+//
+// STILL TO DO:
+//
+// - Handling for an event that occurs NOW
+//
+
+#include "event.h"
+
+#include "log.h"
+
+#define EVENT_LIST_SIZE 512
+
+/*
+// Current execution path:
+
+do
+{
+ HandleJoystick
+
+ // Execute one frame
+
+ for(int i=0; i<numLines; i++)
+ {
+ ExecuteM68K
+ ExecutePITs
+ ExecuteGPU
+ ExecuteDSP
+ // Render Scanline
+ CallObjectProcessor
+ MoveLineBufToBackBuf
+ }
+
+ RenderBackbuffer
+}
+while (true)
+
+// What we need to do:
+
+Set up timers (frame [for native render--on vblank interval?], OP line, PITs)
+
+do
+{
+ double timeToNextEvent = GetTimeToNextEvent();
+
+ m68k_execute(USEC_TO_M68K_CYCLES(timeToNextEvent));
+ GPUExec(USEC_TO_RISC_CYCLES(timeToNextEvent));
+ DSPExec(USEC_TO_RISC_CYCLES(timeToNextEvent));
+
+ HandleNextEvent();
+}
+while (true)
+
+
+*/
+
+// Now, a bit of weirdness: It seems that the number of lines displayed on the screen
+// makes the effective refresh rate either 30 or 25 Hz!
+
+// NOTE ABOUT TIMING SYSTEM DATA STRUCTURES:
+
+// A queue won't work for this system because we can't guarantee that an event will go
+// in with a time that is later than the ones already queued up. So we just use a simple
+// list.
+
+// Although if we used an insertion sort we could, but it wouldn't work for adjusting
+// times...
+
+struct Event
+{
+ bool valid;
+ double eventTime;
+ void (* timerCallback)(void);
+};
+
+Event eventList[EVENT_LIST_SIZE];
+uint32 nextEvent;
+
+void InitializeEventList(void)
+{
+ for(uint32 i=0; i<EVENT_LIST_SIZE; i++)
+ eventList[i].valid = false;
+}
+
+//We just slap the next event into the list, no checking, no nada...
+void SetCallbackTime(void (* callback)(void), double time)
+{
+ for(uint32 i=0; i<EVENT_LIST_SIZE; i++)
+ {
+ if (!eventList[i].valid)
+ {
+//WriteLog("SCT: Found callback slot #%u...\n", i);
+ eventList[i].timerCallback = callback;
+ eventList[i].eventTime = time;
+ eventList[i].valid = true;
+
+ return;
+ }
+ }
+
+ WriteLog("SetCallbackTime() failed to find an empty slot in the list!\n");
+}
+
+void RemoveCallback(void (* callback)(void))
+{
+ for(uint32 i=0; i<EVENT_LIST_SIZE; i++)
+ {
+ if (eventList[i].valid && eventList[i].timerCallback == callback)
+ {
+ eventList[i].valid = false;
+
+ return;
+ }
+ }
+}
+
+void AdjustCallbackTime(void (* callback)(void), double time)
+{
+ for(uint32 i=0; i<EVENT_LIST_SIZE; i++)
+ {
+ if (eventList[i].valid && eventList[i].timerCallback == callback)
+ {
+ eventList[i].eventTime = time;
+
+ return;
+ }
+ }
+}
+
+double GetTimeToNextEvent(void)
+{
+ double time = 0;
+ bool firstTime = true;
+
+ for(uint32 i=0; i<EVENT_LIST_SIZE; i++)
+ {
+ if (eventList[i].valid)
+ {
+ if (firstTime)
+ time = eventList[i].eventTime, nextEvent = i, firstTime = false;
+ else
+ {
+ if (eventList[i].eventTime < time)
+ time = eventList[i].eventTime, nextEvent = i;
+ }
+ }
+ }
+
+ return time;
+}
+
+void HandleNextEvent(void)
+{
+ double elapsedTime = eventList[nextEvent].eventTime;
+ void (* event)(void) = eventList[nextEvent].timerCallback;
+
+ for(uint32 i=0; i<EVENT_LIST_SIZE; i++)
+ if (eventList[i].valid)
+ eventList[i].eventTime -= elapsedTime;
+
+ eventList[nextEvent].valid = false; // Remove event from list...
+
+ (*event)();
+}
+
+
+/*
+void OPCallback(void)
+{
+ DoFunkyOPStuffHere();
+
+ SetCallbackTime(OPCallback, HORIZ_PERIOD_IN_USEC);
+}
+
+void VICallback(void)
+{
+ double oneFrameInUsec = 16666.66666666;
+ SetCallbackTime(VICallback, oneFrameInUsec / numberOfLines);
+}
+
+void JaguarInit(void)
+{
+ double oneFrameInUsec = 16666.66666666;
+ SetCallbackTime(VICallback, oneFrameInUsec / numberOfLines);
+ SetCallbackTime(OPCallback, );
+}
+
+void JaguarExec(void)
+{
+ while (true)
+ {
+ double timeToNextEvent = GetTimeToNextEvent();
+
+ m68k_execute(USEC_TO_M68K_CYCLES(timeToNextEvent));
+ GPUExec(USEC_TO_RISC_CYCLES(timeToNextEvent));
+ DSPExec(USEC_TO_RISC_CYCLES(timeToNextEvent));
+
+ if (!HandleNextEvent())
+ break;
+ }
+}
+
+// NOTES: The timers count RISC cycles, and when the dividers count down to zero they can interrupt either the DSP and/or CPU.
+
+// NEW:
+// TOM Programmable Interrupt Timer handler
+// NOTE: TOM's PIT is only enabled if the prescaler is != 0
+// The PIT only generates an interrupt when it counts down to zero, not when loaded!
+
+void TOMResetPIT()
+{
+ // Need to remove previous timer from the queue, if it exists...
+ RemoveCallback(TOMPITCallback);
+
+ if (TOMPITPrescaler)
+ {
+ double usecs = (TOMPITPrescaler + 1) * (TOMPITDivider + 1) * RISC_CYCLE_IN_USEC;
+ SetCallbackTime(TOMPITCallback, usecs);
+ }
+}
+
+void TOMPITCallback(void)
+{
+ INT1_RREG |= 0x08; // Set TOM PIT interrupt pending
+ GPUSetIRQLine(GPUIRQ_TIMER, ASSERT_LINE); // It does the 'IRQ enabled' checking
+
+ if (INT1_WREG & 0x08)
+ m68k_set_irq(7); // Generate 68K NMI
+
+ TOMResetPIT();
+}
+
+// Small problem with this approach: If a timer interrupt is already pending,
+// the pending timer needs to be replaced with the new one! (Taken care of above, BTW...)
+
+TOMWriteWord(uint32 address, uint16 data)
+{
+ if (address == PIT0)
+ {
+ TOMPITPrescaler = data;
+ TOMResetPIT();
+ }
+ else if (address == PIT1)
+ {
+ TOMPITDivider = data;
+ TOMResetPIT();
+ }
+}
+
+*/
diff --git a/src/jaguar/event.h b/src/jaguar/event.h
new file mode 100644
index 00000000..35f84468
--- /dev/null
+++ b/src/jaguar/event.h
@@ -0,0 +1,28 @@
+//
+// EVENT.H: System timing support functionality
+//
+// by James L. Hammons
+//
+
+#ifndef __EVENT_H__
+#define __EVENT_H__
+
+#include "types.h"
+
+// Note that these are NTSC timings:
+
+#define RISC_CYCLE_IN_USEC 0.03760684198
+#define M68K_CYCLE_IN_USEC (RISC_CYCLE_IN_USEC * 2)
+#define HORIZ_PERIOD_IN_USEC 63.5555
+
+#define USEC_TO_RISC_CYCLES(u) (uint32)(((u) / RISC_CYCLE_IN_USEC) + 0.5)
+#define USEC_TO_M68K_CYCLES(u) (uint32)(((u) / M68K_CYCLE_IN_USEC) + 0.5)
+
+void InitializeEventList(void);
+void SetCallbackTime(void (* callback)(void), double time);
+void RemoveCallback(void (* callback)(void));
+void AdjustCallbackTime(void (* callback)(void), double time);
+double GetTimeToNextEvent(void);
+void HandleNextEvent(void);
+
+#endif // __EVENT_H__
diff --git a/src/jaguar/file.c b/src/jaguar/file.c
new file mode 100644
index 00000000..854507a5
--- /dev/null
+++ b/src/jaguar/file.c
@@ -0,0 +1,653 @@
+//
+// FILE.CPP
+//
+// File support
+// by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+// JLH 02/28/2010 Added functions to look inside .ZIP files and handle contents
+//
+
+#include "file.h"
+
+#include <stdarg.h>
+#include <string.h>
+#include "crc32.h"
+#include "eeprom.h"
+#include "jaguar.h"
+#include "log.h"
+#include "memory.h"
+#include "unzip.h"
+#include "zlib.h"
+
+// Private function prototypes
+
+static int gzfilelength(gzFile gd);
+static bool CheckExtension(const char * filename, const char * ext);
+static int ParseFileType(uint8 header1, uint8 header2, uint32 size);
+
+// Private variables/enums
+
+// JST = Jaguar Software Type
+enum { JST_NONE = 0, JST_ROM, JST_ALPINE, JST_ABS_TYPE1, JST_ABS_TYPE2, JST_JAGSERVER };
+//static int softwareType = JST_NONE;
+
+//
+// Generic ROM loading
+//
+uint32 JaguarLoadROM(uint8 * rom, char * path)
+{
+// We really should have some kind of sanity checking for the ROM size here to prevent
+// a buffer overflow... !!! FIX !!!
+#warning "!!! FIX !!! Should have sanity checking for ROM size to prevent buffer overflow!"
+ uint32 romSize = 0;
+
+ WriteLog("JaguarLoadROM: Attempting to load file '%s'...", path);
+ char * ext = strrchr(path, '.');
+
+ // No filename extension == YUO FAIL IT (it is loading the file).
+ // This is naive, but it works. But should probably come up with something a little
+ // more robust, to prevent problems with dopes trying to exploit this.
+ if (ext == NULL)
+ {
+ WriteLog("FAILED!\n");
+ return 0;
+ }
+
+ WriteLog("Succeeded in finding extension (%s)!\n", ext);
+ WriteLog("VJ: Loading \"%s\"...", path);
+
+ if (strcasecmp(ext, ".zip") == 0)
+ {
+ // Handle ZIP file loading here...
+ WriteLog("(ZIPped)...");
+
+ uint8_t * buffer = NULL;
+ romSize = GetFileFromZIP(path, FT_SOFTWARE, buffer);
+
+ if (romSize == 0)
+ {
+ WriteLog("Failed!\n");
+ return 0;
+ }
+
+ memcpy(rom, buffer, romSize);
+ delete[] buffer;
+ }
+ else
+ {
+ // Handle gzipped files transparently [Adam Green]...
+
+ gzFile fp = gzopen(path, "rb");
+
+ if (fp == NULL)
+ {
+ WriteLog("Failed!\n");
+ return 0;
+ }
+
+ romSize = gzfilelength(fp);
+ gzseek(fp, 0, SEEK_SET);
+ gzread(fp, rom, romSize);
+ gzclose(fp);
+ }
+
+ WriteLog("OK (%i bytes)\n", romSize);
+
+ return romSize;
+}
+
+//
+// Jaguar file loading
+//
+bool JaguarLoadFileOld(char * path)
+{
+ jaguarROMSize = JaguarLoadROM(jaguarMainROM, path);
+
+ if (jaguarROMSize == 0)
+ {
+// WriteLog("VJ: Could not load ROM from file \"%s\"...\nAborting!\n", newPath);
+ WriteLog("GUI: Could not load ROM from file \"%s\"...\nAborting load!\n", path);
+#warning "!!! Need error dialog here !!!"
+// Need to do something else here, like throw up an error dialog instead of aborting. !!! FIX !!!
+// log_done();
+// exit(0);
+ return false; // This is a start...
+ }
+
+ jaguarMainROMCRC32 = crc32_calcCheckSum(jaguarMainROM, jaguarROMSize);
+ WriteLog("CRC: %08X\n", (unsigned int)jaguarMainROMCRC32);
+ EepromInit();
+
+ jaguarRunAddress = 0x802000;
+
+ char * ext = strrchr(path, '.'); // Get the file's extension for non-cartridge checking
+
+//NOTE: Should fix JaguarLoadROM() to replace .zip with what's *in* the zip (.abs, .j64, etc.)
+#warning "!!! Need more robust file type checking in JaguarLoadROM() !!!"
+ if (strcasecmp(ext, ".rom") == 0)
+ {
+ // File extension ".ROM": Alpine image that loads/runs at $802000
+ WriteLog("GUI: Setting up homebrew (ROM)... Run address: 00802000, length: %08X\n", jaguarROMSize);
+
+ for(int i=jaguarROMSize-1; i>=0; i--)
+ jaguarMainROM[0x2000 + i] = jaguarMainROM[i];
+
+ memset(jaguarMainROM, 0xFF, 0x2000);
+/* memcpy(jaguar_mainRam, jaguar_mainRom, jaguarRomSize);
+ memset(jaguar_mainRom, 0xFF, 0x600000);
+ memcpy(jaguar_mainRom + 0x2000, jaguar_mainRam, jaguarRomSize);
+ memset(jaguar_mainRam, 0x00, 0x400000);*/
+
+/*
+Stubulator ROM vectors...
+handler 001 at $00E00008
+handler 002 at $00E008DE
+handler 003 at $00E008E2
+handler 004 at $00E008E6
+handler 005 at $00E008EA
+handler 006 at $00E008EE
+handler 007 at $00E008F2
+handler 008 at $00E0054A
+handler 009 at $00E008FA
+handler 010 at $00000000
+handler 011 at $00000000
+handler 012 at $00E008FE
+handler 013 at $00E00902
+handler 014 at $00E00906
+handler 015 at $00E0090A
+handler 016 at $00E0090E
+handler 017 at $00E00912
+handler 018 at $00E00916
+handler 019 at $00E0091A
+handler 020 at $00E0091E
+handler 021 at $00E00922
+handler 022 at $00E00926
+handler 023 at $00E0092A
+handler 024 at $00E0092E
+handler 025 at $00E0107A
+handler 026 at $00E0107A
+handler 027 at $00E0107A
+handler 028 at $00E008DA
+handler 029 at $00E0107A
+handler 030 at $00E0107A
+handler 031 at $00E0107A
+handler 032 at $00000000
+
+Let's try setting up the illegal instruction vector for a stubulated jaguar...
+*/
+/* SET32(jaguar_mainRam, 0x08, 0x00E008DE);
+ SET32(jaguar_mainRam, 0x0C, 0x00E008E2);
+ SET32(jaguar_mainRam, 0x10, 0x00E008E6); // <-- Should be here (it is)...
+ SET32(jaguar_mainRam, 0x14, 0x00E008EA);//*/
+
+ // Try setting the vector to say, $1000 and putting an instruction there that loops forever:
+ // This kludge works! Yeah!
+ SET32(jaguarMainRAM, 0x10, 0x00001000);
+ SET16(jaguarMainRAM, 0x1000, 0x60FE); // Here: bra Here
+ }
+ else if (strcasecmp(ext, ".abs") == 0)
+ {
+ // File extension ".ABS": Atari linker output file with header (w/o is useless to us here)
+
+/*
+ABS Format sleuthing (LBUGDEMO.ABS):
+
+000000 60 1B 00 00 05 0C 00 04 62 C0 00 00 04 28 00 00
+000010 12 A6 00 00 00 00 00 80 20 00 FF FF 00 80 25 0C
+000020 00 00 40 00
+
+DRI-format file detected...
+Text segment size = 0x0000050c bytes
+Data segment size = 0x000462c0 bytes
+BSS Segment size = 0x00000428 bytes
+Symbol Table size = 0x000012a6 bytes
+Absolute Address for text segment = 0x00802000
+Absolute Address for data segment = 0x0080250c
+Absolute Address for BSS segment = 0x00004000
+
+(CRZDEMO.ABS):
+000000 01 50 00 03 00 00 00 00 00 03 83 10 00 00 05 3b
+000010 00 1c 00 03 00 00 01 07 00 00 1d d0 00 03 64 98
+000020 00 06 8b 80 00 80 20 00 00 80 20 00 00 80 3d d0
+
+000030 2e 74 78 74 00 00 00 00 00 80 20 00 00 80 20 00 .txt (+36 bytes)
+000040 00 00 1d d0 00 00 00 a8 00 00 00 00 00 00 00 00
+000050 00 00 00 00 00 00 00 20
+000058 2e 64 74 61 00 00 00 00 00 80 3d d0 00 80 3d d0 .dta (+36 bytes)
+000068 00 03 64 98 00 00 1e 78 00 00 00 00 00 00 00 00
+000078 00 00 00 00 00 00 00 40
+000080 2e 62 73 73 00 00 00 00 00 00 50 00 00 00 50 00 .bss (+36 bytes)
+000090 00 06 8b 80 00 03 83 10 00 00 00 00 00 00 00 00
+0000a0 00 00 00 00 00 00 00 80
+
+Header size is $A8 bytes...
+
+BSD/COFF format file detected...
+3 sections specified
+Symbol Table offset = 230160 ($00038310)
+Symbol Table contains 1339 symbol entries ($0000053B)
+The additional header size is 28 bytes ($001C)
+Magic Number for RUN_HDR = 0x00000107
+Text Segment Size = 7632 ($00001DD0)
+Data Segment Size = 222360 ($00036498)
+BSS Segment Size = 428928 ($00068B80)
+Starting Address for executable = 0x00802000
+Start of Text Segment = 0x00802000
+Start of Data Segment = 0x00803dd0
+*/
+ if (jaguarMainROM[0] == 0x60 && jaguarMainROM[1] == 0x1B)
+ {
+ uint32 loadAddress = GET32(jaguarMainROM, 0x16), //runAddress = GET32(jaguar_mainRom, 0x2A),
+ codeSize = GET32(jaguarMainROM, 0x02) + GET32(jaguarMainROM, 0x06);
+ WriteLog("GUI: Setting up homebrew (ABS-1)... Run address: %08X, length: %08X\n", loadAddress, codeSize);
+
+ if (loadAddress < 0x800000)
+ memcpy(jaguarMainRAM + loadAddress, jaguarMainROM + 0x24, codeSize);
+ else
+ {
+ for(int i=codeSize-1; i>=0; i--)
+ jaguarMainROM[(loadAddress - 0x800000) + i] = jaguarMainROM[i + 0x24];
+/* memcpy(jaguar_mainRam, jaguar_mainRom + 0x24, codeSize);
+ memset(jaguar_mainRom, 0xFF, 0x600000);
+ memcpy(jaguar_mainRom + (loadAddress - 0x800000), jaguar_mainRam, codeSize);
+ memset(jaguar_mainRam, 0x00, 0x400000);*/
+ }
+
+ jaguarRunAddress = loadAddress;
+ }
+ else if (jaguarMainROM[0] == 0x01 && jaguarMainROM[1] == 0x50)
+ {
+ uint32 loadAddress = GET32(jaguarMainROM, 0x28), runAddress = GET32(jaguarMainROM, 0x24),
+ codeSize = GET32(jaguarMainROM, 0x18) + GET32(jaguarMainROM, 0x1C);
+ WriteLog("GUI: Setting up homebrew (ABS-2)... Run address: %08X, length: %08X\n", runAddress, codeSize);
+
+ if (loadAddress < 0x800000)
+ memcpy(jaguarMainRAM + loadAddress, jaguarMainROM + 0xA8, codeSize);
+ else
+ {
+ for(int i=codeSize-1; i>=0; i--)
+ jaguarMainROM[(loadAddress - 0x800000) + i] = jaguarMainROM[i + 0xA8];
+/* memcpy(jaguar_mainRam, jaguar_mainRom + 0xA8, codeSize);
+ memset(jaguar_mainRom, 0xFF, 0x600000);
+ memcpy(jaguar_mainRom + (loadAddress - 0x800000), jaguar_mainRam, codeSize);
+ memset(jaguar_mainRam, 0x00, 0x400000);*/
+ }
+
+ jaguarRunAddress = runAddress;
+ }
+ else
+ {
+ WriteLog("GUI: Couldn't find correct ABS/COF format: %02X %02X\n", jaguarMainROM[0], jaguarMainROM[1]);
+ return false;
+ }
+ }
+ else if (strcasecmp(ext, ".jag") == 0)
+ {
+ // File extension ".JAG": Atari server file with header
+//NOTE: The bytes 'JAGR' should also be at position $1C...
+// Also, there's *always* a $601A header at position $00...
+ if (jaguarMainROM[0] == 0x60 && jaguarMainROM[1] == 0x1A)
+ {
+ uint32 loadAddress = GET32(jaguarMainROM, 0x22), runAddress = GET32(jaguarMainROM, 0x2A);
+//This is not always right! Especially when converted via bin2jag1!!!
+//We should have access to the length of the furshlumiger file that was loaded anyway!
+//Now, we do! ;-)
+// uint32 progLength = GET32(jaguar_mainRom, 0x02);
+//jaguarRomSize
+//jaguarRunAddress
+// WriteLog("Jaguar: Setting up PD ROM... Run address: %08X, length: %08X\n", runAddress, progLength);
+// memcpy(jaguar_mainRam + loadAddress, jaguar_mainRom + 0x2E, progLength);
+ WriteLog("GUI: Setting up homebrew (JAG)... Run address: %08X, length: %08X\n", runAddress, jaguarROMSize - 0x2E);
+ memcpy(jaguarMainRAM + loadAddress, jaguarMainROM + 0x2E, jaguarROMSize - 0x2E);
+// SET32(jaguar_mainRam, 4, runAddress);
+ jaguarRunAddress = runAddress;
+ }
+ else
+ return false;
+ }
+ // .J64 (Jaguar cartridge ROM image) is implied by the FileList object...
+
+ return true;
+}
+
+//
+// Jaguar file loading (second stab at it...)
+// We do a more intelligent file analysis here instead of relying on (possible false)
+// file extensions which people don't seem to give two shits about anyway. :-(
+//
+bool JaguarLoadFile(char * path)
+{
+// NOTE: We can further clean this up by fixing JaguarLoadROM to load to a buffer
+// instead of assuming it goes into our ROM space.
+ jaguarROMSize = JaguarLoadROM(jaguarMainROM, path);
+
+ if (jaguarROMSize == 0)
+ {
+// WriteLog("VJ: Could not load ROM from file \"%s\"...\nAborting!\n", newPath);
+ WriteLog("GUI: Could not load ROM from file \"%s\"...\nAborting load!\n", path);
+#warning "!!! Need error dialog here !!!"
+// Need to do something else here, like throw up an error dialog instead of aborting. !!! FIX !!!
+ return false; // This is a start...
+ }
+
+ jaguarMainROMCRC32 = crc32_calcCheckSum(jaguarMainROM, jaguarROMSize);
+ WriteLog("CRC: %08X\n", (unsigned int)jaguarMainROMCRC32);
+// TODO: Check for EEPROM file in ZIP file. If there is no EEPROM in the user's EEPROM
+// directory, copy the one from the ZIP file, if it exists.
+ EepromInit();
+ jaguarRunAddress = 0x802000; // For non-BIOS runs, this is true
+ int fileType = ParseFileType(jaguarMainROM[0], jaguarMainROM[1], jaguarROMSize);
+
+ if (fileType == JST_ROM)
+ return true;
+ else if (fileType == JST_ALPINE)
+ {
+ // File extension ".ROM": Alpine image that loads/runs at $802000
+ WriteLog("GUI: Setting up Alpine ROM... Run address: 00802000, length: %08X\n", jaguarROMSize);
+
+ for(int i=jaguarROMSize-1; i>=0; i--)
+ jaguarMainROM[0x2000 + i] = jaguarMainROM[i];
+
+ memset(jaguarMainROM, 0xFF, 0x2000);
+
+// Maybe instead of this, we could try requiring the STUBULATOR ROM? Just a thought...
+ // Try setting the vector to say, $1000 and putting an instruction there that loops forever:
+ // This kludge works! Yeah!
+ SET32(jaguarMainRAM, 0x10, 0x00001000);
+ SET16(jaguarMainRAM, 0x1000, 0x60FE); // Here: bra Here
+ return true;
+ }
+ else if (fileType == JST_ABS_TYPE1)
+ {
+ uint32 loadAddress = GET32(jaguarMainROM, 0x16),
+ codeSize = GET32(jaguarMainROM, 0x02) + GET32(jaguarMainROM, 0x06);
+ WriteLog("GUI: Setting up homebrew (ABS-1)... Run address: %08X, length: %08X\n", loadAddress, codeSize);
+
+ if (loadAddress < 0x800000)
+ memcpy(jaguarMainRAM + loadAddress, jaguarMainROM + 0x24, codeSize);
+ else
+ {
+ for(int i=codeSize-1; i>=0; i--)
+ jaguarMainROM[(loadAddress - 0x800000) + i] = jaguarMainROM[i + 0x24];
+ }
+
+ jaguarRunAddress = loadAddress;
+ return true;
+ }
+ else if (fileType == JST_ABS_TYPE2)
+ {
+ uint32 loadAddress = GET32(jaguarMainROM, 0x28), runAddress = GET32(jaguarMainROM, 0x24),
+ codeSize = GET32(jaguarMainROM, 0x18) + GET32(jaguarMainROM, 0x1C);
+ WriteLog("GUI: Setting up homebrew (ABS-2)... Run address: %08X, length: %08X\n", runAddress, codeSize);
+
+ if (loadAddress < 0x800000)
+ memcpy(jaguarMainRAM + loadAddress, jaguarMainROM + 0xA8, codeSize);
+ else
+ {
+ for(int i=codeSize-1; i>=0; i--)
+ jaguarMainROM[(loadAddress - 0x800000) + i] = jaguarMainROM[i + 0xA8];
+ }
+
+ jaguarRunAddress = runAddress;
+ return true;
+ }
+ else if (fileType == JST_JAGSERVER)
+ {
+ uint32 loadAddress = GET32(jaguarMainROM, 0x22), runAddress = GET32(jaguarMainROM, 0x2A);
+ WriteLog("GUI: Setting up homebrew (Jag Server)... Run address: %08X, length: %08X\n", runAddress, jaguarROMSize - 0x2E);
+ memcpy(jaguarMainRAM + loadAddress, jaguarMainROM + 0x2E, jaguarROMSize - 0x2E);
+ jaguarRunAddress = runAddress;
+ return true;
+ }
+
+ // We can assume we have JST_NONE at this point. :-P
+ // TODO: Add a dialog box that tells the user that they're trying to feed VJ a bogus file.
+ return false;
+}
+
+//
+// Get the length of a (possibly) gzipped file
+//
+static int gzfilelength(gzFile gd)
+{
+ int size = 0, length = 0;
+ unsigned char buffer[0x10000];
+
+ gzrewind(gd);
+
+ do
+ {
+ // Read in chunks until EOF
+ size = gzread(gd, buffer, 0x10000);
+
+ if (size <= 0)
+ break;
+
+ length += size;
+ }
+ while (!gzeof(gd));
+
+ gzrewind(gd);
+ return length;
+}
+
+//
+// Compare extension to passed in filename. If equal, return true; otherwise false.
+//
+static bool CheckExtension(const char * filename, const char * ext)
+{
+ const char * filenameExt = strrchr(filename, '.'); // Get the file's extension (if any)
+ return (strcasecmp(filenameExt, ext) == 0 ? true : false);
+}
+
+//
+// Get file from .ZIP
+// Returns the size of the file inside the .ZIP file that we're looking at
+// NOTE: If the thing we're looking for is found, it allocates it in the passed in buffer.
+// Which means we have to deallocate it later.
+//
+uint32 GetFileFromZIP(const char * zipFile, FileType type, uint8 * &buffer)
+{
+// NOTE: We could easily check for this by discarding anything that's larger than the RAM/ROM
+// size of the Jaguar console.
+#warning "!!! FIX !!! Should have sanity checking for ROM size to prevent buffer overflow!"
+ const char ftStrings[5][32] = { "Software", "EEPROM", "Label", "Box Art", "Controller Overlay" };
+ ZIP * zip = openzip(0, 0, zipFile);
+
+ if (zip == NULL)
+ {
+ WriteLog("FILE: Could not open file '%s'!\n", zipFile);
+ return 0;
+ }
+
+ zipent * ze;
+ bool found = false;
+
+ // The order is here is important: If the file is found, we need to short-circuit the
+ // readzip() call because otherwise, 'ze' will be pointing to the wrong file!
+ while (!found && readzip(zip))
+ {
+ ze = &zip->ent;
+
+ // Here we simply rely on the file extension to tell the truth, but we know
+ // that extensions lie like sons-a-bitches. So this is naive, we need to do
+ // something a little more robust to keep bad things from happening here.
+#warning "!!! Checking for image by extension can be fooled !!!"
+ if ((type == FT_LABEL) && (CheckExtension(ze->name, ".png") || CheckExtension(ze->name, ".jpg") || CheckExtension(ze->name, ".gif")))
+ {
+ found = true;
+ WriteLog("FILE: Found image file '%s'.\n", ze->name);
+ }
+
+ if ((type == FT_SOFTWARE) && (CheckExtension(ze->name, ".j64") || CheckExtension(ze->name, ".rom") || CheckExtension(ze->name, ".abs") || CheckExtension(ze->name, ".cof")))
+ {
+ found = true;
+ WriteLog("FILE: Found software file '%s'.\n", ze->name);
+ }
+
+ if ((type == FT_EEPROM) && (CheckExtension(ze->name, ".eep") || CheckExtension(ze->name, ".eeprom")))
+ {
+ found = true;
+ WriteLog("FILE: Found EEPROM file '%s'.\n", ze->name);
+ }
+ }
+
+ uint32 fileSize = 0;
+
+ if (found)
+ {
+ WriteLog("FILE: Uncompressing...");
+// Insert file size sanity check here...
+ buffer = new uint8[ze->uncompressed_size];
+
+ if (readuncompresszip(zip, ze, (char *)buffer) == 0)
+ {
+ fileSize = ze->uncompressed_size;
+ WriteLog("success! (%u bytes)\n", fileSize);
+ }
+ else
+ {
+ delete[] buffer;
+ buffer = NULL;
+ WriteLog("FAILED!\n");
+ }
+ }
+ else
+ // Didn't find what we're looking for...
+ WriteLog("FILE: Failed to find file of type %s...\n", ftStrings[type]);
+
+ closezip(zip);
+ return fileSize;
+}
+
+//
+// Parse the file type based upon file size and/or headers.
+//
+static int ParseFileType(uint8 header1, uint8 header2, uint32 size)
+{
+ // If the file size is divisible by 1M, we probably have an regular ROM.
+ // We can also check our CRC32 against the internal ROM database to be sure.
+ if ((size % 1048576) == 0)
+ return JST_ROM;
+
+ // If the file size + 8192 bytes is divisible by 1M, we probably have an
+ // Alpine format ROM.
+ if (((size + 8192) % 1048576) == 0)
+ return JST_ALPINE;
+
+ // So much for low hanging fruit. Now try some other types.
+
+ // ABS/COFF type 1
+ if (header1 == 0x60 && header2 == 0x1B)
+ return JST_ABS_TYPE1;
+
+ // ABS/COFF type 2
+ if (header1 == 0x01 && header2 == 0x50)
+ return JST_ABS_TYPE2;
+
+ // Jag Server
+ if (header1 == 0x60 && header2 == 0x1A)
+ return JST_JAGSERVER;
+
+ // Headerless crap
+ return JST_NONE;
+}
+
+#if 0
+// Misc. doco
+
+/*
+Stubulator ROM vectors...
+handler 001 at $00E00008
+handler 002 at $00E008DE
+handler 003 at $00E008E2
+handler 004 at $00E008E6
+handler 005 at $00E008EA
+handler 006 at $00E008EE
+handler 007 at $00E008F2
+handler 008 at $00E0054A
+handler 009 at $00E008FA
+handler 010 at $00000000
+handler 011 at $00000000
+handler 012 at $00E008FE
+handler 013 at $00E00902
+handler 014 at $00E00906
+handler 015 at $00E0090A
+handler 016 at $00E0090E
+handler 017 at $00E00912
+handler 018 at $00E00916
+handler 019 at $00E0091A
+handler 020 at $00E0091E
+handler 021 at $00E00922
+handler 022 at $00E00926
+handler 023 at $00E0092A
+handler 024 at $00E0092E
+handler 025 at $00E0107A
+handler 026 at $00E0107A
+handler 027 at $00E0107A
+handler 028 at $00E008DA
+handler 029 at $00E0107A
+handler 030 at $00E0107A
+handler 031 at $00E0107A
+handler 032 at $00000000
+
+Let's try setting up the illegal instruction vector for a stubulated jaguar...
+
+ SET32(jaguar_mainRam, 0x08, 0x00E008DE);
+ SET32(jaguar_mainRam, 0x0C, 0x00E008E2);
+ SET32(jaguar_mainRam, 0x10, 0x00E008E6); // <-- Should be here (it is)...
+ SET32(jaguar_mainRam, 0x14, 0x00E008EA);//*/
+
+/*
+ABS Format sleuthing (LBUGDEMO.ABS):
+
+000000 60 1B 00 00 05 0C 00 04 62 C0 00 00 04 28 00 00
+000010 12 A6 00 00 00 00 00 80 20 00 FF FF 00 80 25 0C
+000020 00 00 40 00
+
+DRI-format file detected...
+Text segment size = 0x0000050c bytes
+Data segment size = 0x000462c0 bytes
+BSS Segment size = 0x00000428 bytes
+Symbol Table size = 0x000012a6 bytes
+Absolute Address for text segment = 0x00802000
+Absolute Address for data segment = 0x0080250c
+Absolute Address for BSS segment = 0x00004000
+
+(CRZDEMO.ABS):
+000000 01 50 00 03 00 00 00 00 00 03 83 10 00 00 05 3b
+000010 00 1c 00 03 00 00 01 07 00 00 1d d0 00 03 64 98
+000020 00 06 8b 80 00 80 20 00 00 80 20 00 00 80 3d d0
+
+000030 2e 74 78 74 00 00 00 00 00 80 20 00 00 80 20 00 .txt (+36 bytes)
+000040 00 00 1d d0 00 00 00 a8 00 00 00 00 00 00 00 00
+000050 00 00 00 00 00 00 00 20
+000058 2e 64 74 61 00 00 00 00 00 80 3d d0 00 80 3d d0 .dta (+36 bytes)
+000068 00 03 64 98 00 00 1e 78 00 00 00 00 00 00 00 00
+000078 00 00 00 00 00 00 00 40
+000080 2e 62 73 73 00 00 00 00 00 00 50 00 00 00 50 00 .bss (+36 bytes)
+000090 00 06 8b 80 00 03 83 10 00 00 00 00 00 00 00 00
+0000a0 00 00 00 00 00 00 00 80
+
+Header size is $A8 bytes...
+
+BSD/COFF format file detected...
+3 sections specified
+Symbol Table offset = 230160 ($00038310)
+Symbol Table contains 1339 symbol entries ($0000053B)
+The additional header size is 28 bytes ($001C)
+Magic Number for RUN_HDR = 0x00000107
+Text Segment Size = 7632 ($00001DD0)
+Data Segment Size = 222360 ($00036498)
+BSS Segment Size = 428928 ($00068B80)
+Starting Address for executable = 0x00802000
+Start of Text Segment = 0x00802000
+Start of Data Segment = 0x00803dd0
+*/
+#endif
diff --git a/src/jaguar/file.h b/src/jaguar/file.h
new file mode 100644
index 00000000..45d2dd3e
--- /dev/null
+++ b/src/jaguar/file.h
@@ -0,0 +1,26 @@
+//
+// FILE.H
+//
+// File support
+//
+
+#ifndef __FILE_H__
+#define __FILE_H__
+
+#include "types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum FileType { FT_SOFTWARE=0, FT_EEPROM, FT_LABEL, FT_BOXART, FT_OVERLAY };
+
+uint32 JaguarLoadROM(uint8 * rom, char * path);
+bool JaguarLoadFile(char * path);
+uint32 GetFileFromZIP(const char * zipFile, FileType type, uint8 * &buffer);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __FILE_H__
diff --git a/src/jaguar/filedb.c b/src/jaguar/filedb.c
new file mode 100644
index 00000000..3f3918ec
--- /dev/null
+++ b/src/jaguar/filedb.c
@@ -0,0 +1,105 @@
+//
+// filedb.cpp - File database
+//
+// by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 02/15/2010 Created this file
+//
+
+#include "filedb.h"
+
+
+#if 0
+struct RomIdentifier
+{
+ const uint32 crc32;
+ const char name[128];
+ const char file[128];
+ const uint32 flags;
+};
+
+enum FileFlags { FF_ROM=1, FF_ALPINE=2, FF_BIOS=4, FF_REQ_DSP=8, FF_REQ_BIOS=16, FF_NON_WORKING=32, FF_BAD_DUMP=64 };
+#endif
+
+// Should have another flag for whether or not it requires DSP, BIOS,
+// whether it's a .rom, it's a BIOS, etc...
+// ... And now we do! :-D
+
+RomIdentifier romList[] = {
+ { 0x0509C85E, "Raiden (World)", "raiden.jpg", FF_ROM },
+ { 0x08F15576, "Iron Soldier (World) (v1.04)", "iron-soldier.jpg", FF_ROM },
+ { 0x0957A072, "Kasumi Ninja (World)", "kasumi-ninja.jpg", FF_ROM },
+ { 0x0AC83D77, "NBA Jam T.E. (World)", "nba-jam.jpg", FF_ROM },
+ { 0x0EC5369D, "Evolution - Dino Dudes (World)", "dino-dudes.jpg", FF_ROM },
+ { 0x0F6A1C2C, "Ultra Vortek (World)", "ultra-vortek.jpg", FF_ROM },
+ { 0x14915F20, "White Men Can't Jump (World)", "white-men-can't-jump.jpg", FF_ROM },
+ { 0x1660F070, "Power Drive Rally (World)", "power-drive-rally.jpg", FF_ROM },
+ { 0x1E451446, "Trevor McFur in the Crescent Galaxy (World)", "trevor-mcfur.jpg", FF_ROM },
+ { 0x20DBFF9F, "Breakout 2000", "breakout-2000.jpg", FF_ROM },
+ { 0x27594C6A, "Defender 2000 (World)", "defender-2000.jpg", FF_ROM },
+ { 0x2E17D5DA, "Bubsy in Fractured Furry Tales (World)", "bubsy.jpg", FF_ROM },
+ { 0x348E6449, "Double Dragon V - The Shadow Falls (World)", "double-dragon.jpg", FF_ROM },
+ { 0x3615AF6A, "Fever Pitch Soccer (World) (En,Fr,De,Es,It)", "fever-pitch-soccer.jpg", FF_ROM },
+ { 0x38A130ED, "Troy Aikman NFL Football (World)", "troy-aikman-football.jpg", FF_ROM },
+ { 0x3C044941, "Skyhammer (World)", "skyhammer.jpg", FF_ROM },
+ { 0x40E1A1D0, "Air Cars (World)", "air-cars.jpg", FF_ROM },
+ { 0x42A13EC5, "Soccer Kid (World)", "soccer-kid.jpg", FF_ROM },
+ { 0x45AA46BA, "Space War 2000 (World)", "", FF_ROM },
+ { 0x47EBC158, "Theme Park (World)", "theme-park.jpg", FF_ROM },
+ { 0x4899628F, "Hover Strike (World)", "hover-strike.jpg", FF_ROM },
+ { 0x53DF6440, "Space War 2000 (World) (OVERDUMP)", "", FF_ROM },
+ { 0x55A0669C, "[BIOS] Atari Jaguar Developer CD (World)", "", FF_BIOS },
+ { 0x58272540, "Syndicate (World)", "syndicate.jpg", FF_ROM },
+ { 0x5A101212, "Sensible Soccer - International Edition (World)", "sensible-soccer.jpg", FF_ROM },
+ { 0x5B6BB205, "Ruiner Pinball (World)", "ruiner-pinball.jpg", FF_ROM },
+ { 0x5CFF14AB, "Pinball Fantasies (World)", "pinball-fantasies.jpg", FF_ROM },
+ { 0x5E2CDBC0, "Doom (World)", "doom.jpg", FF_ROM },
+ { 0x61C7EEC0, "Zero 5 (World)", "zero-5.jpg", FF_ROM },
+ { 0x67F9AB3A, "Battle Sphere Gold (World)", "", FF_ROM },
+ { 0x687068D5, "[BIOS] Atari Jaguar CD (World)", "", FF_BIOS },
+ { 0x6B2B95AD, "Tempest 2000 (World)", "tempest-2000.jpg", FF_ROM },
+ { 0x6EB774EB, "Worms (World)", "worms.jpg", FF_ROM },
+ { 0x6F8B2547, "Super Burnout (World)", "super-burnout.jpg", FF_ROM },
+ { 0x817A2273, "Pitfall - The Mayan Adventure (World)", "pitfall.jpg", FF_ROM },
+ { 0x8975F48B, "Zool 2 (World)", "zool-2.jpg", FF_ROM },
+ { 0x8D15DBC6, "[BIOS] Atari Jaguar Stubulator '94 (World)", "", FF_BIOS },
+ { 0x8FEA5AB0, "Dragon - The Bruce Lee Story (World)", "dragon.jpg", FF_ROM },
+ { 0x97EB4651, "I-War (World)", "i-war.jpg", FF_ROM },
+ { 0xA27823D8, "Ultra Vortek (World) (v0.94) (Beta)", "", FF_ROM },
+ { 0xA56D0798, "Protector - Special Edition (World)", "protector-se.jpg", FF_ROM },
+ { 0xA9F8A00E, "Rayman (World)", "rayman.jpg", FF_ROM },
+ { 0xB14C4753, "Fight for Life (World)", "fight-for-life.jpg", FF_ROM },
+ { 0xBCB1A4BF, "Brutal Sports Football (World)", "brutal-sports-football.jpg", FF_ROM },
+ { 0xBDA405C6, "Cannon Fodder (World)", "cannon-fodder.jpg", FF_ROM },
+ { 0xBDE67498, "Cybermorph (World) (Rev 1)", "cybermorph-2mb.jpg", FF_ROM },
+ { 0xC5562581, "Zoop! (World)", "zoop.jpg", FF_ROM },
+ { 0xC654681B, "Total Carnage (World)", "total-carnage.jpg", FF_ROM },
+ { 0xC6C7BA62, "Fight for Life (World) (Alt)", "", FF_ROM | FF_BAD_DUMP },
+ { 0xC9608717, "Val d'Isere Skiing and Snowboarding (World)", "val-d'isere-skiing.jpg", FF_ROM },
+ { 0xCAF33BD6, "Towers II", "towers-2.jpg", FF_ROM },
+ { 0xCD5BF827, "Attack of the Mutant Penguins (World)", "attack-of-the-mutant-pengiuns.jpg", FF_ROM },
+ { 0xD6C19E34, "Iron Soldier 2 (World)", "iron-soldier-2.jpg", FF_ROM },
+ { 0xDA9C4162, "Missile Command 3D (World)", "missile-command-3d.jpg", FF_ROM },
+ { 0xDC187F82, "Alien vs Predator (World)", "alien-vs-predator.jpg", FF_ROM },
+ { 0xDE55DCC7, "Flashback - The Quest for Identity (World) (En,Fr)", "flashback.jpg", FF_ROM },
+ { 0xE28756DE, "Atari Karts (World)", "atari-karts.jpg", FF_ROM },
+ { 0xE60277BB, "[BIOS] Atari Jaguar Stubulator '93 (World)", "", FF_BIOS },
+ { 0xE91BD644, "Wolfenstein 3D (World)", "wolfenstein-3d.jpg", FF_ROM },
+ { 0xEC22F572, "SuperCross 3D (World)", "supercross-3d.jpg", FF_ROM },
+ { 0xECF854E7, "Cybermorph (World) (Rev 2)", "cybermorph.jpg", FF_ROM },
+ { 0xEEE8D61D, "Club Drive (World)", "club-drive.jpg", FF_ROM },
+ { 0xF0360DB3, "Hyper Force (World)", "hyper-force.jpg", FF_ROM },
+ { 0xFA7775AE, "Checkered Flag (World)", "checkered-flag.jpg", FF_ROM },
+ { 0xFAE31DD0, "Flip Out! (World)", "flip-out.jpg", FF_ROM },
+ { 0xFB731AAA, "[BIOS] Atari Jaguar (World)", "", FF_BIOS },
+ { 0xFFFFFFFF, "***END***", "", 0 }
+};
+/*
+memory-track.jpg
+protector.jpg
+*/
diff --git a/src/jaguar/filedb.h b/src/jaguar/filedb.h
new file mode 100644
index 00000000..685f31ff
--- /dev/null
+++ b/src/jaguar/filedb.h
@@ -0,0 +1,28 @@
+//
+// filedb.h: File database definition
+//
+
+#ifndef __FILEDB_H__
+#define __FILEDB_H__
+
+#include "types.h"
+
+// Useful enumerations
+
+enum FileFlags { FF_ROM=1, FF_ALPINE=2, FF_BIOS=4, FF_REQ_DSP=8, FF_REQ_BIOS=16, FF_NON_WORKING=32, FF_BAD_DUMP=64 };
+
+// Useful structs
+
+struct RomIdentifier
+{
+ const uint32 crc32;
+ const char name[128];
+ const char file[128];
+ const uint32 flags;
+};
+
+// So other stuff can pull this in...
+
+extern RomIdentifier romList[];
+
+#endif // __FILEDB_H__
diff --git a/src/jaguar/gpu.c b/src/jaguar/gpu.c
new file mode 100644
index 00000000..b8011a03
--- /dev/null
+++ b/src/jaguar/gpu.c
@@ -0,0 +1,2442 @@
+#if 1
+
+//
+// GPU Core
+//
+// Originally by David Raingeard (Cal2)
+// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
+// Cleanups, endian wrongness, and bad ASM amelioration by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+
+//
+// Note: Endian wrongness probably stems from the MAME origins of this emu and
+// the braindead way in which MAME handles memory. :-)
+//
+// Problem with not booting the BIOS was the incorrect way that the
+// SUBC instruction set the carry when the carry was set going in...
+// Same problem with ADDC...
+//
+
+#include "gpu.h"
+
+#include <stdlib.h>
+#include <string.h> // For memset
+#include "dsp.h"
+#include "jagdasm.h"
+#include "jaguar.h"
+#include "log.h"
+#include "m68k.h"
+//#include "memory.h"
+#include "tom.h"
+
+//#define GPU_DEBUG
+
+// For GPU dissasembly...
+
+#define GPU_DIS_ABS
+#define GPU_DIS_ADD
+#define GPU_DIS_ADDC
+#define GPU_DIS_ADDQ
+#define GPU_DIS_ADDQT
+#define GPU_DIS_AND
+#define GPU_DIS_BCLR
+#define GPU_DIS_BSET
+#define GPU_DIS_BTST
+#define GPU_DIS_CMP
+#define GPU_DIS_CMPQ
+#define GPU_DIS_DIV
+#define GPU_DIS_IMULT
+#define GPU_DIS_JUMP
+#define GPU_DIS_JR
+#define GPU_DIS_LOAD
+#define GPU_DIS_LOADB
+#define GPU_DIS_LOADW
+#define GPU_DIS_LOAD14I
+#define GPU_DIS_LOAD14R
+#define GPU_DIS_LOAD15I
+#define GPU_DIS_LOAD15R
+#define GPU_DIS_MOVE
+#define GPU_DIS_MOVEFA
+#define GPU_DIS_MOVEI
+#define GPU_DIS_MOVEPC
+#define GPU_DIS_MOVETA
+#define GPU_DIS_MOVEQ
+#define GPU_DIS_MULT
+#define GPU_DIS_NEG
+#define GPU_DIS_NOP
+#define GPU_DIS_NOT
+#define GPU_DIS_OR
+#define GPU_DIS_PACK
+#define GPU_DIS_ROR
+#define GPU_DIS_RORQ
+#define GPU_DIS_SAT8
+#define GPU_DIS_SH
+#define GPU_DIS_SHA
+#define GPU_DIS_SHARQ
+#define GPU_DIS_SHLQ
+#define GPU_DIS_SHRQ
+#define GPU_DIS_STORE
+#define GPU_DIS_STOREB
+#define GPU_DIS_STOREW
+#define GPU_DIS_STORE14I
+#define GPU_DIS_STORE14R
+#define GPU_DIS_STORE15I
+#define GPU_DIS_STORE15R
+#define GPU_DIS_SUB
+#define GPU_DIS_SUBC
+#define GPU_DIS_SUBQ
+#define GPU_DIS_SUBQT
+#define GPU_DIS_XOR
+
+bool doGPUDis = false;
+//bool doGPUDis = true;
+//*/
+/*
+GPU opcodes use (BIOS flying ATARI logo):
++ add 357416
++ addq 538030
++ addqt 6999
++ sub 116663
++ subq 188059
++ subqt 15086
++ neg 36097
++ and 233993
++ or 109332
++ xor 1384
++ btst 111924
++ bset 25029
++ bclr 10551
++ mult 28147
++ imult 69148
++ div 64102
++ abs 159394
++ shlq 194690
++ shrq 292587
++ sharq 192649
++ rorq 58672
++ cmp 244963
++ cmpq 114834
++ move 833472
++ moveq 56427
++ moveta 220814
++ movefa 170678
++ movei 152025
++ loadw 108220
++ load 430936
++ storew 3036
++ store 372490
++ move_pc 2330
++ jump 349134
++ jr 529171
+ mmult 64904
++ nop 432179
+*/
+
+// Various bits
+
+#define CINT0FLAG 0x0200
+#define CINT1FLAG 0x0400
+#define CINT2FLAG 0x0800
+#define CINT3FLAG 0x1000
+#define CINT4FLAG 0x2000
+#define CINT04FLAGS (CINT0FLAG | CINT1FLAG | CINT2FLAG | CINT3FLAG | CINT4FLAG)
+
+// GPU_FLAGS bits
+
+#define ZERO_FLAG 0x0001
+#define CARRY_FLAG 0x0002
+#define NEGA_FLAG 0x0004
+#define IMASK 0x0008
+#define INT_ENA0 0x0010
+#define INT_ENA1 0x0020
+#define INT_ENA2 0x0040
+#define INT_ENA3 0x0080
+#define INT_ENA4 0x0100
+#define INT_CLR0 0x0200
+#define INT_CLR1 0x0400
+#define INT_CLR2 0x0800
+#define INT_CLR3 0x1000
+#define INT_CLR4 0x2000
+#define REGPAGE 0x4000
+#define DMAEN 0x8000
+
+// External global variables
+
+extern int start_logging;
+extern int gpu_start_log;
+
+// Private function prototypes
+
+void GPUUpdateRegisterBanks(void);
+void GPUDumpDisassembly(void);
+void GPUDumpRegisters(void);
+void GPUDumpMemory(void);
+
+static void gpu_opcode_add(void);
+static void gpu_opcode_addc(void);
+static void gpu_opcode_addq(void);
+static void gpu_opcode_addqt(void);
+static void gpu_opcode_sub(void);
+static void gpu_opcode_subc(void);
+static void gpu_opcode_subq(void);
+static void gpu_opcode_subqt(void);
+static void gpu_opcode_neg(void);
+static void gpu_opcode_and(void);
+static void gpu_opcode_or(void);
+static void gpu_opcode_xor(void);
+static void gpu_opcode_not(void);
+static void gpu_opcode_btst(void);
+static void gpu_opcode_bset(void);
+static void gpu_opcode_bclr(void);
+static void gpu_opcode_mult(void);
+static void gpu_opcode_imult(void);
+static void gpu_opcode_imultn(void);
+static void gpu_opcode_resmac(void);
+static void gpu_opcode_imacn(void);
+static void gpu_opcode_div(void);
+static void gpu_opcode_abs(void);
+static void gpu_opcode_sh(void);
+static void gpu_opcode_shlq(void);
+static void gpu_opcode_shrq(void);
+static void gpu_opcode_sha(void);
+static void gpu_opcode_sharq(void);
+static void gpu_opcode_ror(void);
+static void gpu_opcode_rorq(void);
+static void gpu_opcode_cmp(void);
+static void gpu_opcode_cmpq(void);
+static void gpu_opcode_sat8(void);
+static void gpu_opcode_sat16(void);
+static void gpu_opcode_move(void);
+static void gpu_opcode_moveq(void);
+static void gpu_opcode_moveta(void);
+static void gpu_opcode_movefa(void);
+static void gpu_opcode_movei(void);
+static void gpu_opcode_loadb(void);
+static void gpu_opcode_loadw(void);
+static void gpu_opcode_load(void);
+static void gpu_opcode_loadp(void);
+static void gpu_opcode_load_r14_indexed(void);
+static void gpu_opcode_load_r15_indexed(void);
+static void gpu_opcode_storeb(void);
+static void gpu_opcode_storew(void);
+static void gpu_opcode_store(void);
+static void gpu_opcode_storep(void);
+static void gpu_opcode_store_r14_indexed(void);
+static void gpu_opcode_store_r15_indexed(void);
+static void gpu_opcode_move_pc(void);
+static void gpu_opcode_jump(void);
+static void gpu_opcode_jr(void);
+static void gpu_opcode_mmult(void);
+static void gpu_opcode_mtoi(void);
+static void gpu_opcode_normi(void);
+static void gpu_opcode_nop(void);
+static void gpu_opcode_load_r14_ri(void);
+static void gpu_opcode_load_r15_ri(void);
+static void gpu_opcode_store_r14_ri(void);
+static void gpu_opcode_store_r15_ri(void);
+static void gpu_opcode_sat24(void);
+static void gpu_opcode_pack(void);
+
+// This is wrong, since it doesn't take pipeline effects into account. !!! FIX !!!
+/*uint8 gpu_opcode_cycles[64] =
+{
+ 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 1, 3, 1, 18, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 2, 2, 2, 2, 3, 4,
+ 5, 4, 5, 6, 6, 1, 1, 1,
+ 1, 2, 2, 2, 1, 1, 9, 3,
+ 3, 1, 6, 6, 2, 2, 3, 3
+};//*/
+//Here's a QnD kludge...
+//This is wrong, wrong, WRONG, but it seems to work for the time being...
+//(That is, it fixes Flip Out which relies on GPU timing rather than semaphores. Bad developers! Bad!)
+//What's needed here is a way to take pipeline effects into account (including pipeline stalls!)...
+/*uint8 gpu_opcode_cycles[64] =
+{
+ 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 9, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 2,
+ 2, 2, 2, 3, 3, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 4, 1,
+ 1, 1, 3, 3, 1, 1, 1, 1
+};//*/
+uint8 gpu_opcode_cycles[64] =
+{
+ 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1
+};//*/
+
+void (*gpu_opcode[64])()=
+{
+ gpu_opcode_add, gpu_opcode_addc, gpu_opcode_addq, gpu_opcode_addqt,
+ gpu_opcode_sub, gpu_opcode_subc, gpu_opcode_subq, gpu_opcode_subqt,
+ gpu_opcode_neg, gpu_opcode_and, gpu_opcode_or, gpu_opcode_xor,
+ gpu_opcode_not, gpu_opcode_btst, gpu_opcode_bset, gpu_opcode_bclr,
+ gpu_opcode_mult, gpu_opcode_imult, gpu_opcode_imultn, gpu_opcode_resmac,
+ gpu_opcode_imacn, gpu_opcode_div, gpu_opcode_abs, gpu_opcode_sh,
+ gpu_opcode_shlq, gpu_opcode_shrq, gpu_opcode_sha, gpu_opcode_sharq,
+ gpu_opcode_ror, gpu_opcode_rorq, gpu_opcode_cmp, gpu_opcode_cmpq,
+ gpu_opcode_sat8, gpu_opcode_sat16, gpu_opcode_move, gpu_opcode_moveq,
+ gpu_opcode_moveta, gpu_opcode_movefa, gpu_opcode_movei, gpu_opcode_loadb,
+ gpu_opcode_loadw, gpu_opcode_load, gpu_opcode_loadp, gpu_opcode_load_r14_indexed,
+ gpu_opcode_load_r15_indexed, gpu_opcode_storeb, gpu_opcode_storew, gpu_opcode_store,
+ gpu_opcode_storep, gpu_opcode_store_r14_indexed, gpu_opcode_store_r15_indexed, gpu_opcode_move_pc,
+ gpu_opcode_jump, gpu_opcode_jr, gpu_opcode_mmult, gpu_opcode_mtoi,
+ gpu_opcode_normi, gpu_opcode_nop, gpu_opcode_load_r14_ri, gpu_opcode_load_r15_ri,
+ gpu_opcode_store_r14_ri, gpu_opcode_store_r15_ri, gpu_opcode_sat24, gpu_opcode_pack,
+};
+
+static uint8 gpu_ram_8[0x1000];
+uint32 gpu_pc;
+static uint32 gpu_acc;
+static uint32 gpu_remain;
+static uint32 gpu_hidata;
+static uint32 gpu_flags;
+static uint32 gpu_matrix_control;
+static uint32 gpu_pointer_to_matrix;
+static uint32 gpu_data_organization;
+static uint32 gpu_control;
+static uint32 gpu_div_control;
+// There is a distinct advantage to having these separated out--there's no need to clear
+// a bit before writing a result. I.e., if the result of an operation leaves a zero in
+// the carry flag, you don't have to zero gpu_flag_c before you can write that zero!
+static uint8 gpu_flag_z, gpu_flag_n, gpu_flag_c;
+static uint32 gpu_reg_bank_0[32];
+static uint32 gpu_reg_bank_1[32];
+static uint32 * gpu_reg;
+static uint32 * gpu_alternate_reg;
+
+static uint32 gpu_instruction;
+static uint32 gpu_opcode_first_parameter;
+static uint32 gpu_opcode_second_parameter;
+
+#define GPU_RUNNING (gpu_control & 0x01)
+
+#define RM gpu_reg[gpu_opcode_first_parameter]
+#define RN gpu_reg[gpu_opcode_second_parameter]
+#define ALTERNATE_RM gpu_alternate_reg[gpu_opcode_first_parameter]
+#define ALTERNATE_RN gpu_alternate_reg[gpu_opcode_second_parameter]
+#define IMM_1 gpu_opcode_first_parameter
+#define IMM_2 gpu_opcode_second_parameter
+
+#define SET_FLAG_Z(r) (gpu_flag_z = ((r) == 0));
+#define SET_FLAG_N(r) (gpu_flag_n = (((uint32)(r) >> 31) & 0x01));
+
+#define RESET_FLAG_Z() gpu_flag_z = 0;
+#define RESET_FLAG_N() gpu_flag_n = 0;
+#define RESET_FLAG_C() gpu_flag_c = 0;
+
+#define CLR_Z (gpu_flag_z = 0)
+#define CLR_ZN (gpu_flag_z = gpu_flag_n = 0)
+#define CLR_ZNC (gpu_flag_z = gpu_flag_n = gpu_flag_c = 0)
+#define SET_Z(r) (gpu_flag_z = ((r) == 0))
+#define SET_N(r) (gpu_flag_n = (((uint32)(r) >> 31) & 0x01))
+#define SET_C_ADD(a,b) (gpu_flag_c = ((uint32)(b) > (uint32)(~(a))))
+#define SET_C_SUB(a,b) (gpu_flag_c = ((uint32)(b) > (uint32)(a)))
+#define SET_ZN(r) SET_N(r); SET_Z(r)
+#define SET_ZNC_ADD(a,b,r) SET_N(r); SET_Z(r); SET_C_ADD(a,b)
+#define SET_ZNC_SUB(a,b,r) SET_N(r); SET_Z(r); SET_C_SUB(a,b)
+
+uint32 gpu_convert_zero[32] =
+ { 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 };
+
+uint8 * branch_condition_table = 0;
+#define BRANCH_CONDITION(x) branch_condition_table[(x) + ((jaguar_flags & 7) << 5)]
+
+uint32 gpu_opcode_use[64];
+
+const char * gpu_opcode_str[64]=
+{
+ "add", "addc", "addq", "addqt",
+ "sub", "subc", "subq", "subqt",
+ "neg", "and", "or", "xor",
+ "not", "btst", "bset", "bclr",
+ "mult", "imult", "imultn", "resmac",
+ "imacn", "div", "abs", "sh",
+ "shlq", "shrq", "sha", "sharq",
+ "ror", "rorq", "cmp", "cmpq",
+ "sat8", "sat16", "move", "moveq",
+ "moveta", "movefa", "movei", "loadb",
+ "loadw", "load", "loadp", "load_r14_indexed",
+ "load_r15_indexed", "storeb", "storew", "store",
+ "storep", "store_r14_indexed","store_r15_indexed","move_pc",
+ "jump", "jr", "mmult", "mtoi",
+ "normi", "nop", "load_r14_ri", "load_r15_ri",
+ "store_r14_ri", "store_r15_ri", "sat24", "pack",
+};
+
+static uint32 gpu_in_exec = 0;
+static uint32 gpu_releaseTimeSlice_flag = 0;
+
+void GPUReleaseTimeslice(void)
+{
+ gpu_releaseTimeSlice_flag = 1;
+}
+
+uint32 GPUGetPC(void)
+{
+ return gpu_pc;
+}
+
+void build_branch_condition_table(void)
+{
+ if (!branch_condition_table)
+ {
+ branch_condition_table = (uint8 *)malloc(32 * 8 * sizeof(branch_condition_table[0]));
+
+ if (branch_condition_table)
+ {
+ for(int i=0; i<8; i++)
+ {
+ for(int j=0; j<32; j++)
+ {
+ int result = 1;
+ if (j & 1)
+ if (i & ZERO_FLAG)
+ result = 0;
+ if (j & 2)
+ if (!(i & ZERO_FLAG))
+ result = 0;
+ if (j & 4)
+ if (i & (CARRY_FLAG << (j >> 4)))
+ result = 0;
+ if (j & 8)
+ if (!(i & (CARRY_FLAG << (j >> 4))))
+ result = 0;
+ branch_condition_table[i * 32 + j] = result;
+ }
+ }
+ }
+ }
+}
+
+//
+// GPU byte access (read)
+//
+uint8 GPUReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ if (offset >= 0xF02000 && offset <= 0xF020FF)
+ WriteLog("GPU: ReadByte--Attempt to read from GPU register file by %s!\n", whoName[who]);
+
+ if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
+ return gpu_ram_8[offset & 0xFFF];
+ else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
+ {
+ uint32 data = GPUReadLong(offset & 0xFFFFFFFC, who);
+
+ if ((offset & 0x03) == 0)
+ return data >> 24;
+ else if ((offset & 0x03) == 1)
+ return (data >> 16) & 0xFF;
+ else if ((offset & 0x03) == 2)
+ return (data >> 8) & 0xFF;
+ else if ((offset & 0x03) == 3)
+ return data & 0xFF;
+ }
+
+ return JaguarReadByte(offset, who);
+}
+
+//
+// GPU word access (read)
+//
+uint16 GPUReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ if (offset >= 0xF02000 && offset <= 0xF020FF)
+ WriteLog("GPU: ReadWord--Attempt to read from GPU register file by %s!\n", whoName[who]);
+
+ if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
+ {
+ offset &= 0xFFF;
+ uint16 data = ((uint16)gpu_ram_8[offset] << 8) | (uint16)gpu_ram_8[offset+1];
+ return data;
+ }
+ else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
+ {
+// This looks and smells wrong...
+// But it *might* be OK...
+ if (offset & 0x01) // Catch cases 1 & 3... (unaligned read)
+ return (GPUReadByte(offset, who) << 8) | GPUReadByte(offset+1, who);
+
+ uint32 data = GPUReadLong(offset & 0xFFFFFFFC, who);
+
+ if (offset & 0x02) // Cases 0 & 2...
+ return data & 0xFFFF;
+ else
+ return data >> 16;
+ }
+
+//TEMP--Mirror of F03000? No. Writes only...
+//if (offset >= 0xF0B000 && offset <= 0xF0BFFF)
+//WriteLog("[GPUR16] --> Possible GPU RAM mirror access by %s!", whoName[who]);
+
+ return JaguarReadWord(offset, who);
+}
+
+//
+// GPU dword access (read)
+//
+uint32 GPUReadLong(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ if (offset >= 0xF02000 && offset <= 0xF020FF)
+ WriteLog("GPU: ReadLong--Attempt to read from GPU register file by %s!\n", whoName[who]);
+
+// if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE + 0x1000))
+ if ((offset >= GPU_WORK_RAM_BASE) && (offset <= GPU_WORK_RAM_BASE + 0x0FFC))
+ {
+ offset &= 0xFFF;
+ return ((uint32)gpu_ram_8[offset] << 24) | ((uint32)gpu_ram_8[offset+1] << 16)
+ | ((uint32)gpu_ram_8[offset+2] << 8) | (uint32)gpu_ram_8[offset+3];//*/
+// return GET32(gpu_ram_8, offset);
+ }
+// else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
+ else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset <= GPU_CONTROL_RAM_BASE + 0x1C))
+ {
+ offset &= 0x1F;
+ switch (offset)
+ {
+ case 0x00:
+ gpu_flag_c = (gpu_flag_c ? 1 : 0);
+ gpu_flag_z = (gpu_flag_z ? 1 : 0);
+ gpu_flag_n = (gpu_flag_n ? 1 : 0);
+
+ gpu_flags = (gpu_flags & 0xFFFFFFF8) | (gpu_flag_n << 2) | (gpu_flag_c << 1) | gpu_flag_z;
+
+ return gpu_flags & 0xFFFFC1FF;
+ case 0x04:
+ return gpu_matrix_control;
+ case 0x08:
+ return gpu_pointer_to_matrix;
+ case 0x0C:
+ return gpu_data_organization;
+ case 0x10:
+ return gpu_pc;
+ case 0x14:
+ return gpu_control;
+ case 0x18:
+ return gpu_hidata;
+ case 0x1C:
+ return gpu_remain;
+ default: // unaligned long read
+#ifdef GPU_DEBUG
+ WriteLog("GPU: Read32--unaligned 32 bit read at %08X by %s.\n", GPU_CONTROL_RAM_BASE + offset, whoName[who]);
+#endif // GPU_DEBUG
+ return 0;
+ }
+ }
+//TEMP--Mirror of F03000? No. Writes only...
+//if (offset >= 0xF0B000 && offset <= 0xF0BFFF)
+// WriteLog("[GPUR32] --> Possible GPU RAM mirror access by %s!\n", whoName[who]);
+/*if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
+ WriteLog("[GPUR32] --> Reading from Wavetable ROM!\n");//*/
+
+ return (JaguarReadWord(offset, who) << 16) | JaguarReadWord(offset + 2, who);
+}
+
+//
+// GPU byte access (write)
+//
+void GPUWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
+{
+ if (offset >= 0xF02000 && offset <= 0xF020FF)
+ WriteLog("GPU: WriteByte--Attempt to write to GPU register file by %s!\n", whoName[who]);
+
+ if ((offset >= GPU_WORK_RAM_BASE) && (offset <= GPU_WORK_RAM_BASE + 0x0FFF))
+ {
+ gpu_ram_8[offset & 0xFFF] = data;
+
+//This is the same stupid worthless code that was in the DSP!!! AARRRGGGGHHHHH!!!!!!
+/* if (!gpu_in_exec)
+ {
+ m68k_end_timeslice();
+ dsp_releaseTimeslice();
+ }*/
+ return;
+ }
+ else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset <= GPU_CONTROL_RAM_BASE + 0x1F))
+ {
+ uint32 reg = offset & 0x1C;
+ int bytenum = offset & 0x03;
+
+//This is definitely wrong!
+ if ((reg >= 0x1C) && (reg <= 0x1F))
+ gpu_div_control = (gpu_div_control & (~(0xFF << (bytenum << 3)))) | (data << (bytenum << 3));
+ else
+ {
+ uint32 old_data = GPUReadLong(offset & 0xFFFFFFC, who);
+ bytenum = 3 - bytenum; // convention motorola !!!
+ old_data = (old_data & (~(0xFF << (bytenum << 3)))) | (data << (bytenum << 3));
+ GPUWriteLong(offset & 0xFFFFFFC, old_data, who);
+ }
+ return;
+ }
+// WriteLog("gpu: writing %.2x at 0x%.8x\n",data,offset);
+ JaguarWriteByte(offset, data, who);
+}
+
+//
+// GPU word access (write)
+//
+void GPUWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
+{
+ if (offset >= 0xF02000 && offset <= 0xF020FF)
+ WriteLog("GPU: WriteWord--Attempt to write to GPU register file by %s!\n", whoName[who]);
+
+ if ((offset >= GPU_WORK_RAM_BASE) && (offset <= GPU_WORK_RAM_BASE + 0x0FFE))
+ {
+ gpu_ram_8[offset & 0xFFF] = (data>>8) & 0xFF;
+ gpu_ram_8[(offset+1) & 0xFFF] = data & 0xFF;//*/
+/* offset &= 0xFFF;
+ SET16(gpu_ram_8, offset, data);//*/
+
+/*if (offset >= 0xF03214 && offset < 0xF0321F)
+ WriteLog("GPU: Writing WORD (%04X) to GPU RAM (%08X)...\n", data, offset);//*/
+
+
+//This is the same stupid worthless code that was in the DSP!!! AARRRGGGGHHHHH!!!!!!
+/* if (!gpu_in_exec)
+ {
+ m68k_end_timeslice();
+ dsp_releaseTimeslice();
+ }*/
+ return;
+ }
+ else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset <= GPU_CONTROL_RAM_BASE + 0x1E))
+ {
+ if (offset & 0x01) // This is supposed to weed out unaligned writes, but does nothing...
+ {
+#ifdef GPU_DEBUG
+ WriteLog("GPU: Write16--unaligned write @ %08X [%04X]\n", offset, data);
+ GPUDumpRegisters();
+#endif // GPU_DEBUG
+ return;
+ }
+//Dual locations in this range: $1C Divide unit remainder/Divide unit control (R/W)
+//This just literally sucks.
+ if ((offset & 0x1C) == 0x1C)
+ {
+//This doesn't look right either--handles cases 1, 2, & 3 all the same!
+ if (offset & 0x02)
+ gpu_div_control = (gpu_div_control & 0xFFFF0000) | (data & 0xFFFF);
+ else
+ gpu_div_control = (gpu_div_control & 0x0000FFFF) | ((data & 0xFFFF) << 16);
+ }
+ else
+ {
+//WriteLog("[GPU W16:%08X,%04X]", offset, data);
+ uint32 old_data = GPUReadLong(offset & 0xFFFFFFC, who);
+ if (offset & 0x02)
+ old_data = (old_data & 0xFFFF0000) | (data & 0xFFFF);
+ else
+ old_data = (old_data & 0x0000FFFF) | ((data & 0xFFFF) << 16);
+ GPUWriteLong(offset & 0xFFFFFFC, old_data, who);
+ }
+ return;
+ }
+ else if ((offset == GPU_WORK_RAM_BASE + 0x0FFF) || (GPU_CONTROL_RAM_BASE + 0x1F))
+ {
+#ifdef GPU_DEBUG
+ WriteLog("GPU: Write16--unaligned write @ %08X by %s [%04X]!\n", offset, whoName[who], data);
+ GPUDumpRegisters();
+#endif // GPU_DEBUG
+ return;
+ }
+
+ // Have to be careful here--this can cause an infinite loop!
+ JaguarWriteWord(offset, data, who);
+}
+
+//
+// GPU dword access (write)
+//
+void GPUWriteLong(uint32 offset, uint32 data, uint32 who/*=UNKNOWN*/)
+{
+ if (offset >= 0xF02000 && offset <= 0xF020FF)
+ WriteLog("GPU: WriteLong--Attempt to write to GPU register file by %s!\n", whoName[who]);
+
+// if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE + 0x1000))
+ if ((offset >= GPU_WORK_RAM_BASE) && (offset <= GPU_WORK_RAM_BASE + 0x0FFC))
+ {
+#ifdef GPU_DEBUG
+ if (offset & 0x03)
+ {
+ WriteLog("GPU: Write32--unaligned write @ %08X [%08X] by %s\n", offset, data, whoName[who]);
+ GPUDumpRegisters();
+ }
+#endif // GPU_DEBUG
+
+ offset &= 0xFFF;
+ SET32(gpu_ram_8, offset, data);
+ return;
+ }
+// else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
+ else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset <= GPU_CONTROL_RAM_BASE + 0x1C))
+ {
+ offset &= 0x1F;
+ switch (offset)
+ {
+ case 0x00:
+ {
+ bool IMASKCleared = (gpu_flags & IMASK) && !(data & IMASK);
+ gpu_flags = data & ~IMASK;
+ gpu_flag_z = gpu_flags & ZERO_FLAG;
+ gpu_flag_c = (gpu_flags & CARRY_FLAG) >> 1;
+ gpu_flag_n = (gpu_flags & NEGA_FLAG) >> 2;
+ GPUUpdateRegisterBanks();
+ gpu_control &= ~((gpu_flags & CINT04FLAGS) >> 3); // Interrupt latch clear bits
+//Writing here is only an interrupt enable--this approach is just plain wrong!
+// GPUHandleIRQs();
+//This, however, is A-OK! ;-)
+ if (IMASKCleared) // If IMASK was cleared,
+ GPUHandleIRQs(); // see if any other interrupts need servicing!
+#ifdef GPU_DEBUG
+ if (gpu_flags & (INT_ENA0 | INT_ENA1 | INT_ENA2 | INT_ENA3 | INT_ENA4))
+ WriteLog("GPU: Interrupt enable set by %s! Bits: %02X\n", whoName[who], (gpu_flags >> 4) & 0x1F);
+ WriteLog("GPU: REGPAGE %s...\n", (gpu_flags & REGPAGE ? "set" : "cleared"));
+#endif // GPU_DEBUG
+ break;
+ }
+ case 0x04:
+ gpu_matrix_control = data;
+ break;
+ case 0x08:
+ // This can only point to long aligned addresses
+ gpu_pointer_to_matrix = data & 0xFFFFFFFC;
+ break;
+ case 0x0C:
+ gpu_data_organization = data;
+ break;
+ case 0x10:
+ gpu_pc = data;
+#ifdef GPU_DEBUG
+WriteLog("GPU: %s setting GPU PC to %08X %s\n", whoName[who], gpu_pc, (GPU_RUNNING ? "(GPU is RUNNING!)" : ""));//*/
+#endif // GPU_DEBUG
+ break;
+ case 0x14:
+ {
+// uint32 gpu_was_running = GPU_RUNNING;
+ data &= ~0xF7C0; // Disable writes to INT_LAT0-4 & TOM version number
+
+ // check for GPU -> CPU interrupt
+ if (data & 0x02)
+ {
+//WriteLog("GPU->CPU interrupt\n");
+ if (TOMIRQEnabled(IRQ_GPU))
+ {
+ if ((TOMIRQEnabled(IRQ_GPU)) && (JaguarInterruptHandlerIsValid(64)))
+ {
+ TOMSetPendingGPUInt();
+ m68k_set_irq(7); // Set 68000 NMI
+ GPUReleaseTimeslice();
+ }
+ }
+ data &= ~0x02;
+ }
+
+ // check for CPU -> GPU interrupt #0
+ if (data & 0x04)
+ {
+//WriteLog("CPU->GPU interrupt\n");
+ GPUSetIRQLine(0, ASSERT_LINE);
+ m68k_end_timeslice();
+ DSPReleaseTimeslice();
+ data &= ~0x04;
+ }
+
+ // single stepping
+ if (data & 0x10)
+ {
+ //WriteLog("asked to perform a single step (single step is %senabled)\n",(data&0x8)?"":"not ");
+ }
+ gpu_control = (gpu_control & 0xF7C0) | (data & (~0xF7C0));
+
+ // if gpu wasn't running but is now running, execute a few cycles
+#ifndef GPU_SINGLE_STEPPING
+/* if (!gpu_was_running && GPU_RUNNING)
+#ifdef GPU_DEBUG
+ {
+ WriteLog("GPU: Write32--About to do stupid braindead GPU execution for 200 cycles.\n");
+#endif // GPU_DEBUG
+ GPUExec(200);
+#ifdef GPU_DEBUG
+ }
+#endif // GPU_DEBUG//*/
+#else
+ if (gpu_control & 0x18)
+ GPUExec(1);
+#endif // #ifndef GPU_SINGLE_STEPPING
+#ifdef GPU_DEBUG
+WriteLog("Write to GPU CTRL by %s: %08X ", whoName[who], data);
+if (GPU_RUNNING)
+ WriteLog(" --> Starting to run at %08X by %s...", gpu_pc, whoName[who]);
+else
+ WriteLog(" --> Stopped by %s! (GPU_PC: %08X)", whoName[who], gpu_pc);
+WriteLog("\n");
+#endif // GPU_DEBUG
+//if (GPU_RUNNING)
+// GPUDumpDisassembly();
+/*if (GPU_RUNNING)
+{
+ if (gpu_pc == 0xF035D8)
+ {
+// GPUDumpDisassembly();
+// log_done();
+// exit(1);
+ gpu_control &= 0xFFFFFFFE; // Don't run it and let's see what happens!
+//Hmm. Seems to lock up when going into the demo...
+//Try to disable the collision altogether!
+ }
+}//*/
+extern int effect_start5;
+static bool finished = false;
+//if (GPU_RUNNING && effect_start5 && !finished)
+if (GPU_RUNNING && effect_start5 && gpu_pc == 0xF035D8)
+{
+ // Let's do a dump of $6528!
+/* uint32 numItems = JaguarReadWord(0x6BD6);
+ WriteLog("\nDump of $6528: %u items.\n\n", numItems);
+ for(int i=0; i<numItems*3*4; i+=3*4)
+ {
+ WriteLog("\t%04X: %08X %08X %08X -> ", 0x6528+i, JaguarReadLong(0x6528+i),
+ JaguarReadLong(0x6528+i+4), JaguarReadLong(0x6528+i+8));
+ uint16 link = JaguarReadWord(0x6528+i+8+2);
+ for(int j=0; j<40; j+=4)
+ WriteLog("%08X ", JaguarReadLong(link + j));
+ WriteLog("\n");
+ }
+ WriteLog("\n");//*/
+ // Let's try a manual blit here...
+//This isn't working the way it should! !!! FIX !!!
+//Err, actually, it is.
+// NOW, it works right! Problem solved!!! It's a blitter bug!
+/* uint32 src = 0x4D54, dst = 0xF03000, width = 10 * 4;
+ for(int y=0; y<127; y++)
+ {
+ for(int x=0; x<2; x++)
+ {
+ JaguarWriteLong(dst, JaguarReadLong(src));
+
+ src += 4;
+ dst += 4;
+ }
+ src += width - (2 * 4);
+ }//*/
+/* finished = true;
+ doGPUDis = true;
+ WriteLog("\nGPU: About to execute collision detection code.\n\n");//*/
+
+/* WriteLog("\nGPU: About to execute collision detection code. Data @ 4D54:\n\n");
+ int count = 0;
+ for(int i=0x004D54; i<0x004D54+2048; i++)
+ {
+ WriteLog("%02X ", JaguarReadByte(i));
+ count++;
+ if (count == 32)
+ {
+ count = 0;
+ WriteLog("\n");
+ }
+ }
+ WriteLog("\n\nData @ F03000:\n\n");
+ count = 0;
+ for(int i=0xF03000; i<0xF03200; i++)
+ {
+ WriteLog("%02X ", JaguarReadByte(i));
+ count++;
+ if (count == 32)
+ {
+ count = 0;
+ WriteLog("\n");
+ }
+ }
+ WriteLog("\n\n");
+ log_done();
+ exit(0);//*/
+}
+//if (!GPU_RUNNING)
+// doGPUDis = false;
+/*if (!GPU_RUNNING && finished)
+{
+ WriteLog("\nGPU: Finished collision detection code. Exiting!\n\n");
+ GPUDumpRegisters();
+ log_done();
+ exit(0);
+}//*/
+ // (?) If we're set running by the M68K (or DSP?) then end its timeslice to
+ // allow the GPU a chance to run...
+ // Yes! This partially fixed Trevor McFur...
+ if (GPU_RUNNING)
+ m68k_end_timeslice();
+ break;
+ }
+ case 0x18:
+ gpu_hidata = data;
+ break;
+ case 0x1C:
+ gpu_div_control = data;
+ break;
+// default: // unaligned long write
+ //exit(0);
+ //__asm int 3
+ }
+ return;
+ }
+
+// JaguarWriteWord(offset, (data >> 16) & 0xFFFF, who);
+// JaguarWriteWord(offset+2, data & 0xFFFF, who);
+// We're a 32-bit processor, we can do a long write...!
+ JaguarWriteLong(offset, data, who);
+}
+
+//
+// Change register banks if necessary
+//
+void GPUUpdateRegisterBanks(void)
+{
+ int bank = (gpu_flags & REGPAGE); // REGPAGE bit
+
+ if (gpu_flags & IMASK) // IMASK bit
+ bank = 0; // IMASK forces main bank to be bank 0
+
+ if (bank)
+ gpu_reg = gpu_reg_bank_1, gpu_alternate_reg = gpu_reg_bank_0;
+ else
+ gpu_reg = gpu_reg_bank_0, gpu_alternate_reg = gpu_reg_bank_1;
+}
+
+void GPUHandleIRQs(void)
+{
+ // Bail out if we're already in an interrupt!
+ if (gpu_flags & IMASK)
+ return;
+
+ // Get the interrupt latch & enable bits
+ uint32 bits = (gpu_control >> 6) & 0x1F, mask = (gpu_flags >> 4) & 0x1F;
+
+ // Bail out if latched interrupts aren't enabled
+ bits &= mask;
+ if (!bits)
+ return;
+
+ // Determine which interrupt to service
+ uint32 which = 0; //Isn't there a #pragma to disable this warning???
+ if (bits & 0x01)
+ which = 0;
+ if (bits & 0x02)
+ which = 1;
+ if (bits & 0x04)
+ which = 2;
+ if (bits & 0x08)
+ which = 3;
+ if (bits & 0x10)
+ which = 4;
+
+ if (start_logging)
+ WriteLog("GPU: Generating IRQ #%i\n", which);
+
+ // set the interrupt flag
+ gpu_flags |= IMASK;
+ GPUUpdateRegisterBanks();
+
+ // subqt #4,r31 ; pre-decrement stack pointer
+ // move pc,r30 ; address of interrupted code
+ // store r30,(r31) ; store return address
+ gpu_reg[31] -= 4;
+ GPUWriteLong(gpu_reg[31], gpu_pc - 2, GPU);
+
+ // movei #service_address,r30 ; pointer to ISR entry
+ // jump (r30) ; jump to ISR
+ // nop
+ gpu_pc = gpu_reg[30] = GPU_WORK_RAM_BASE + (which * 0x10);
+}
+
+void GPUSetIRQLine(int irqline, int state)
+{
+ if (start_logging)
+ WriteLog("GPU: Setting GPU IRQ line #%i\n", irqline);
+
+ uint32 mask = 0x0040 << irqline;
+ gpu_control &= ~mask; // Clear the interrupt latch
+
+ if (state)
+ {
+ gpu_control |= mask; // Assert the interrupt latch
+ GPUHandleIRQs(); // And handle the interrupt...
+ }
+}
+
+//TEMPORARY: Testing only!
+//#include "gpu2.h"
+//#include "gpu3.h"
+
+void GPUInit(void)
+{
+// memory_malloc_secure((void **)&gpu_ram_8, 0x1000, "GPU work RAM");
+// memory_malloc_secure((void **)&gpu_reg_bank_0, 32 * sizeof(int32), "GPU bank 0 regs");
+// memory_malloc_secure((void **)&gpu_reg_bank_1, 32 * sizeof(int32), "GPU bank 1 regs");
+
+ build_branch_condition_table();
+
+ GPUReset();
+
+//TEMPORARY: Testing only!
+// gpu2_init();
+// gpu3_init();
+}
+
+void GPUReset(void)
+{
+ // GPU registers (directly visible)
+ gpu_flags = 0x00000000;
+ gpu_matrix_control = 0x00000000;
+ gpu_pointer_to_matrix = 0x00000000;
+ gpu_data_organization = 0xFFFFFFFF;
+ gpu_pc = 0x00F03000;
+ gpu_control = 0x00002800; // Correctly sets this as TOM Rev. 2
+ gpu_hidata = 0x00000000;
+ gpu_remain = 0x00000000; // These two registers are RO/WO
+ gpu_div_control = 0x00000000;
+
+ // GPU internal register
+ gpu_acc = 0x00000000;
+
+ gpu_reg = gpu_reg_bank_0;
+ gpu_alternate_reg = gpu_reg_bank_1;
+
+ for(int i=0; i<32; i++)
+ gpu_reg[i] = gpu_alternate_reg[i] = 0x00000000;
+
+ CLR_ZNC;
+ memset(gpu_ram_8, 0xFF, 0x1000);
+ gpu_in_exec = 0;
+//not needed GPUInterruptPending = false;
+ GPUResetStats();
+}
+
+uint32 GPUReadPC(void)
+{
+ return gpu_pc;
+}
+
+void GPUResetStats(void)
+{
+ for(uint32 i=0; i<64; i++)
+ gpu_opcode_use[i] = 0;
+ WriteLog("--> GPU stats were reset!\n");
+}
+
+void GPUDumpDisassembly(void)
+{
+ char buffer[512];
+
+ WriteLog("\n---[GPU code at 00F03000]---------------------------\n");
+ uint32 j = 0xF03000;
+ while (j <= 0xF03FFF)
+ {
+ uint32 oldj = j;
+ j += dasmjag(JAGUAR_GPU, buffer, j);
+ WriteLog("\t%08X: %s\n", oldj, buffer);
+ }
+}
+
+void GPUDumpRegisters(void)
+{
+ WriteLog("\n---[GPU flags: NCZ %d%d%d]-----------------------\n", gpu_flag_n, gpu_flag_c, gpu_flag_z);
+ WriteLog("\nRegisters bank 0\n");
+ for(int j=0; j<8; j++)
+ {
+ WriteLog("\tR%02i = %08X R%02i = %08X R%02i = %08X R%02i = %08X\n",
+ (j << 2) + 0, gpu_reg_bank_0[(j << 2) + 0],
+ (j << 2) + 1, gpu_reg_bank_0[(j << 2) + 1],
+ (j << 2) + 2, gpu_reg_bank_0[(j << 2) + 2],
+ (j << 2) + 3, gpu_reg_bank_0[(j << 2) + 3]);
+ }
+ WriteLog("Registers bank 1\n");
+ for(int j=0; j<8; j++)
+ {
+ WriteLog("\tR%02i = %08X R%02i = %08X R%02i = %08X R%02i = %08X\n",
+ (j << 2) + 0, gpu_reg_bank_1[(j << 2) + 0],
+ (j << 2) + 1, gpu_reg_bank_1[(j << 2) + 1],
+ (j << 2) + 2, gpu_reg_bank_1[(j << 2) + 2],
+ (j << 2) + 3, gpu_reg_bank_1[(j << 2) + 3]);
+ }
+}
+
+void GPUDumpMemory(void)
+{
+ WriteLog("\n---[GPU data at 00F03000]---------------------------\n");
+ for(int i=0; i<0xFFF; i+=4)
+ WriteLog("\t%08X: %02X %02X %02X %02X\n", 0xF03000+i, gpu_ram_8[i],
+ gpu_ram_8[i+1], gpu_ram_8[i+2], gpu_ram_8[i+3]);
+}
+
+void GPUDone(void)
+{
+ WriteLog("GPU: Stopped at PC=%08X (GPU %s running)\n", (unsigned int)gpu_pc, GPU_RUNNING ? "was" : "wasn't");
+
+ // Get the interrupt latch & enable bits
+ uint8 bits = (gpu_control >> 6) & 0x1F, mask = (gpu_flags >> 4) & 0x1F;
+ WriteLog("GPU: Latch bits = %02X, enable bits = %02X\n", bits, mask);
+
+ GPUDumpRegisters();
+ GPUDumpDisassembly();
+
+ WriteLog("\nGPU opcodes use:\n");
+ for(int i=0; i<64; i++)
+ {
+ if (gpu_opcode_use[i])
+ WriteLog("\t%17s %lu\n", gpu_opcode_str[i], gpu_opcode_use[i]);
+ }
+ WriteLog("\n");
+
+// memory_free(gpu_ram_8);
+// memory_free(gpu_reg_bank_0);
+// memory_free(gpu_reg_bank_1);
+}
+
+//
+// Main GPU execution core
+//
+static int testCount = 1;
+static int len = 0;
+static bool tripwire = false;
+void GPUExec(int32 cycles)
+{
+ if (!GPU_RUNNING)
+ return;
+
+#ifdef GPU_SINGLE_STEPPING
+ if (gpu_control & 0x18)
+ {
+ cycles = 1;
+ gpu_control &= ~0x10;
+ }
+#endif
+ GPUHandleIRQs();
+ gpu_releaseTimeSlice_flag = 0;
+ gpu_in_exec++;
+
+ while (cycles > 0 && GPU_RUNNING)
+ {
+if (gpu_ram_8[0x054] == 0x98 && gpu_ram_8[0x055] == 0x0A && gpu_ram_8[0x056] == 0x03
+ && gpu_ram_8[0x057] == 0x00 && gpu_ram_8[0x058] == 0x00 && gpu_ram_8[0x059] == 0x00)
+{
+ if (gpu_pc == 0xF03000)
+ {
+ extern uint32 starCount;
+ starCount = 0;
+/* WriteLog("GPU: Starting starfield generator... Dump of [R03=%08X]:\n", gpu_reg_bank_0[03]);
+ uint32 base = gpu_reg_bank_0[3];
+ for(uint32 i=0; i<0x100; i+=16)
+ {
+ WriteLog("%02X: ", i);
+ for(uint32 j=0; j<16; j++)
+ {
+ WriteLog("%02X ", JaguarReadByte(base + i + j));
+ }
+ WriteLog("\n");
+ }*/
+ }
+// if (gpu_pc == 0xF03)
+ {
+ }
+}//*/
+/*if (gpu_pc == 0xF03B9E && gpu_reg_bank_0[01] == 0)
+{
+ GPUDumpRegisters();
+ WriteLog("GPU: Starting disassembly log...\n");
+ doGPUDis = true;
+}//*/
+/*if (gpu_pc == 0xF0359A)
+{
+ doGPUDis = true;
+ GPUDumpRegisters();
+}*/
+/* gpu_flag_c = (gpu_flag_c ? 1 : 0);
+ gpu_flag_z = (gpu_flag_z ? 1 : 0);
+ gpu_flag_n = (gpu_flag_n ? 1 : 0);*/
+
+ uint16 opcode = GPUReadWord(gpu_pc, GPU);
+ uint32 index = opcode >> 10;
+ gpu_instruction = opcode; // Added for GPU #3...
+ gpu_opcode_first_parameter = (opcode >> 5) & 0x1F;
+ gpu_opcode_second_parameter = opcode & 0x1F;
+/*if (gpu_pc == 0xF03BE8)
+WriteLog("Start of OP frame write...\n");
+if (gpu_pc == 0xF03EEE)
+WriteLog("--> Writing BRANCH object ---\n");
+if (gpu_pc == 0xF03F62)
+WriteLog("--> Writing BITMAP object ***\n");//*/
+/*if (gpu_pc == 0xF03546)
+{
+ WriteLog("\n--> GPU PC: F03546\n");
+ GPUDumpRegisters();
+ GPUDumpDisassembly();
+}//*/
+/*if (gpu_pc == 0xF033F6)
+{
+ WriteLog("\n--> GPU PC: F033F6\n");
+ GPUDumpRegisters();
+ GPUDumpDisassembly();
+}//*/
+/*if (gpu_pc == 0xF033CC)
+{
+ WriteLog("\n--> GPU PC: F033CC\n");
+ GPUDumpRegisters();
+ GPUDumpDisassembly();
+}//*/
+/*if (gpu_pc == 0xF033D6)
+{
+ WriteLog("\n--> GPU PC: F033D6 (#%d)\n", testCount++);
+ GPUDumpRegisters();
+ GPUDumpMemory();
+}//*/
+/*if (gpu_pc == 0xF033D8)
+{
+ WriteLog("\n--> GPU PC: F033D8 (#%d)\n", testCount++);
+ GPUDumpRegisters();
+ GPUDumpMemory();
+}//*/
+/*if (gpu_pc == 0xF0358E)
+{
+ WriteLog("\n--> GPU PC: F0358E (#%d)\n", testCount++);
+ GPUDumpRegisters();
+ GPUDumpMemory();
+}//*/
+/*if (gpu_pc == 0xF034CA)
+{
+ WriteLog("\n--> GPU PC: F034CA (#%d)\n", testCount++);
+ GPUDumpRegisters();
+}//*/
+/*if (gpu_pc == 0xF034CA)
+{
+ len = gpu_reg[1] + 4;//, r9save = gpu_reg[9];
+ WriteLog("\nAbout to subtract [#%d] (R14=%08X, R15=%08X, R9=%08X):\n ", testCount++, gpu_reg[14], gpu_reg[15], gpu_reg[9]);
+ for(int i=0; i<len; i+=4)
+ WriteLog(" %08X", GPUReadLong(gpu_reg[15]+i));
+ WriteLog("\n ");
+ for(int i=0; i<len; i+=4)
+ WriteLog(" %08X", GPUReadLong(gpu_reg[14]+i));
+ WriteLog("\n\n");
+}
+if (gpu_pc == 0xF034DE)
+{
+ WriteLog("\nSubtracted! (R14=%08X, R15=%08X):\n ", gpu_reg[14], gpu_reg[15]);
+ for(int i=0; i<len; i+=4)
+ WriteLog(" %08X", GPUReadLong(gpu_reg[15]+i));
+ WriteLog("\n ");
+ for(int i=0; i<len; i+=4)
+ WriteLog(" %08X", GPUReadLong(gpu_reg[14]+i));
+ WriteLog("\n ");
+ for(int i=0; i<len; i+=4)
+ WriteLog(" --------");
+ WriteLog("\n ");
+ for(int i=0; i<len; i+=4)
+ WriteLog(" %08X", GPUReadLong(gpu_reg[9]+4+i));
+ WriteLog("\n\n");
+}//*/
+/*if (gpu_pc == 0xF035C8)
+{
+ WriteLog("\n--> GPU PC: F035C8 (#%d)\n", testCount++);
+ GPUDumpRegisters();
+ GPUDumpDisassembly();
+}//*/
+
+if (gpu_start_log)
+{
+// gpu_reset_stats();
+static char buffer[512];
+dasmjag(JAGUAR_GPU, buffer, gpu_pc);
+WriteLog("GPU: [%08X] %s (RM=%08X, RN=%08X) -> ", gpu_pc, buffer, RM, RN);
+}//*/
+//$E400 -> 1110 01 -> $39 -> 57
+//GPU #1
+ gpu_pc += 2;
+ gpu_opcode[index]();
+//GPU #2
+// gpu2_opcode[index]();
+// gpu_pc += 2;
+//GPU #3 (Doesn't show ATARI logo! #1 & #2 do...)
+// gpu_pc += 2;
+// gpu3_opcode[index]();
+
+// BIOS hacking
+//GPU: [00F03548] jr nz,00F03560 (0xd561) (RM=00F03114, RN=00000004) -> --> JR: Branch taken.
+/*static bool firstTime = true;
+if (gpu_pc == 0xF03548 && firstTime)
+{
+ gpu_flag_z = 1;
+// firstTime = false;
+
+//static char buffer[512];
+//int k=0xF03548;
+//while (k<0xF0356C)
+//{
+//int oldk = k;
+//k += dasmjag(JAGUAR_GPU, buffer, k);
+//WriteLog("GPU: [%08X] %s\n", oldk, buffer);
+//}
+// gpu_start_log = 1;
+}//*/
+//GPU: [00F0354C] jump nz,(r29) (0xd3a1) (RM=00F03314, RN=00000004) -> (RM=00F03314, RN=00000004)
+/*if (gpu_pc == 0xF0354C)
+ gpu_flag_z = 0;//, gpu_start_log = 1;//*/
+
+ cycles -= gpu_opcode_cycles[index];
+ gpu_opcode_use[index]++;
+if (gpu_start_log)
+ WriteLog("(RM=%08X, RN=%08X)\n", RM, RN);//*/
+if ((gpu_pc < 0xF03000 || gpu_pc > 0xF03FFF) && !tripwire)
+{
+ WriteLog("GPU: Executing outside local RAM! GPU_PC: %08X\n", gpu_pc);
+ tripwire = true;
+}
+ }
+
+ gpu_in_exec--;
+}
+
+//
+// GPU opcodes
+//
+
+/*
+GPU opcodes use (offset punch--vertically below bad guy):
+ add 18686
+ addq 32621
+ sub 7483
+ subq 10252
+ and 21229
+ or 15003
+ btst 1822
+ bset 2072
+ mult 141
+ div 2392
+ shlq 13449
+ shrq 10297
+ sharq 11104
+ cmp 6775
+ cmpq 5944
+ move 31259
+ moveq 4473
+ movei 23277
+ loadb 46
+ loadw 4201
+ load 28580
+ load_r14_indexed 1183
+ load_r15_indexed 1125
+ storew 178
+ store 10144
+ store_r14_indexed 320
+ store_r15_indexed 1
+ move_pc 1742
+ jump 24467
+ jr 18090
+ nop 41362
+*/
+
+static void gpu_opcode_jump(void)
+{
+#ifdef GPU_DIS_JUMP
+const char * condition[32] =
+{ "T", "nz", "z", "???", "nc", "nc nz", "nc z", "???", "c", "c nz",
+ "c z", "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "nn", "nn nz", "nn z", "???", "n", "n nz", "n z", "???",
+ "???", "???", "???", "F" };
+ if (doGPUDis)
+ WriteLog("%06X: JUMP %s, (R%02u) [NCZ:%u%u%u, R%02u=%08X] ", gpu_pc-2, condition[IMM_2], IMM_1, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM);
+#endif
+ // normalize flags
+/* gpu_flag_c = (gpu_flag_c ? 1 : 0);
+ gpu_flag_z = (gpu_flag_z ? 1 : 0);
+ gpu_flag_n = (gpu_flag_n ? 1 : 0);*/
+ // KLUDGE: Used by BRANCH_CONDITION
+ uint32 jaguar_flags = (gpu_flag_n << 2) | (gpu_flag_c << 1) | gpu_flag_z;
+
+ if (BRANCH_CONDITION(IMM_2))
+ {
+#ifdef GPU_DIS_JUMP
+ if (doGPUDis)
+ WriteLog("Branched!\n");
+#endif
+if (gpu_start_log)
+ WriteLog(" --> JUMP: Branch taken.\n");
+ uint32 delayed_pc = RM;
+ GPUExec(1);
+ gpu_pc = delayed_pc;
+/* uint16 opcode = GPUReadWord(gpu_pc, GPU);
+ gpu_opcode_first_parameter = (opcode >> 5) & 0x1F;
+ gpu_opcode_second_parameter = opcode & 0x1F;
+
+ gpu_pc = delayed_pc;
+ gpu_opcode[opcode>>10]();//*/
+ }
+#ifdef GPU_DIS_JUMP
+ else
+ if (doGPUDis)
+ WriteLog("Branch NOT taken.\n");
+#endif
+}
+
+static void gpu_opcode_jr(void)
+{
+#ifdef GPU_DIS_JR
+const char * condition[32] =
+{ "T", "nz", "z", "???", "nc", "nc nz", "nc z", "???", "c", "c nz",
+ "c z", "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "nn", "nn nz", "nn z", "???", "n", "n nz", "n z", "???",
+ "???", "???", "???", "F" };
+ if (doGPUDis)
+ WriteLog("%06X: JR %s, %06X [NCZ:%u%u%u] ", gpu_pc-2, condition[IMM_2], gpu_pc+((IMM_1 & 0x10 ? 0xFFFFFFF0 | IMM_1 : IMM_1) * 2), gpu_flag_n, gpu_flag_c, gpu_flag_z);
+#endif
+/* if (CONDITION(jaguar.op & 31))
+ {
+ int32 r1 = (INT8)((jaguar.op >> 2) & 0xF8) >> 2;
+ uint32 newpc = jaguar.PC + r1;
+ CALL_MAME_DEBUG;
+ jaguar.op = ROPCODE(jaguar.PC);
+ jaguar.PC = newpc;
+ (*jaguar.table[jaguar.op >> 10])();
+
+ jaguar_icount -= 3; // 3 wait states guaranteed
+ }*/
+ // normalize flags
+/* gpu_flag_n = (gpu_flag_n ? 1 : 0);
+ gpu_flag_c = (gpu_flag_c ? 1 : 0);
+ gpu_flag_z = (gpu_flag_z ? 1 : 0);*/
+ // KLUDGE: Used by BRANCH_CONDITION
+ uint32 jaguar_flags = (gpu_flag_n << 2) | (gpu_flag_c << 1) | gpu_flag_z;
+
+ if (BRANCH_CONDITION(IMM_2))
+ {
+#ifdef GPU_DIS_JR
+ if (doGPUDis)
+ WriteLog("Branched!\n");
+#endif
+if (gpu_start_log)
+ WriteLog(" --> JR: Branch taken.\n");
+ int32 offset = (IMM_1 & 0x10 ? 0xFFFFFFF0 | IMM_1 : IMM_1); // Sign extend IMM_1
+ int32 delayed_pc = gpu_pc + (offset * 2);
+ GPUExec(1);
+ gpu_pc = delayed_pc;
+/* uint16 opcode = GPUReadWord(gpu_pc, GPU);
+ gpu_opcode_first_parameter = (opcode >> 5) & 0x1F;
+ gpu_opcode_second_parameter = opcode & 0x1F;
+
+ gpu_pc = delayed_pc;
+ gpu_opcode[opcode>>10]();//*/
+ }
+#ifdef GPU_DIS_JR
+ else
+ if (doGPUDis)
+ WriteLog("Branch NOT taken.\n");
+#endif
+}
+
+static void gpu_opcode_add(void)
+{
+#ifdef GPU_DIS_ADD
+ if (doGPUDis)
+ WriteLog("%06X: ADD R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ uint32 res = RN + RM;
+ CLR_ZNC; SET_ZNC_ADD(RN, RM, res);
+ RN = res;
+#ifdef GPU_DIS_ADD
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_addc(void)
+{
+#ifdef GPU_DIS_ADDC
+ if (doGPUDis)
+ WriteLog("%06X: ADDC R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+/* int dreg = jaguar.op & 31;
+ uint32 r1 = jaguar.r[(jaguar.op >> 5) & 31];
+ uint32 r2 = jaguar.r[dreg];
+ uint32 res = r2 + r1 + ((jaguar.FLAGS >> 1) & 1);
+ jaguar.r[dreg] = res;
+ CLR_ZNC; SET_ZNC_ADD(r2,r1,res);*/
+
+ uint32 res = RN + RM + gpu_flag_c;
+ uint32 carry = gpu_flag_c;
+// SET_ZNC_ADD(RN, RM, res); //???BUG??? Yes!
+ SET_ZNC_ADD(RN + carry, RM, res);
+// SET_ZNC_ADD(RN, RM + carry, res);
+ RN = res;
+#ifdef GPU_DIS_ADDC
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_addq(void)
+{
+#ifdef GPU_DIS_ADDQ
+ if (doGPUDis)
+ WriteLog("%06X: ADDQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, gpu_convert_zero[IMM_1], IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ uint32 r1 = gpu_convert_zero[IMM_1];
+ uint32 res = RN + r1;
+ CLR_ZNC; SET_ZNC_ADD(RN, r1, res);
+ RN = res;
+#ifdef GPU_DIS_ADDQ
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_addqt(void)
+{
+#ifdef GPU_DIS_ADDQT
+ if (doGPUDis)
+ WriteLog("%06X: ADDQT #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, gpu_convert_zero[IMM_1], IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ RN += gpu_convert_zero[IMM_1];
+#ifdef GPU_DIS_ADDQT
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_sub(void)
+{
+#ifdef GPU_DIS_SUB
+ if (doGPUDis)
+ WriteLog("%06X: SUB R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ uint32 res = RN - RM;
+ SET_ZNC_SUB(RN, RM, res);
+ RN = res;
+#ifdef GPU_DIS_SUB
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_subc(void)
+{
+#ifdef GPU_DIS_SUBC
+ if (doGPUDis)
+ WriteLog("%06X: SUBC R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ uint32 res = RN - RM - gpu_flag_c;
+ uint32 borrow = gpu_flag_c;
+// SET_ZNC_SUB(RN, RM, res); //???BUG??? YES!!!
+//No matter how you do it, there is a problem. With below, it's 0-0 with carry,
+//and the one below it it's FFFFFFFF - FFFFFFFF with carry... !!! FIX !!!
+// SET_ZNC_SUB(RN - borrow, RM, res);
+ SET_ZNC_SUB(RN, RM + borrow, res);
+ RN = res;
+#ifdef GPU_DIS_SUBC
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+/*
+N = 5, M = 3, 3 - 5 = -2, C = 1... Or, in our case:
+N = 0, M = 1, 0 - 1 = -1, C = 0!
+
+#define SET_C_SUB(a,b) (gpu_flag_c = ((uint32)(b) > (uint32)(a)))
+#define SET_ZN(r) SET_N(r); SET_Z(r)
+#define SET_ZNC_ADD(a,b,r) SET_N(r); SET_Z(r); SET_C_ADD(a,b)
+#define SET_ZNC_SUB(a,b,r) SET_N(r); SET_Z(r); SET_C_SUB(a,b)
+*/
+static void gpu_opcode_subq(void)
+{
+#ifdef GPU_DIS_SUBQ
+ if (doGPUDis)
+ WriteLog("%06X: SUBQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, gpu_convert_zero[IMM_1], IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ uint32 r1 = gpu_convert_zero[IMM_1];
+ uint32 res = RN - r1;
+ SET_ZNC_SUB(RN, r1, res);
+ RN = res;
+#ifdef GPU_DIS_SUBQ
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_subqt(void)
+{
+#ifdef GPU_DIS_SUBQT
+ if (doGPUDis)
+ WriteLog("%06X: SUBQT #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, gpu_convert_zero[IMM_1], IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ RN -= gpu_convert_zero[IMM_1];
+#ifdef GPU_DIS_SUBQT
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_cmp(void)
+{
+#ifdef GPU_DIS_CMP
+ if (doGPUDis)
+ WriteLog("%06X: CMP R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ uint32 res = RN - RM;
+ SET_ZNC_SUB(RN, RM, res);
+#ifdef GPU_DIS_CMP
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z);
+#endif
+}
+
+static void gpu_opcode_cmpq(void)
+{
+ static int32 sqtable[32] =
+ { 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1 };
+#ifdef GPU_DIS_CMPQ
+ if (doGPUDis)
+ WriteLog("%06X: CMPQ #%d, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, sqtable[IMM_1], IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ uint32 r1 = sqtable[IMM_1 & 0x1F]; // I like this better -> (INT8)(jaguar.op >> 2) >> 3;
+ uint32 res = RN - r1;
+ SET_ZNC_SUB(RN, r1, res);
+#ifdef GPU_DIS_CMPQ
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z);
+#endif
+}
+
+static void gpu_opcode_and(void)
+{
+#ifdef GPU_DIS_AND
+ if (doGPUDis)
+ WriteLog("%06X: AND R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = RN & RM;
+ SET_ZN(RN);
+#ifdef GPU_DIS_AND
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_or(void)
+{
+#ifdef GPU_DIS_OR
+ if (doGPUDis)
+ WriteLog("%06X: OR R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = RN | RM;
+ SET_ZN(RN);
+#ifdef GPU_DIS_OR
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_xor(void)
+{
+#ifdef GPU_DIS_XOR
+ if (doGPUDis)
+ WriteLog("%06X: XOR R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = RN ^ RM;
+ SET_ZN(RN);
+#ifdef GPU_DIS_XOR
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_not(void)
+{
+#ifdef GPU_DIS_NOT
+ if (doGPUDis)
+ WriteLog("%06X: NOT R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = ~RN;
+ SET_ZN(RN);
+#ifdef GPU_DIS_NOT
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_move_pc(void)
+{
+#ifdef GPU_DIS_MOVEPC
+ if (doGPUDis)
+ WriteLog("%06X: MOVE PC, R%02u [NCZ:%u%u%u, PC=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, gpu_pc-2, IMM_2, RN);
+#endif
+ // Should be previous PC--this might not always be previous instruction!
+ // Then again, this will point right at the *current* instruction, i.e., MOVE PC,R!
+ RN = gpu_pc - 2;
+#ifdef GPU_DIS_MOVEPC
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_sat8(void)
+{
+#ifdef GPU_DIS_SAT8
+ if (doGPUDis)
+ WriteLog("%06X: SAT8 R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ RN = ((int32)RN < 0 ? 0 : (RN > 0xFF ? 0xFF : RN));
+ SET_ZN(RN);
+#ifdef GPU_DIS_SAT8
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_sat16(void)
+{
+ RN = ((int32)RN < 0 ? 0 : (RN > 0xFFFF ? 0xFFFF : RN));
+ SET_ZN(RN);
+}
+
+static void gpu_opcode_sat24(void)
+{
+ RN = ((int32)RN < 0 ? 0 : (RN > 0xFFFFFF ? 0xFFFFFF : RN));
+ SET_ZN(RN);
+}
+
+static void gpu_opcode_store_r14_indexed(void)
+{
+#ifdef GPU_DIS_STORE14I
+ if (doGPUDis)
+ WriteLog("%06X: STORE R%02u, (R14+$%02X) [NCZ:%u%u%u, R%02u=%08X, R14+$%02X=%08X]\n", gpu_pc-2, IMM_2, gpu_convert_zero[IMM_1] << 2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN, gpu_convert_zero[IMM_1] << 2, gpu_reg[14]+(gpu_convert_zero[IMM_1] << 2));
+#endif
+ GPUWriteLong(gpu_reg[14] + (gpu_convert_zero[IMM_1] << 2), RN, GPU);
+}
+
+static void gpu_opcode_store_r15_indexed(void)
+{
+#ifdef GPU_DIS_STORE15I
+ if (doGPUDis)
+ WriteLog("%06X: STORE R%02u, (R15+$%02X) [NCZ:%u%u%u, R%02u=%08X, R15+$%02X=%08X]\n", gpu_pc-2, IMM_2, gpu_convert_zero[IMM_1] << 2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN, gpu_convert_zero[IMM_1] << 2, gpu_reg[15]+(gpu_convert_zero[IMM_1] << 2));
+#endif
+ GPUWriteLong(gpu_reg[15] + (gpu_convert_zero[IMM_1] << 2), RN, GPU);
+}
+
+static void gpu_opcode_load_r14_ri(void)
+{
+#ifdef GPU_DIS_LOAD14R
+ if (doGPUDis)
+ WriteLog("%06X: LOAD (R14+R%02u), R%02u [NCZ:%u%u%u, R14+R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM+gpu_reg[14], IMM_2, RN);
+#endif
+ RN = GPUReadLong(gpu_reg[14] + RM, GPU);
+#ifdef GPU_DIS_LOAD14R
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_load_r15_ri(void)
+{
+#ifdef GPU_DIS_LOAD15R
+ if (doGPUDis)
+ WriteLog("%06X: LOAD (R15+R%02u), R%02u [NCZ:%u%u%u, R15+R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM+gpu_reg[15], IMM_2, RN);
+#endif
+ RN = GPUReadLong(gpu_reg[15] + RM, GPU);
+#ifdef GPU_DIS_LOAD15R
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_store_r14_ri(void)
+{
+#ifdef GPU_DIS_STORE14R
+ if (doGPUDis)
+ WriteLog("%06X: STORE R%02u, (R14+R%02u) [NCZ:%u%u%u, R%02u=%08X, R14+R%02u=%08X]\n", gpu_pc-2, IMM_2, IMM_1, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN, IMM_1, RM+gpu_reg[14]);
+#endif
+ GPUWriteLong(gpu_reg[14] + RM, RN, GPU);
+}
+
+static void gpu_opcode_store_r15_ri(void)
+{
+#ifdef GPU_DIS_STORE15R
+ if (doGPUDis)
+ WriteLog("%06X: STORE R%02u, (R15+R%02u) [NCZ:%u%u%u, R%02u=%08X, R15+R%02u=%08X]\n", gpu_pc-2, IMM_2, IMM_1, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN, IMM_1, RM+gpu_reg[15]);
+#endif
+ GPUWriteLong(gpu_reg[15] + RM, RN, GPU);
+}
+
+static void gpu_opcode_nop(void)
+{
+#ifdef GPU_DIS_NOP
+ if (doGPUDis)
+ WriteLog("%06X: NOP [NCZ:%u%u%u]\n", gpu_pc-2, gpu_flag_n, gpu_flag_c, gpu_flag_z);
+#endif
+}
+
+static void gpu_opcode_pack(void)
+{
+#ifdef GPU_DIS_PACK
+ if (doGPUDis)
+ WriteLog("%06X: %s R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, (!IMM_1 ? "PACK " : "UNPACK"), IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ uint32 val = RN;
+
+//BUG! if (RM == 0) // Pack
+ if (IMM_1 == 0) // Pack
+ RN = ((val >> 10) & 0x0000F000) | ((val >> 5) & 0x00000F00) | (val & 0x000000FF);
+ else // Unpack
+ RN = ((val & 0x0000F000) << 10) | ((val & 0x00000F00) << 5) | (val & 0x000000FF);
+#ifdef GPU_DIS_PACK
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_storeb(void)
+{
+#ifdef GPU_DIS_STOREB
+ if (doGPUDis)
+ WriteLog("%06X: STOREB R%02u, (R%02u) [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_pc-2, IMM_2, IMM_1, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN, IMM_1, RM);
+#endif
+//Is this right???
+// Would appear to be so...!
+ if ((RM >= 0xF03000) && (RM <= 0xF03FFF))
+ GPUWriteLong(RM, RN & 0xFF, GPU);
+ else
+ JaguarWriteByte(RM, RN, GPU);
+}
+
+static void gpu_opcode_storew(void)
+{
+#ifdef GPU_DIS_STOREW
+ if (doGPUDis)
+ WriteLog("%06X: STOREW R%02u, (R%02u) [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_pc-2, IMM_2, IMM_1, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN, IMM_1, RM);
+#endif
+ if ((RM >= 0xF03000) && (RM <= 0xF03FFF))
+ GPUWriteLong(RM, RN & 0xFFFF, GPU);
+ else
+ JaguarWriteWord(RM, RN, GPU);
+}
+
+static void gpu_opcode_store(void)
+{
+#ifdef GPU_DIS_STORE
+ if (doGPUDis)
+ WriteLog("%06X: STORE R%02u, (R%02u) [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_pc-2, IMM_2, IMM_1, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN, IMM_1, RM);
+#endif
+ GPUWriteLong(RM, RN, GPU);
+}
+
+static void gpu_opcode_storep(void)
+{
+ GPUWriteLong(RM + 0, gpu_hidata, GPU);
+ GPUWriteLong(RM + 4, RN, GPU);
+}
+
+static void gpu_opcode_loadb(void)
+{
+#ifdef GPU_DIS_LOADB
+ if (doGPUDis)
+ WriteLog("%06X: LOADB (R%02u), R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ if ((RM >= 0xF03000) && (RM <= 0xF03FFF))
+ RN = GPUReadLong(RM, GPU) & 0xFF;
+ else
+ RN = JaguarReadByte(RM, GPU);
+#ifdef GPU_DIS_LOADB
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_loadw(void)
+{
+#ifdef GPU_DIS_LOADW
+ if (doGPUDis)
+ WriteLog("%06X: LOADW (R%02u), R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ if ((RM >= 0xF03000) && (RM <= 0xF03FFF))
+ RN = GPUReadLong(RM, GPU) & 0xFFFF;
+ else
+ RN = JaguarReadWord(RM, GPU);
+#ifdef GPU_DIS_LOADW
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_load(void)
+{
+#ifdef GPU_DIS_LOAD
+ if (doGPUDis)
+ WriteLog("%06X: LOAD (R%02u), R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = GPUReadLong(RM, GPU);
+#ifdef GPU_DIS_LOAD
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_loadp(void)
+{
+ gpu_hidata = GPUReadLong(RM + 0, GPU);
+ RN = GPUReadLong(RM + 4, GPU);
+}
+
+static void gpu_opcode_load_r14_indexed(void)
+{
+#ifdef GPU_DIS_LOAD14I
+ if (doGPUDis)
+ WriteLog("%06X: LOAD (R14+$%02X), R%02u [NCZ:%u%u%u, R14+$%02X=%08X, R%02u=%08X] -> ", gpu_pc-2, gpu_convert_zero[IMM_1] << 2, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, gpu_convert_zero[IMM_1] << 2, gpu_reg[14]+(gpu_convert_zero[IMM_1] << 2), IMM_2, RN);
+#endif
+ RN = GPUReadLong(gpu_reg[14] + (gpu_convert_zero[IMM_1] << 2), GPU);
+#ifdef GPU_DIS_LOAD14I
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_load_r15_indexed(void)
+{
+#ifdef GPU_DIS_LOAD15I
+ if (doGPUDis)
+ WriteLog("%06X: LOAD (R15+$%02X), R%02u [NCZ:%u%u%u, R15+$%02X=%08X, R%02u=%08X] -> ", gpu_pc-2, gpu_convert_zero[IMM_1] << 2, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, gpu_convert_zero[IMM_1] << 2, gpu_reg[15]+(gpu_convert_zero[IMM_1] << 2), IMM_2, RN);
+#endif
+ RN = GPUReadLong(gpu_reg[15] + (gpu_convert_zero[IMM_1] << 2), GPU);
+#ifdef GPU_DIS_LOAD15I
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_movei(void)
+{
+#ifdef GPU_DIS_MOVEI
+ if (doGPUDis)
+ WriteLog("%06X: MOVEI #$%08X, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, (uint32)GPUReadWord(gpu_pc) | ((uint32)GPUReadWord(gpu_pc + 2) << 16), IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ // This instruction is followed by 32-bit value in LSW / MSW format...
+ RN = (uint32)GPUReadWord(gpu_pc, GPU) | ((uint32)GPUReadWord(gpu_pc + 2, GPU) << 16);
+ gpu_pc += 4;
+#ifdef GPU_DIS_MOVEI
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_moveta(void)
+{
+#ifdef GPU_DIS_MOVETA
+ if (doGPUDis)
+ WriteLog("%06X: MOVETA R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u(alt)=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, ALTERNATE_RN);
+#endif
+ ALTERNATE_RN = RM;
+#ifdef GPU_DIS_MOVETA
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u(alt)=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, ALTERNATE_RN);
+#endif
+}
+
+static void gpu_opcode_movefa(void)
+{
+#ifdef GPU_DIS_MOVEFA
+ if (doGPUDis)
+ WriteLog("%06X: MOVEFA R%02u, R%02u [NCZ:%u%u%u, R%02u(alt)=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, ALTERNATE_RM, IMM_2, RN);
+#endif
+ RN = ALTERNATE_RM;
+#ifdef GPU_DIS_MOVEFA
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u(alt)=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, ALTERNATE_RM, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_move(void)
+{
+#ifdef GPU_DIS_MOVE
+ if (doGPUDis)
+ WriteLog("%06X: MOVE R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = RM;
+#ifdef GPU_DIS_MOVE
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_moveq(void)
+{
+#ifdef GPU_DIS_MOVEQ
+ if (doGPUDis)
+ WriteLog("%06X: MOVEQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ RN = IMM_1;
+#ifdef GPU_DIS_MOVEQ
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_resmac(void)
+{
+ RN = gpu_acc;
+}
+
+static void gpu_opcode_imult(void)
+{
+#ifdef GPU_DIS_IMULT
+ if (doGPUDis)
+ WriteLog("%06X: IMULT R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = (int16)RN * (int16)RM;
+ SET_ZN(RN);
+#ifdef GPU_DIS_IMULT
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_mult(void)
+{
+#ifdef GPU_DIS_MULT
+ if (doGPUDis)
+ WriteLog("%06X: MULT R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ RN = (uint16)RM * (uint16)RN;
+ SET_ZN(RN);
+#ifdef GPU_DIS_MULT
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_bclr(void)
+{
+#ifdef GPU_DIS_BCLR
+ if (doGPUDis)
+ WriteLog("%06X: BCLR #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ uint32 res = RN & ~(1 << IMM_1);
+ RN = res;
+ SET_ZN(res);
+#ifdef GPU_DIS_BCLR
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_btst(void)
+{
+#ifdef GPU_DIS_BTST
+ if (doGPUDis)
+ WriteLog("%06X: BTST #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ gpu_flag_z = (~RN >> IMM_1) & 1;
+#ifdef GPU_DIS_BTST
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_bset(void)
+{
+#ifdef GPU_DIS_BSET
+ if (doGPUDis)
+ WriteLog("%06X: BSET #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ uint32 res = RN | (1 << IMM_1);
+ RN = res;
+ SET_ZN(res);
+#ifdef GPU_DIS_BSET
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_imacn(void)
+{
+ uint32 res = (int16)RM * (int16)(RN);
+ gpu_acc += res;
+}
+
+static void gpu_opcode_mtoi(void)
+{
+ uint32 _RM = RM;
+ uint32 res = RN = (((int32)_RM >> 8) & 0xFF800000) | (_RM & 0x007FFFFF);
+ SET_ZN(res);
+}
+
+static void gpu_opcode_normi(void)
+{
+ uint32 _RM = RM;
+ uint32 res = 0;
+
+ if (_RM)
+ {
+ while ((_RM & 0xFFC00000) == 0)
+ {
+ _RM <<= 1;
+ res--;
+ }
+ while ((_RM & 0xFF800000) != 0)
+ {
+ _RM >>= 1;
+ res++;
+ }
+ }
+ RN = res;
+ SET_ZN(res);
+}
+
+static void gpu_opcode_mmult(void)
+{
+ int count = gpu_matrix_control & 0x0F; // Matrix width
+ uint32 addr = gpu_pointer_to_matrix; // In the GPU's RAM
+ int64 accum = 0;
+ uint32 res;
+
+ if (gpu_matrix_control & 0x10) // Column stepping
+ {
+ for(int i=0; i<count; i++)
+ {
+ int16 a;
+ if (i & 0x01)
+ a = (int16)((gpu_alternate_reg[IMM_1 + (i >> 1)] >> 16) & 0xFFFF);
+ else
+ a = (int16)(gpu_alternate_reg[IMM_1 + (i >> 1)] & 0xFFFF);
+
+ int16 b = ((int16)GPUReadWord(addr + 2, GPU));
+ accum += a * b;
+ addr += 4 * count;
+ }
+ }
+ else // Row stepping
+ {
+ for(int i=0; i<count; i++)
+ {
+ int16 a;
+ if (i & 0x01)
+ a = (int16)((gpu_alternate_reg[IMM_1 + (i >> 1)] >> 16) & 0xFFFF);
+ else
+ a = (int16)(gpu_alternate_reg[IMM_1 + (i >> 1)] & 0xFFFF);
+
+ int16 b = ((int16)GPUReadWord(addr + 2, GPU));
+ accum += a * b;
+ addr += 4;
+ }
+ }
+ RN = res = (int32)accum;
+ // carry flag to do (out of the last add)
+ SET_ZN(res);
+}
+
+static void gpu_opcode_abs(void)
+{
+#ifdef GPU_DIS_ABS
+ if (doGPUDis)
+ WriteLog("%06X: ABS R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ gpu_flag_c = RN >> 31;
+ if (RN == 0x80000000)
+ //Is 0x80000000 a positive number? If so, then we need to set C to 0 as well!
+ gpu_flag_n = 1, gpu_flag_z = 0;
+ else
+ {
+ if (gpu_flag_c)
+ RN = -RN;
+ gpu_flag_n = 0; SET_FLAG_Z(RN);
+ }
+#ifdef GPU_DIS_ABS
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_div(void) // RN / RM
+{
+#ifdef GPU_DIS_DIV
+ if (doGPUDis)
+ WriteLog("%06X: DIV R%02u, R%02u (%s) [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, (gpu_div_control & 0x01 ? "16.16" : "32"), gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+// NOTE: remainder is NOT calculated correctly here!
+// The original tried to get it right by checking to see if the
+// remainder was negative, but that's too late...
+// The code there should do it now, but I'm not 100% sure...
+
+ if (RM)
+ {
+ if (gpu_div_control & 0x01) // 16.16 division
+ {
+ RN = ((uint64)RN << 16) / RM;
+ gpu_remain = ((uint64)RN << 16) % RM;
+ }
+ else
+ {
+ RN = RN / RM;
+ gpu_remain = RN % RM;
+ }
+
+ if ((gpu_remain - RM) & 0x80000000) // If the result would have been negative...
+ gpu_remain -= RM; // Then make it negative!
+ }
+ else
+ RN = 0xFFFFFFFF;
+
+/* uint32 _RM=RM;
+ uint32 _RN=RN;
+
+ if (_RM)
+ {
+ if (gpu_div_control & 1)
+ {
+ gpu_remain = (((uint64)_RN) << 16) % _RM;
+ if (gpu_remain&0x80000000)
+ gpu_remain-=_RM;
+ RN = (((uint64)_RN) << 16) / _RM;
+ }
+ else
+ {
+ gpu_remain = _RN % _RM;
+ if (gpu_remain&0x80000000)
+ gpu_remain-=_RM;
+ RN/=_RM;
+ }
+ }
+ else
+ RN=0xffffffff;*/
+#ifdef GPU_DIS_DIV
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] Remainder: %08X\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN, gpu_remain);
+#endif
+}
+
+static void gpu_opcode_imultn(void)
+{
+ uint32 res = (int32)((int16)RN * (int16)RM);
+ gpu_acc = (int32)res;
+ SET_FLAG_Z(res);
+ SET_FLAG_N(res);
+}
+
+static void gpu_opcode_neg(void)
+{
+#ifdef GPU_DIS_NEG
+ if (doGPUDis)
+ WriteLog("%06X: NEG R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ uint32 res = -RN;
+ SET_ZNC_SUB(0, RN, res);
+ RN = res;
+#ifdef GPU_DIS_NEG
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_shlq(void)
+{
+#ifdef GPU_DIS_SHLQ
+ if (doGPUDis)
+ WriteLog("%06X: SHLQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, 32 - IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+// Was a bug here...
+// (Look at Aaron's code: If r1 = 32, then 32 - 32 = 0 which is wrong!)
+ int32 r1 = 32 - IMM_1;
+ uint32 res = RN << r1;
+ SET_ZN(res); gpu_flag_c = (RN >> 31) & 1;
+ RN = res;
+#ifdef GPU_DIS_SHLQ
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_shrq(void)
+{
+#ifdef GPU_DIS_SHRQ
+ if (doGPUDis)
+ WriteLog("%06X: SHRQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, gpu_convert_zero[IMM_1], IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ int32 r1 = gpu_convert_zero[IMM_1];
+ uint32 res = RN >> r1;
+ SET_ZN(res); gpu_flag_c = RN & 1;
+ RN = res;
+#ifdef GPU_DIS_SHRQ
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_ror(void)
+{
+#ifdef GPU_DIS_ROR
+ if (doGPUDis)
+ WriteLog("%06X: ROR R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ uint32 r1 = RM & 0x1F;
+ uint32 res = (RN >> r1) | (RN << (32 - r1));
+ SET_ZN(res); gpu_flag_c = (RN >> 31) & 1;
+ RN = res;
+#ifdef GPU_DIS_ROR
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_rorq(void)
+{
+#ifdef GPU_DIS_RORQ
+ if (doGPUDis)
+ WriteLog("%06X: RORQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, gpu_convert_zero[IMM_1], IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ uint32 r1 = gpu_convert_zero[IMM_1 & 0x1F];
+ uint32 r2 = RN;
+ uint32 res = (r2 >> r1) | (r2 << (32 - r1));
+ RN = res;
+ SET_ZN(res); gpu_flag_c = (r2 >> 31) & 0x01;
+#ifdef GPU_DIS_RORQ
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_sha(void)
+{
+/* int dreg = jaguar.op & 31;
+ int32 r1 = (int32)jaguar.r[(jaguar.op >> 5) & 31];
+ uint32 r2 = jaguar.r[dreg];
+ uint32 res;
+
+ CLR_ZNC;
+ if (r1 < 0)
+ {
+ res = (r1 <= -32) ? 0 : (r2 << -r1);
+ jaguar.FLAGS |= (r2 >> 30) & 2;
+ }
+ else
+ {
+ res = (r1 >= 32) ? ((int32)r2 >> 31) : ((int32)r2 >> r1);
+ jaguar.FLAGS |= (r2 << 1) & 2;
+ }
+ jaguar.r[dreg] = res;
+ SET_ZN(res);*/
+
+#ifdef GPU_DIS_SHA
+ if (doGPUDis)
+ WriteLog("%06X: SHA R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ uint32 res;
+
+ if ((int32)RM < 0)
+ {
+ res = ((int32)RM <= -32) ? 0 : (RN << -(int32)RM);
+ gpu_flag_c = RN >> 31;
+ }
+ else
+ {
+ res = ((int32)RM >= 32) ? ((int32)RN >> 31) : ((int32)RN >> (int32)RM);
+ gpu_flag_c = RN & 0x01;
+ }
+ RN = res;
+ SET_ZN(res);
+#ifdef GPU_DIS_SHA
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+
+/* int32 sRM=(int32)RM;
+ uint32 _RN=RN;
+
+ if (sRM<0)
+ {
+ uint32 shift=-sRM;
+ if (shift>=32) shift=32;
+ gpu_flag_c=(_RN&0x80000000)>>31;
+ while (shift)
+ {
+ _RN<<=1;
+ shift--;
+ }
+ }
+ else
+ {
+ uint32 shift=sRM;
+ if (shift>=32) shift=32;
+ gpu_flag_c=_RN&0x1;
+ while (shift)
+ {
+ _RN=((int32)_RN)>>1;
+ shift--;
+ }
+ }
+ RN=_RN;
+ SET_FLAG_Z(_RN);
+ SET_FLAG_N(_RN);*/
+}
+
+static void gpu_opcode_sharq(void)
+{
+#ifdef GPU_DIS_SHARQ
+ if (doGPUDis)
+ WriteLog("%06X: SHARQ #%u, R%02u [NCZ:%u%u%u, R%02u=%08X] -> ", gpu_pc-2, gpu_convert_zero[IMM_1], IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+ uint32 res = (int32)RN >> gpu_convert_zero[IMM_1];
+ SET_ZN(res); gpu_flag_c = RN & 0x01;
+ RN = res;
+#ifdef GPU_DIS_SHARQ
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN);
+#endif
+}
+
+static void gpu_opcode_sh(void)
+{
+#ifdef GPU_DIS_SH
+ if (doGPUDis)
+ WriteLog("%06X: SH R%02u, R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+ if (RM & 0x80000000) // Shift left
+ {
+ gpu_flag_c = RN >> 31;
+ RN = ((int32)RM <= -32 ? 0 : RN << -(int32)RM);
+ }
+ else // Shift right
+ {
+ gpu_flag_c = RN & 0x01;
+ RN = (RM >= 32 ? 0 : RN >> RM);
+ }
+ SET_ZN(RN);
+#ifdef GPU_DIS_SH
+ if (doGPUDis)
+ WriteLog("[NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
+#endif
+}
+
+//Temporary: Testing only!
+//#include "gpu2.cpp"
+//#include "gpu3.cpp"
+
+#else
+
+// New thread-safe GPU core
+
+int GPUCore(void * data)
+{
+}
+
+#endif
diff --git a/src/jaguar/gpu.h b/src/jaguar/gpu.h
new file mode 100644
index 00000000..97ba4b33
--- /dev/null
+++ b/src/jaguar/gpu.h
@@ -0,0 +1,38 @@
+//
+// GPU.H: Header file
+//
+
+#ifndef __GPU_H__
+#define __GPU_H__
+
+//#include "types.h"
+#include "memory.h"
+
+#define GPU_CONTROL_RAM_BASE 0x00F02100
+#define GPU_WORK_RAM_BASE 0x00F03000
+
+void GPUInit(void);
+void GPUReset(void);
+void GPUExec(int32);
+void GPUDone(void);
+void GPUUpdateRegisterBanks(void);
+void GPUHandleIRQs(void);
+void GPUSetIRQLine(int irqline, int state);
+
+uint8 GPUReadByte(uint32 offset, uint32 who = UNKNOWN);
+uint16 GPUReadWord(uint32 offset, uint32 who = UNKNOWN);
+uint32 GPUReadLong(uint32 offset, uint32 who = UNKNOWN);
+void GPUWriteByte(uint32 offset, uint8 data, uint32 who = UNKNOWN);
+void GPUWriteWord(uint32 offset, uint16 data, uint32 who = UNKNOWN);
+void GPUWriteLong(uint32 offset, uint32 data, uint32 who = UNKNOWN);
+
+uint32 GPUGetPC(void);
+void GPUReleaseTimeslice(void);
+void GPUResetStats(void);
+uint32 GPUReadPC(void);
+
+// GPU interrupt numbers (from $F00100, bits 4-8)
+
+enum { GPUIRQ_CPU = 0, GPUIRQ_DSP, GPUIRQ_TIMER, GPUIRQ_OBJECT, GPUIRQ_BLITTER };
+
+#endif // __GPU_H__
diff --git a/src/jaguar/jagdasm.c b/src/jaguar/jagdasm.c
new file mode 100644
index 00000000..6fadae8a
--- /dev/null
+++ b/src/jaguar/jagdasm.c
@@ -0,0 +1,166 @@
+#include "jagdasm.h"
+
+#include <stdio.h>
+#include "jaguar.h"
+
+#define ROPCODE(a) JaguarReadWord(a)
+
+uint8 convert_zero[32] =
+{ 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 };
+
+const char * condition[32] =
+{
+ "",
+ "nz,",
+ "z,",
+ "???,",
+ "nc,",
+ "nc nz,",
+ "nc z,",
+ "???,",
+
+ "c,",
+ "c nz,",
+ "c z,",
+ "???,",
+ "???,",
+ "???,",
+ "???,",
+ "???,",
+
+ "???,",
+ "???,",
+ "???,",
+ "???,",
+ "nn,",
+ "nn nz,",
+ "nn z,",
+ "???,",
+
+ "n,",
+ "n nz,",
+ "n z,",
+ "???,",
+ "???,",
+ "???,",
+ "???,",
+ "never,"
+};
+
+
+
+char * signed_16bit(int16 val)
+{
+ static char temp[10];
+
+ if (val < 0)
+ sprintf(temp, "-$%X", -val);
+ else
+ sprintf(temp, "$%X", val);
+
+ return temp;
+}
+
+unsigned dasmjag(int dsp_type, char * buffer, unsigned pc)
+{
+ int op = ROPCODE(pc);
+ int reg1 = (op >> 5) & 31;
+ int reg2 = op & 31;
+ int size = 2;
+
+ pc += 2;
+ switch (op >> 10)
+ {
+ case 0: sprintf(buffer, "ADD R%02d,R%02d", reg1, reg2); break;
+ case 1: sprintf(buffer, "ADDC R%02d,R%02d", reg1, reg2); break;
+ case 2: sprintf(buffer, "ADDQ $%X,R%02d", convert_zero[reg1], reg2); break;
+ case 3: sprintf(buffer, "ADDQT $%X,R%02d", convert_zero[reg1], reg2); break;
+ case 4: sprintf(buffer, "SUB R%02d,R%02d", reg1, reg2); break;
+ case 5: sprintf(buffer, "SUBC R%02d,R%02d", reg1, reg2); break;
+ case 6: sprintf(buffer, "SUBQ $%X,R%02d", convert_zero[reg1], reg2); break;
+ case 7: sprintf(buffer, "SUBQT $%X,R%02d", convert_zero[reg1], reg2); break;
+ case 8: sprintf(buffer, "NEG R%02d", reg2); break;
+ case 9: sprintf(buffer, "AND R%02d,R%02d", reg1, reg2); break;
+ case 10: sprintf(buffer, "OR R%02d,R%02d", reg1, reg2); break;
+ case 11: sprintf(buffer, "XOR R%02d,R%02d", reg1, reg2); break;
+ case 12: sprintf(buffer, "NOT R%02d", reg2); break;
+ case 13: sprintf(buffer, "BTST $%X,R%02d", reg1, reg2); break;
+ case 14: sprintf(buffer, "BSET $%X,R%02d", reg1, reg2); break;
+ case 15: sprintf(buffer, "BCLR $%X,R%02d", reg1, reg2); break;
+ case 16: sprintf(buffer, "MULT R%02d,R%02d", reg1, reg2); break;
+ case 17: sprintf(buffer, "IMULT R%02d,R%02d", reg1, reg2); break;
+ case 18: sprintf(buffer, "IMULTN R%02d,R%02d", reg1, reg2); break;
+ case 19: sprintf(buffer, "RESMAC R%02d", reg2); break;
+ case 20: sprintf(buffer, "IMACN R%02d,R%02d", reg1, reg2); break;
+ case 21: sprintf(buffer, "DIV R%02d,R%02d", reg1, reg2); break;
+ case 22: sprintf(buffer, "ABS R%02d", reg2); break;
+ case 23: sprintf(buffer, "SH R%02d,R%02d", reg1, reg2); break;
+ case 24: sprintf(buffer, "SHLQ $%X,R%02d", 32 - convert_zero[reg1], reg2); break;
+ case 25: sprintf(buffer, "SHRQ $%X,R%02d", convert_zero[reg1], reg2); break;
+ case 26: sprintf(buffer, "SHA R%02d,R%02d", reg1, reg2); break;
+ case 27: sprintf(buffer, "SHARQ $%X,R%02d", convert_zero[reg1], reg2); break;
+ case 28: sprintf(buffer, "ROR R%02d,R%02d", reg1, reg2); break;
+ case 29: sprintf(buffer, "RORQ $%X,R%02d", convert_zero[reg1], reg2); break;
+ case 30: sprintf(buffer, "CMP R%02d,R%02d", reg1, reg2); break;
+ case 31: sprintf(buffer, "CMPQ %s,R%02d", signed_16bit((int16)(reg1 << 11) >> 11), reg2);break;
+ case 32: if (dsp_type == JAGUAR_GPU)
+ sprintf(buffer, "SAT8 R%02d", reg2);
+ else
+ sprintf(buffer, "SUBQMOD $%X,R%02d", convert_zero[reg1], reg2);
+ break;
+ case 33: if (dsp_type == JAGUAR_GPU)
+ sprintf(buffer, "SAT16 R%02d", reg2);
+ else
+ sprintf(buffer, "SAT16S R%02d", reg2);
+ break;
+ case 34: sprintf(buffer, "MOVE R%02d,R%02d", reg1, reg2); break;
+ case 35: sprintf(buffer, "MOVEQ %d,R%02d", reg1, reg2); break;
+ case 36: sprintf(buffer, "MOVETA R%02d,R%02d", reg1, reg2); break;
+ case 37: sprintf(buffer, "MOVEFA R%02d,R%02d", reg1, reg2); break;
+ case 38: sprintf(buffer, "MOVEI $%08X,R%02d", ROPCODE(pc) | (ROPCODE(pc+2)<<16), reg2); size = 6; break;
+ case 39: sprintf(buffer, "LOADB (R%02d),R%02d", reg1, reg2); break;
+ case 40: sprintf(buffer, "LOADW (R%02d),R%02d", reg1, reg2); break;
+ case 41: sprintf(buffer, "LOAD (R%02d),R%02d", reg1, reg2); break;
+ case 42: if (dsp_type == JAGUAR_GPU)
+ sprintf(buffer, "LOADP (R%02d),R%02d", reg1, reg2);
+ else
+ sprintf(buffer, "SAT32S R%02d", reg2);
+ break;
+ case 43: sprintf(buffer, "LOAD (R14+$%X),R%02d", convert_zero[reg1]*4, reg2);break;
+ case 44: sprintf(buffer, "LOAD (R15+$%X),R%02d", convert_zero[reg1]*4, reg2);break;
+ case 45: sprintf(buffer, "STOREB R%02d,(R%02d)", reg2, reg1); break;
+ case 46: sprintf(buffer, "STOREW R%02d,(R%02d)", reg2, reg1); break;
+ case 47: sprintf(buffer, "STORE R%02d,(R%02d)", reg2, reg1); break;
+ case 48: if (dsp_type == JAGUAR_GPU)
+ sprintf(buffer, "STOREP R%02d,(R%02d)", reg2, reg1);
+ else
+ sprintf(buffer, "MIRROR R%02d", reg2);
+ break;
+ case 49: sprintf(buffer, "STORE R%02d,(R14+$%X)", reg2, convert_zero[reg1]*4);break;
+ case 50: sprintf(buffer, "STORE R%02d,(R15+$%X)", reg2, convert_zero[reg1]*4);break;
+ case 51: sprintf(buffer, "MOVE PC,R%02d", reg2); break;
+ case 52: sprintf(buffer, "JUMP %s(R%02d)", condition[reg2], reg1); break;
+ case 53: sprintf(buffer, "JR %s%08X", condition[reg2], pc + ((int8)(reg1 << 3) >> 2)); break;
+ case 54: sprintf(buffer, "MMULT R%02d,R%02d", reg1, reg2); break;
+ case 55: sprintf(buffer, "MTOI R%02d,R%02d", reg1, reg2); break;
+ case 56: sprintf(buffer, "NORMI R%02d,R%02d", reg1, reg2); break;
+ case 57: sprintf(buffer, "NOP"); break;
+ case 58: sprintf(buffer, "LOAD (R14+R%02d),R%02d", reg1, reg2); break;
+ case 59: sprintf(buffer, "LOAD (R15+R%02d),R%02d", reg1, reg2); break;
+ case 60: sprintf(buffer, "STORE R%02d,(R14+R%02d)", reg2, reg1); break;
+ case 61: sprintf(buffer, "STORE R%02d,(R15+R%02d)", reg2, reg1); break;
+ case 62: if (dsp_type == JAGUAR_GPU)
+ sprintf(buffer, "SAT24 R%02d", reg2);
+ else
+ sprintf(buffer, "illegal");
+ break;
+ case 63: if (dsp_type == JAGUAR_GPU)
+ sprintf(buffer, (reg1 ? "UNPACK R%02d" : "PACK R%02d"), reg2);
+ else
+ sprintf(buffer, "ADDQMOD $%X,R%02d", convert_zero[reg1], reg2);
+ break;
+ }
+ sprintf(buffer,"%-24s (%04X)", buffer, op);
+
+ return size;
+}
diff --git a/src/jaguar/jagdasm.h b/src/jaguar/jagdasm.h
new file mode 100644
index 00000000..0171f2bd
--- /dev/null
+++ b/src/jaguar/jagdasm.h
@@ -0,0 +1,9 @@
+#ifndef __JAGDASM__
+#define __JAGDASM__
+
+#define JAGUAR_GPU 0
+#define JAGUAR_DSP 1
+
+unsigned dasmjag(int dsp_type, char * buffer, unsigned pc);
+
+#endif
diff --git a/src/jaguar/jaguar.c b/src/jaguar/jaguar.c
new file mode 100644
index 00000000..796d9ee8
--- /dev/null
+++ b/src/jaguar/jaguar.c
@@ -0,0 +1,1916 @@
+//
+// JAGUAR.CPP
+//
+// Originally by David Raingeard (Cal2)
+// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Carwin Jones (BeOS)
+// Cleanups and endian wrongness amelioration by James L. Hammons
+// Note: Endian wrongness probably stems from the MAME origins of this emu and
+// the braindead way in which MAME handled memory when this was written. :-)
+//
+// JLH = James L. Hammons
+//
+// WHO WHEN WHAT
+// --- ---------- -----------------------------------------------------------
+// JLH 11/25/2009 Major rewrite of memory subsystem and handlers
+//
+
+#include "jaguar.h"
+
+#include <SDL.h>
+#include "SDL_opengl.h"
+#include "blitter.h"
+#include "cdrom.h"
+#include "dac.h"
+#include "dsp.h"
+#include "eeprom.h"
+#include "event.h"
+#include "gpu.h"
+//#include "gui.h"
+#include "jerry.h"
+#include "joystick.h"
+#include "log.h"
+#include "m68k.h"
+//#include "memory.h"
+#include "mmu.h"
+#include "settings.h"
+#include "tom.h"
+#include "video.h"
+
+#define CPU_DEBUG
+//Do this in makefile??? Yes! Could, but it's easier to define here...
+//#define LOG_UNMAPPED_MEMORY_ACCESSES
+//#define ABORT_ON_UNMAPPED_MEMORY_ACCESS
+#define ABORT_ON_ILLEGAL_INSTRUCTIONS
+//#define ABORT_ON_OFFICIAL_ILLEGAL_INSTRUCTION
+#define CPU_DEBUG_MEMORY
+
+// Private function prototypes
+
+unsigned jaguar_unknown_readbyte(unsigned address, uint32 who = UNKNOWN);
+unsigned jaguar_unknown_readword(unsigned address, uint32 who = UNKNOWN);
+void jaguar_unknown_writebyte(unsigned address, unsigned data, uint32 who = UNKNOWN);
+void jaguar_unknown_writeword(unsigned address, unsigned data, uint32 who = UNKNOWN);
+void M68K_show_context(void);
+
+// External variables
+
+#ifdef CPU_DEBUG_MEMORY
+extern bool startMemLog; // Set by "e" key
+extern int effect_start;
+extern int effect_start2, effect_start3, effect_start4, effect_start5, effect_start6;
+#endif
+
+uint32 jaguar_active_memory_dumps = 0;
+
+uint32 jaguarMainROMCRC32, jaguarROMSize, jaguarRunAddress;
+
+bool BIOSLoaded = false;
+bool CDBIOSLoaded = false;
+
+#ifdef CPU_DEBUG_MEMORY
+uint8 writeMemMax[0x400000], writeMemMin[0x400000];
+uint8 readMem[0x400000];
+uint32 returnAddr[4000], raPtr = 0xFFFFFFFF;
+#endif
+
+uint32 pcQueue[0x400];
+uint32 pcQPtr = 0;
+
+//
+// Callback function to detect illegal instructions
+//
+void GPUDumpDisassembly(void);
+void GPUDumpRegisters(void);
+static bool start = false;
+
+void M68KInstructionHook(void)
+{
+ uint32 m68kPC = m68k_get_reg(NULL, M68K_REG_PC);
+
+// For tracebacks...
+// Ideally, we'd save all the registers as well...
+ pcQueue[pcQPtr++] = m68kPC;
+ pcQPtr &= 0x3FF;
+
+ if (m68kPC & 0x01) // Oops! We're fetching an odd address!
+ {
+ WriteLog("M68K: Attempted to execute from an odd adress!\n\nBacktrace:\n\n");
+
+ static char buffer[2048];
+ for(int i=0; i<0x400; i++)
+ {
+ m68k_disassemble(buffer, pcQueue[(pcQPtr + i) & 0x3FF], M68K_CPU_TYPE_68000);
+ WriteLog("\t%08X: %s\n", pcQueue[(pcQPtr + i) & 0x3FF], buffer);
+ }
+ WriteLog("\n");
+
+ uint32 topOfStack = m68k_get_reg(NULL, M68K_REG_A7);
+ WriteLog("M68K: Top of stack: %08X. Stack trace:\n", JaguarReadLong(topOfStack));
+ for(int i=0; i<10; i++)
+ WriteLog("%06X: %08X\n", topOfStack - (i * 4), JaguarReadLong(topOfStack - (i * 4)));
+ WriteLog("Jaguar: VBL interrupt is %s\n", ((TOMIRQEnabled(IRQ_VBLANK)) && (JaguarInterruptHandlerIsValid(64))) ? "enabled" : "disabled");
+ M68K_show_context();
+ LogDone();
+ exit(0);
+ }
+
+/* if (m68kPC >= 0x807EC4 && m68kPC <= 0x807EDB)
+ {
+ static char buffer[2048];
+ m68k_disassemble(buffer, m68kPC, M68K_CPU_TYPE_68000);
+ WriteLog("%08X: %s", m68kPC, buffer);
+ WriteLog("\t\tA0=%08X, A1=%08X, D0=%08X, D1=%08X\n",
+ m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1),
+ m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1));
+ }//*/
+/* if (m68kPC == 0x8D0E48 && effect_start5)
+ {
+ WriteLog("\nM68K: At collision detection code. Exiting!\n\n");
+ GPUDumpRegisters();
+ GPUDumpDisassembly();
+ log_done();
+ exit(0);
+ }//*/
+/* uint16 opcode = JaguarReadWord(m68kPC);
+ if (opcode == 0x4E75) // RTS
+ {
+ if (startMemLog)
+// WriteLog("Jaguar: Returning from subroutine to %08X\n", JaguarReadLong(m68k_get_reg(NULL, M68K_REG_A7)));
+ {
+ uint32 addr = JaguarReadLong(m68k_get_reg(NULL, M68K_REG_A7));
+ bool found = false;
+ if (raPtr != 0xFFFFFFFF)
+ {
+ for(uint32 i=0; i<=raPtr; i++)
+ {
+ if (returnAddr[i] == addr)
+ {
+ found = true;
+ break;
+ }
+ }
+ }
+
+ if (!found)
+ returnAddr[++raPtr] = addr;
+ }
+ }//*/
+
+//Flip Out! debugging...
+//805F46, 806486
+/*
+00805FDC: movea.l #$9c6f8, A0 D0=00100010, A0=00100000
+00805FE2: move.w #$10, (A0)+ D0=00100010, A0=0009C6F8
+00805FE6: cmpa.l #$c96f8, A0 D0=00100010, A0=0009C6FA
+00805FEC: bne 805fe2 D0=00100010, A0=0009C6FA
+
+0080603A: move.l #$11ed7c, $100.w D0=61700080, A0=000C96F8, D1=00000000, A1=000040D8
+
+0012314C: move.l (A0)+, (A1)+ D0=61700080, A0=00124174, D1=00000000, A1=00F03FFC
+0012314E: cmpa.l #$f04000, A1 D0=61700080, A0=00124178, D1=00000000, A1=00F04000
+00123154: blt 12314c D0=61700080, A0=00124178, D1=00000000, A1=00F04000
+00123156: move.l #$0, $f035d0.l D0=61700080, A0=00124178, D1=00000000, A1=00F04000
+00123160: move.l #$f03000, $f02110.l D0=61700080, A0=00124178, D1=00000000, A1=00F04000
+0012316A: move.l #$1, $f02114.l D0=61700080, A0=00124178, D1=00000000, A1=00F04000
+00123174: rts D0=61700080, A0=00124178, D1=00000000, A1=00F04000
+*/
+/* static char buffer[2048];
+//if (m68kPC > 0x805F48) start = true;
+//if (m68kPC > 0x806486) start = true;
+//if (m68kPC == 0x805FEE) start = true;
+//if (m68kPC == 0x80600C)// start = true;
+if (m68kPC == 0x802058) start = true;
+//{
+// GPUDumpRegisters();
+// GPUDumpDisassembly();
+//
+// M68K_show_context();
+// log_done();
+// exit(0);
+//}
+ if (start)
+ {
+ m68k_disassemble(buffer, m68kPC, M68K_CPU_TYPE_68000);
+ WriteLog("%08X: %s \t\tD0=%08X, A0=%08X, D1=%08X, A1=%08X\n", m68kPC, buffer, m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_D1), m68k_get_reg(NULL, M68K_REG_A1));
+ }//*/
+
+/* if (m68kPC == 0x803F16)
+ {
+ WriteLog("M68K: Registers found at $803F16:\n");
+ WriteLog("\t68K PC=%06X\n", m68k_get_reg(NULL, M68K_REG_PC));
+ for(int i=M68K_REG_D0; i<=M68K_REG_D7; i++)
+ WriteLog("\tD%i = %08X\n", i-M68K_REG_D0, m68k_get_reg(NULL, (m68k_register_t)i));
+ WriteLog("\n");
+ for(int i=M68K_REG_A0; i<=M68K_REG_A7; i++)
+ WriteLog("\tA%i = %08X\n", i-M68K_REG_A0, m68k_get_reg(NULL, (m68k_register_t)i));
+ }*/
+//Looks like the DSP is supposed to return $12345678 when it finishes its validation routine...
+// !!! Investigate !!!
+/*extern bool doDSPDis;
+ static bool disgo = false;
+ if (m68kPC == 0x50222)
+ {
+ // CD BIOS hacking
+// WriteLog("M68K: About to stuff $12345678 into $F1B000 (=%08X)...\n", DSPReadLong(0xF1B000, M68K));
+// DSPWriteLong(0xF1B000, 0x12345678, M68K);
+// disgo = true;
+ }
+ if (m68kPC == 0x5000)
+// doDSPDis = true;
+ disgo = true;
+ if (disgo)
+ {
+ static char buffer[2048];
+ m68k_disassemble(buffer, m68kPC, M68K_CPU_TYPE_68000);
+ WriteLog("%08X: %s", m68kPC, buffer);
+ WriteLog("\t\tA0=%08X, A1=%08X, D0=%08X, D1=%08X, D2=%08X\n",
+ m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1),
+ m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1), m68k_get_reg(NULL, M68K_REG_D2));
+ }//*/
+ if (m68kPC == 0x82E1A)
+ {
+ static char buffer[2048];
+ m68k_disassemble(buffer, m68kPC, M68K_CPU_TYPE_68000);
+ WriteLog("--> [Routine start] %08X: %s", m68kPC, buffer);
+ WriteLog("\t\tA0=%08X, A1=%08X, D0=%08X(cmd), D1=%08X(# bytes), D2=%08X\n",
+ m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1),
+ m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1), m68k_get_reg(NULL, M68K_REG_D2));
+ }//*/
+ if (m68kPC == 0x82E58)
+ WriteLog("--> [Routine end]\n");
+ if (m68kPC == 0x80004)
+ {
+ WriteLog("--> [Calling BusWrite2] D2: %08X\n", m68k_get_reg(NULL, M68K_REG_D2));
+// m68k_set_reg(M68K_REG_D2, 0x12345678);
+ }//*/
+/*
+CD_init:: -> $3000
+BIOS_VER:: -> $3004
+CD_mode:: -> $3006
+CD_ack:: -> $300C
+CD_jeri:: -> $3012
+CD_spin:: -> $3018
+CD_stop:: -> $301E
+CD_mute:: -> $3024
+CD_umute:: -> $302A
+CD_paus:: -> $3030
+CD_upaus:: -> $3036
+CD_read:: -> $303C
+CD_uread:: -> $3042
+CD_setup:: -> $3048
+CD_ptr:: -> $304E
+CD_osamp:: -> $3054
+CD_getoc:: -> $305A
+CD_initm:: -> $3060
+CD_initf:: -> $3066
+CD_switch:: -> $306C
+*/
+ if (m68kPC == 0x3000)
+ WriteLog("M68K: CD_init\n");
+ else if (m68kPC == 0x3006 + (6 * 0))
+ WriteLog("M68K: CD_mode\n");
+ else if (m68kPC == 0x3006 + (6 * 1))
+ WriteLog("M68K: CD_ack\n");
+ else if (m68kPC == 0x3006 + (6 * 2))
+ WriteLog("M68K: CD_jeri\n");
+ else if (m68kPC == 0x3006 + (6 * 3))
+ WriteLog("M68K: CD_spin\n");
+ else if (m68kPC == 0x3006 + (6 * 4))
+ WriteLog("M68K: CD_stop\n");
+ else if (m68kPC == 0x3006 + (6 * 5))
+ WriteLog("M68K: CD_mute\n");
+ else if (m68kPC == 0x3006 + (6 * 6))
+ WriteLog("M68K: CD_umute\n");
+ else if (m68kPC == 0x3006 + (6 * 7))
+ WriteLog("M68K: CD_paus\n");
+ else if (m68kPC == 0x3006 + (6 * 8))
+ WriteLog("M68K: CD_upaus\n");
+ else if (m68kPC == 0x3006 + (6 * 9))
+ WriteLog("M68K: CD_read\n");
+ else if (m68kPC == 0x3006 + (6 * 10))
+ WriteLog("M68K: CD_uread\n");
+ else if (m68kPC == 0x3006 + (6 * 11))
+ WriteLog("M68K: CD_setup\n");
+ else if (m68kPC == 0x3006 + (6 * 12))
+ WriteLog("M68K: CD_ptr\n");
+ else if (m68kPC == 0x3006 + (6 * 13))
+ WriteLog("M68K: CD_osamp\n");
+ else if (m68kPC == 0x3006 + (6 * 14))
+ WriteLog("M68K: CD_getoc\n");
+ else if (m68kPC == 0x3006 + (6 * 15))
+ WriteLog("M68K: CD_initm\n");
+ else if (m68kPC == 0x3006 + (6 * 16))
+ WriteLog("M68K: CD_initf\n");
+ else if (m68kPC == 0x3006 + (6 * 17))
+ WriteLog("M68K: CD_switch\n");
+
+ if (m68kPC >= 0x3000 && m68kPC <= 0x306C)
+ WriteLog("\t\tA0=%08X, A1=%08X, D0=%08X, D1=%08X, D2=%08X\n",
+ m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1),
+ m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1), m68k_get_reg(NULL, M68K_REG_D2));
+//*/
+#ifdef ABORT_ON_ILLEGAL_INSTRUCTIONS
+ if (!m68k_is_valid_instruction(m68k_read_memory_16(m68kPC), M68K_CPU_TYPE_68000))
+ {
+#ifndef ABORT_ON_OFFICIAL_ILLEGAL_INSTRUCTION
+ if (m68k_read_memory_16(m68kPC) == 0x4AFC)
+ {
+ // This is a kludge to let homebrew programs work properly (i.e., let the other processors
+ // keep going even when the 68K dumped back to the debugger or what have you).
+//dis no wok right!
+// m68k_set_reg(M68K_REG_PC, m68kPC - 2);
+// Try setting the vector to the illegal instruction...
+//This doesn't work right either! Do something else! Quick!
+// SET32(jaguar_mainRam, 0x10, m68kPC);
+
+ return;
+ }
+#endif
+
+ WriteLog("\nM68K encountered an illegal instruction at %08X!!!\n\nAborting!\n", m68kPC);
+ uint32 topOfStack = m68k_get_reg(NULL, M68K_REG_A7);
+ WriteLog("M68K: Top of stack: %08X. Stack trace:\n", JaguarReadLong(topOfStack));
+ for(int i=0; i<10; i++)
+ WriteLog("%06X: %08X\n", topOfStack - (i * 4), JaguarReadLong(topOfStack - (i * 4)));
+ WriteLog("Jaguar: VBL interrupt is %s\n", ((TOMIRQEnabled(IRQ_VBLANK)) && (JaguarInterruptHandlerIsValid(64))) ? "enabled" : "disabled");
+ M68K_show_context();
+
+//temp
+// WriteLog("\n\n68K disasm\n\n");
+// jaguar_dasm(0x802000, 0x50C);
+// WriteLog("\n\n");
+//endoftemp
+
+ LogDone();
+ exit(0);
+ }//*/
+#endif
+}
+
+#if 0
+Now here be dragons...
+Here is how memory ranges are defined in the CoJag driver.
+Note that we only have to be concerned with 3 entities read/writing anything:
+The main CPU, the GPU, and the DSP. Everything else is unnecessary. So we can keep our main memory
+checking in jaguar.cpp, gpu.cpp and dsp.cpp. There should be NO checking in TOM, JERRY, etc. other than
+things that are entirely internal to those modules. This way we should be able to get a handle on all
+this crap which is currently scattered over Hell's Half Acre(tm).
+
+Also: We need to distinguish whether or not we need .b, .w, and .dw versions of everything, or if there
+is a good way to collapse that shit (look below for inspiration). Current method works, but is error prone.
+
+/*************************************
+ *
+ * Main CPU memory handlers
+ *
+ *************************************/
+
+static ADDRESS_MAP_START( m68020_map, ADDRESS_SPACE_PROGRAM, 32 )
+ AM_RANGE(0x000000, 0x7fffff) AM_RAM AM_BASE(&jaguar_shared_ram) AM_SHARE(1)
+ AM_RANGE(0x800000, 0x9fffff) AM_ROM AM_REGION(REGION_USER1, 0) AM_BASE(&rom_base)
+ AM_RANGE(0xa00000, 0xa1ffff) AM_RAM
+ AM_RANGE(0xa20000, 0xa21fff) AM_READWRITE(eeprom_data_r, eeprom_data_w) AM_BASE(&generic_nvram32) AM_SIZE(&generic_nvram_size)
+ AM_RANGE(0xa30000, 0xa30003) AM_WRITE(watchdog_reset32_w)
+ AM_RANGE(0xa40000, 0xa40003) AM_WRITE(eeprom_enable_w)
+ AM_RANGE(0xb70000, 0xb70003) AM_READWRITE(misc_control_r, misc_control_w)
+ AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK(2)
+ AM_RANGE(0xe00000, 0xe003ff) AM_DEVREADWRITE(IDE_CONTROLLER, "ide", ide_controller32_r, ide_controller32_w)
+ AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE(jaguar_tom_regs32_r, jaguar_tom_regs32_w)
+ AM_RANGE(0xf00400, 0xf007ff) AM_RAM AM_BASE(&jaguar_gpu_clut) AM_SHARE(2)
+ AM_RANGE(0xf02100, 0xf021ff) AM_READWRITE(gpuctrl_r, gpuctrl_w)
+ AM_RANGE(0xf02200, 0xf022ff) AM_READWRITE(jaguar_blitter_r, jaguar_blitter_w)
+ AM_RANGE(0xf03000, 0xf03fff) AM_MIRROR(0x008000) AM_RAM AM_BASE(&jaguar_gpu_ram) AM_SHARE(3)
+ AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w)
+ AM_RANGE(0xf16000, 0xf1600b) AM_READ(cojag_gun_input_r) // GPI02
+ AM_RANGE(0xf17000, 0xf17003) AM_READ(status_r) // GPI03
+// AM_RANGE(0xf17800, 0xf17803) AM_WRITE(latch_w) // GPI04
+ AM_RANGE(0xf17c00, 0xf17c03) AM_READ(jamma_r) // GPI05
+ AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE(dspctrl_r, dspctrl_w)
+ AM_RANGE(0xf1a140, 0xf1a17f) AM_READWRITE(jaguar_serial_r, jaguar_serial_w)
+ AM_RANGE(0xf1b000, 0xf1cfff) AM_RAM AM_BASE(&jaguar_dsp_ram) AM_SHARE(4)
+ADDRESS_MAP_END
+
+/*************************************
+ *
+ * GPU memory handlers
+ *
+ *************************************/
+
+static ADDRESS_MAP_START( gpu_map, ADDRESS_SPACE_PROGRAM, 32 )
+ AM_RANGE(0x000000, 0x7fffff) AM_RAM AM_SHARE(1)
+ AM_RANGE(0x800000, 0xbfffff) AM_ROMBANK(8)
+ AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK(9)
+ AM_RANGE(0xe00000, 0xe003ff) AM_DEVREADWRITE(IDE_CONTROLLER, "ide", ide_controller32_r, ide_controller32_w)
+ AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE(jaguar_tom_regs32_r, jaguar_tom_regs32_w)
+ AM_RANGE(0xf00400, 0xf007ff) AM_RAM AM_SHARE(2)
+ AM_RANGE(0xf02100, 0xf021ff) AM_READWRITE(gpuctrl_r, gpuctrl_w)
+ AM_RANGE(0xf02200, 0xf022ff) AM_READWRITE(jaguar_blitter_r, jaguar_blitter_w)
+ AM_RANGE(0xf03000, 0xf03fff) AM_RAM AM_SHARE(3)
+ AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w)
+ADDRESS_MAP_END
+
+/*************************************
+ *
+ * DSP memory handlers
+ *
+ *************************************/
+
+static ADDRESS_MAP_START( dsp_map, ADDRESS_SPACE_PROGRAM, 32 )
+ AM_RANGE(0x000000, 0x7fffff) AM_RAM AM_SHARE(1)
+ AM_RANGE(0x800000, 0xbfffff) AM_ROMBANK(8)
+ AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK(9)
+ AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w)
+ AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE(dspctrl_r, dspctrl_w)
+ AM_RANGE(0xf1a140, 0xf1a17f) AM_READWRITE(jaguar_serial_r, jaguar_serial_w)
+ AM_RANGE(0xf1b000, 0xf1cfff) AM_RAM AM_SHARE(4)
+ AM_RANGE(0xf1d000, 0xf1dfff) AM_READ(jaguar_wave_rom_r) AM_BASE(&jaguar_wave_rom)
+ADDRESS_MAP_END
+*/
+#endif
+
+//#define EXPERIMENTAL_MEMORY_HANDLING
+// Experimental memory mappage...
+// Dunno if this is a good approach or not, but it seems to make better
+// sense to have all this crap in one spot intstead of scattered all over
+// the place the way it is now.
+#ifdef EXPERIMENTAL_MEMORY_HANDLING
+// Needed defines...
+#define NEW_TIMER_SYSTEM
+
+/*
+uint8 jaguarMainRAM[0x400000]; // 68K CPU RAM
+uint8 jaguarMainROM[0x600000]; // 68K CPU ROM
+uint8 jaguarBootROM[0x040000]; // 68K CPU BIOS ROM--uses only half of this!
+uint8 jaguarCDBootROM[0x040000]; // 68K CPU CD BIOS ROM
+bool BIOSLoaded = false;
+bool CDBIOSLoaded = false;
+
+uint8 cdRAM[0x100];
+uint8 tomRAM[0x4000];
+uint8 jerryRAM[0x10000];
+static uint16 eeprom_ram[64];
+
+// NOTE: CD BIOS ROM is read from cartridge space @ $802000 (it's a cartridge, after all)
+*/
+
+enum MemType { MM_NOP = 0, MM_RAM, MM_ROM, MM_IO };
+
+// M68K Memory map/handlers
+uint32 {
+ { 0x000000, 0x3FFFFF, MM_RAM, jaguarMainRAM },
+ { 0x800000, 0xDFFEFF, MM_ROM, jaguarMainROM },
+// Note that this is really memory mapped I/O region...
+// { 0xDFFF00, 0xDFFFFF, MM_RAM, cdRAM },
+ { 0xDFFF00, 0xDFFF03, MM_IO, cdBUTCH }, // base of Butch == interrupt control register, R/W
+ { 0xDFFF04, 0xDFFF07, MM_IO, cdDSCNTRL }, // DSA control register, R/W
+ { 0xDFFF0A, 0xDFFF0B, MM_IO, cdDS_DATA }, // DSA TX/RX data, R/W
+ { 0xDFFF10, 0xDFFF13, MM_IO, cdI2CNTRL }, // i2s bus control register, R/W
+ { 0xDFFF14, 0xDFFF17, MM_IO, cdSBCNTRL }, // CD subcode control register, R/W
+ { 0xDFFF18, 0xDFFF1B, MM_IO, cdSUBDATA }, // Subcode data register A
+ { 0xDFFF1C, 0xDFFF1F, MM_IO, cdSUBDATB }, // Subcode data register B
+ { 0xDFFF20, 0xDFFF23, MM_IO, cdSB_TIME }, // Subcode time and compare enable (D24)
+ { 0xDFFF24, 0xDFFF27, MM_IO, cdFIFO_DATA }, // i2s FIFO data
+ { 0xDFFF28, 0xDFFF2B, MM_IO, cdI2SDAT2 }, // i2s FIFO data (old)
+ { 0xDFFF2C, 0xDFFF2F, MM_IO, cdUNKNOWN }, // Seems to be some sort of I2S interface
+
+ { 0xE00000, 0xE3FFFF, MM_ROM, jaguarBootROM },
+
+// { 0xF00000, 0xF0FFFF, MM_IO, TOM_REGS_RW },
+ { 0xF00050, 0xF00051, MM_IO, tomTimerPrescaler },
+ { 0xF00052, 0xF00053, MM_IO, tomTimerDivider },
+ { 0xF00400, 0xF005FF, MM_RAM, tomRAM }, // CLUT A&B: How to link these? Write to one writes to the other...
+ { 0xF00600, 0xF007FF, MM_RAM, tomRAM }, // Actually, this is a good approach--just make the reads the same as well
+ //What about LBUF writes???
+ { 0xF02100, 0xF0211F, MM_IO, GPUWriteByte }, // GPU CONTROL
+ { 0xF02200, 0xF0229F, MM_IO, BlitterWriteByte }, // BLITTER
+ { 0xF03000, 0xF03FFF, MM_RAM, GPUWriteByte }, // GPU RAM
+
+ { 0xF10000, 0xF1FFFF, MM_IO, JERRY_REGS_RW },
+
+/*
+ EEPROM:
+ { 0xF14001, 0xF14001, MM_IO_RO, eepromFOO }
+ { 0xF14801, 0xF14801, MM_IO_WO, eepromBAR }
+ { 0xF15001, 0xF15001, MM_IO_RW, eepromBAZ }
+
+ JOYSTICK:
+ { 0xF14000, 0xF14003, MM_IO, joystickFoo }
+ 0 = pad0/1 button values (4 bits each), RO(?)
+ 1 = pad0/1 index value (4 bits each), WO
+ 2 = unused, RO
+ 3 = NTSC/PAL, certain button states, RO
+
+JOYSTICK $F14000 Read/Write
+ 15.....8 7......0
+Read fedcba98 7654321q f-1 Signals J15 to J1
+ q Cartridge EEPROM output data
+Write exxxxxxm 76543210 e 1 = enable J7-J0 outputs
+ 0 = disable J7-J0 outputs
+ x don't care
+ m Audio mute
+ 0 = Audio muted (reset state)
+ 1 = Audio enabled
+ 7-4 J7-J4 outputs (port 2)
+ 3-0 J3-J0 outputs (port 1)
+JOYBUTS $F14002 Read Only
+ 15.....8 7......0
+Read xxxxxxxx rrdv3210 x don't care
+ r Reserved
+ d Reserved
+ v 1 = NTSC Video hardware
+ 0 = PAL Video hardware
+ 3-2 Button inputs B3 & B2 (port 2)
+ 1-0 Button inputs B1 & B0 (port 1)
+
+J4 J5 J6 J7 Port 2 B2 B3 J12 J13 J14 J15
+J3 J2 J1 J0 Port 1 B0 B1 J8 J9 J10 J11
+ 0 0 0 0
+ 0 0 0 1
+ 0 0 1 0
+ 0 0 1 1
+ 0 1 0 0
+ 0 1 0 1
+ 0 1 1 0
+ 0 1 1 1 Row 3 C3 Option # 9 6 3
+ 1 0 0 0
+ 1 0 0 1
+ 1 0 1 0
+ 1 0 1 1 Row 2 C2 C 0 8 5 2
+ 1 1 0 0
+ 1 1 0 1 Row 1 C1 B * 7 4 1
+ 1 1 1 0 Row 0 Pause A Up Down Left Right
+ 1 1 1 1
+
+0 bit read in any position means that button is pressed.
+C3 = C2 = 1 means std. Jag. cntrlr. or nothing attached.
+*/
+};
+
+void WriteByte(uint32 address, uint8 byte, uint32 who/*=UNKNOWN*/)
+{
+ // Not sure, but I think the system only has 24 address bits...
+ address &= 0x00FFFFFF;
+
+ // RAM ($000000 - $3FFFFF) 4M
+ if (address <= 0x3FFFFF)
+ jaguarMainRAM[address] = byte;
+ // hole ($400000 - $7FFFFF) 4M
+ else if (address <= 0x7FFFFF)
+ ; // Do nothing
+ // GAME ROM ($800000 - $DFFEFF) 6M - 256 bytes
+ else if (address <= 0xDFFEFF)
+ ; // Do nothing
+ // CDROM ($DFFF00 - $DFFFFF) 256 bytes
+ else if (address <= 0xDFFFFF)
+ {
+ cdRAM[address & 0xFF] = byte;
+#ifdef CDROM_LOG
+ if ((address & 0xFF) < 12 * 4)
+ WriteLog("[%s] ", BReg[(address & 0xFF) / 4]);
+ WriteLog("CDROM: %s writing byte $%02X at $%08X [68K PC=$%08X]\n", whoName[who], data, offset, m68k_get_reg(NULL, M68K_REG_PC));
+#endif
+ }
+ // BIOS ROM ($E00000 - $E3FFFF) 256K
+ else if (address <= 0xE3FFFF)
+ ; // Do nothing
+ // hole ($E40000 - $EFFFFF) 768K
+ else if (address <= 0xEFFFFF)
+ ; // Do nothing
+ // TOM ($F00000 - $F0FFFF) 64K
+ else if (address <= 0xF0FFFF)
+// ; // Do nothing
+ {
+ if (address == 0xF00050)
+ {
+ tomTimerPrescaler = (tomTimerPrescaler & 0x00FF) | ((uint16)byte << 8);
+ TOMResetPIT();
+ return;
+ }
+ else if (address == 0xF00051)
+ {
+ tomTimerPrescaler = (tomTimerPrescaler & 0xFF00) | byte;
+ TOMResetPIT();
+ return;
+ }
+ else if (address == 0xF00052)
+ {
+ tomTimerDivider = (tomTimerDivider & 0x00FF) | ((uint16)byte << 8);
+ TOMResetPIT();
+ return;
+ }
+ else if (address == 0xF00053)
+ {
+ tomTimerDivider = (tomTimerDivider & 0xFF00) | byte;
+ TOMResetPIT();
+ return;
+ }
+ else if (address >= 0xF00400 && address <= 0xF007FF) // CLUT (A & B)
+ {
+ // Writing to one CLUT writes to the other
+ address &= 0x5FF; // Mask out $F00600 (restrict to $F00400-5FF)
+ tomRAM[address] = tomRAM[address + 0x200] = byte;
+ return;
+ }
+ //What about LBUF writes???
+ else if ((address >= 0xF02100) && (address <= 0xF0211F)) // GPU CONTROL
+ {
+ GPUWriteByte(address, byte, who);
+ return;
+ }
+ else if ((address >= 0xF02200) && (address <= 0xF0229F)) // BLITTER
+ {
+ BlitterWriteByte(address, byte, who);
+ return;
+ }
+ else if ((address >= 0xF03000) && (address <= 0xF03FFF)) // GPU RAM
+ {
+ GPUWriteByte(address, byte, who);
+ return;
+ }
+
+ tomRAM[address & 0x3FFF] = byte;
+ }
+ // JERRY ($F10000 - $F1FFFF) 64K
+ else if (address <= 0xF1FFFF)
+// ; // Do nothing
+ {
+#ifdef JERRY_DEBUG
+ WriteLog("jerry: writing byte %.2x at 0x%.6x\n", byte, address);
+#endif
+ if ((address >= DSP_CONTROL_RAM_BASE) && (address < DSP_CONTROL_RAM_BASE+0x20))
+ {
+ DSPWriteByte(address, byte, who);
+ return;
+ }
+ else if ((address >= DSP_WORK_RAM_BASE) && (address < DSP_WORK_RAM_BASE+0x2000))
+ {
+ DSPWriteByte(address, byte, who);
+ return;
+ }
+ // SCLK ($F1A150--8 bits wide)
+//NOTE: This should be taken care of in DAC...
+ else if ((address >= 0xF1A152) && (address <= 0xF1A153))
+ {
+// WriteLog("JERRY: Writing %02X to SCLK...\n", data);
+ if ((address & 0x03) == 2)
+ JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0x00FF) | ((uint32)byte << 8);
+ else
+ JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0xFF00) | (uint32)byte;
+
+ JERRYI2SInterruptTimer = -1;
+#ifndef NEW_TIMER_SYSTEM
+ jerry_i2s_exec(0);
+#else
+ RemoveCallback(JERRYI2SCallback);
+ JERRYI2SCallback();
+#endif
+// return;
+ }
+ // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
+ else if (address >= 0xF1A148 && address <= 0xF1A157)
+ {
+ DACWriteByte(address, byte, who);
+ return;
+ }
+ else if (address >= 0xF10000 && address <= 0xF10007)
+ {
+#ifndef NEW_TIMER_SYSTEM
+ switch (address & 0x07)
+ {
+ case 0:
+ JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0x00FF) | (byte << 8);
+ JERRYResetPIT1();
+ break;
+ case 1:
+ JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0xFF00) | byte;
+ JERRYResetPIT1();
+ break;
+ case 2:
+ JERRYPIT1Divider = (JERRYPIT1Divider & 0x00FF) | (byte << 8);
+ JERRYResetPIT1();
+ break;
+ case 3:
+ JERRYPIT1Divider = (JERRYPIT1Divider & 0xFF00) | byte;
+ JERRYResetPIT1();
+ break;
+ case 4:
+ JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0x00FF) | (byte << 8);
+ JERRYResetPIT2();
+ break;
+ case 5:
+ JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0xFF00) | byte;
+ JERRYResetPIT2();
+ break;
+ case 6:
+ JERRYPIT2Divider = (JERRYPIT2Divider & 0x00FF) | (byte << 8);
+ JERRYResetPIT2();
+ break;
+ case 7:
+ JERRYPIT2Divider = (JERRYPIT2Divider & 0xFF00) | byte;
+ JERRYResetPIT2();
+ }
+#else
+WriteLog("JERRY: Unhandled timer write (BYTE) at %08X...\n", address);
+#endif
+ return;
+ }
+/* else if ((offset >= 0xF10010) && (offset <= 0xF10015))
+ {
+ clock_byte_write(offset, byte);
+ return;
+ }//*/
+ // JERRY -> 68K interrupt enables/latches (need to be handled!)
+ else if (address >= 0xF10020 && address <= 0xF10023)
+ {
+WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%02X to $%08X!\n", byte, address);
+ }
+/* else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
+ {
+ anajoy_byte_write(offset, byte);
+ return;
+ }*/
+ else if ((address >= 0xF14000) && (address <= 0xF14003))
+ {
+ JoystickWriteByte(address, byte);
+ EepromWriteByte(address, byte);
+ return;
+ }
+ else if ((address >= 0xF14004) && (address <= 0xF1A0FF))
+ {
+ EepromWriteByte(address, byte);
+ return;
+ }
+//Need to protect write attempts to Wavetable ROM (F1D000-FFF)
+ else if (address >= 0xF1D000 && address <= 0xF1DFFF)
+ return;
+
+ jerryRAM[address & 0xFFFF] = byte;
+ }
+ // hole ($F20000 - $FFFFFF) 1M - 128K
+ else
+ ; // Do nothing
+}
+
+void WriteWord(uint32 adddress, uint16 word)
+{
+}
+
+void WriteDWord(uint32 adddress, uint32 dword)
+{
+}
+
+uint8 ReadByte(uint32 adddress)
+{
+}
+
+uint16 ReadWord(uint32 adddress)
+{
+}
+
+uint32 ReadDWord(uint32 adddress)
+{
+}
+#endif
+
+//
+// Musashi 68000 read/write/IRQ functions
+//
+
+int irq_ack_handler(int level)
+{
+ int vector = M68K_INT_ACK_AUTOVECTOR;
+
+ // The GPU/DSP/etc are probably *not* issuing an NMI, but it seems to work OK...
+
+ if (level == 7)
+ {
+ m68k_set_irq(0); // Clear the IRQ...
+ vector = 64; // Set user interrupt #0
+ }
+
+ return vector;
+}
+
+//#define USE_NEW_MMU
+
+unsigned int m68k_read_memory_8(unsigned int address)
+{
+#ifdef CPU_DEBUG_MEMORY
+ if ((address >= 0x000000) && (address <= 0x3FFFFF))
+ {
+ if (startMemLog)
+ readMem[address] = 1;
+ }
+#endif
+//WriteLog("[RM8] Addr: %08X\n", address);
+//; So, it seems that it stores the returned DWORD at $51136 and $FB074.
+/* if (address == 0x51136 || address == 0x51138 || address == 0xFB074 || address == 0xFB076
+ || address == 0x1AF05E)
+ WriteLog("[RM8 PC=%08X] Addr: %08X, val: %02X\n", m68k_get_reg(NULL, M68K_REG_PC), address, jaguar_mainRam[address]);//*/
+#ifndef USE_NEW_MMU
+ unsigned int retVal = 0;
+
+ if ((address >= 0x000000) && (address <= 0x3FFFFF))
+ retVal = jaguarMainRAM[address];
+// else if ((address >= 0x800000) && (address <= 0xDFFFFF))
+ else if ((address >= 0x800000) && (address <= 0xDFFEFF))
+ retVal = jaguarMainROM[address - 0x800000];
+ else if ((address >= 0xE00000) && (address <= 0xE3FFFF))
+ retVal = jaguarBootROM[address - 0xE00000];
+ else if ((address >= 0xDFFF00) && (address <= 0xDFFFFF))
+ retVal = CDROMReadByte(address);
+ else if ((address >= 0xF00000) && (address <= 0xF0FFFF))
+ retVal = TOMReadByte(address, M68K);
+ else if ((address >= 0xF10000) && (address <= 0xF1FFFF))
+ retVal = JERRYReadByte(address, M68K);
+ else
+ retVal = jaguar_unknown_readbyte(address, M68K);
+
+//if (address >= 0x2800 && address <= 0x281F)
+// WriteLog("M68K: Read byte $%02X at $%08X [PC=%08X]\n", retVal, address, m68k_get_reg(NULL, M68K_REG_PC));
+//if (address >= 0x8B5E4 && address <= 0x8B5E4 + 16)
+// WriteLog("M68K: Read byte $%02X at $%08X [PC=%08X]\n", retVal, address, m68k_get_reg(NULL, M68K_REG_PC));
+ return retVal;
+#else
+ return MMURead8(address, M68K);
+#endif
+}
+
+void gpu_dump_disassembly(void);
+void gpu_dump_registers(void);
+
+unsigned int m68k_read_memory_16(unsigned int address)
+{
+#ifdef CPU_DEBUG_MEMORY
+/* if ((address >= 0x000000) && (address <= 0x3FFFFE))
+ {
+ if (startMemLog)
+ readMem[address] = 1, readMem[address + 1] = 1;
+ }//*/
+/* if (effect_start && (address >= 0x8064FC && address <= 0x806501))
+ {
+ return 0x4E71; // NOP
+ }
+ if (effect_start2 && (address >= 0x806502 && address <= 0x806507))
+ {
+ return 0x4E71; // NOP
+ }
+ if (effect_start3 && (address >= 0x806512 && address <= 0x806517))
+ {
+ return 0x4E71; // NOP
+ }
+ if (effect_start4 && (address >= 0x806524 && address <= 0x806527))
+ {
+ return 0x4E71; // NOP
+ }
+ if (effect_start5 && (address >= 0x80653E && address <= 0x806543)) //Collision detection!
+ {
+ return 0x4E71; // NOP
+ }
+ if (effect_start6 && (address >= 0x806544 && address <= 0x806547))
+ {
+ return 0x4E71; // NOP
+ }//*/
+#endif
+//WriteLog("[RM16] Addr: %08X\n", address);
+/*if (m68k_get_reg(NULL, M68K_REG_PC) == 0x00005FBA)
+// for(int i=0; i<10000; i++)
+ WriteLog("[M68K] In routine #6!\n");//*/
+//if (m68k_get_reg(NULL, M68K_REG_PC) == 0x00006696) // GPU Program #4
+//if (m68k_get_reg(NULL, M68K_REG_PC) == 0x00005B3C) // GPU Program #2
+/*if (m68k_get_reg(NULL, M68K_REG_PC) == 0x00005BA8) // GPU Program #3
+{
+ WriteLog("[M68K] About to run GPU! (Addr:%08X, data:%04X)\n", address, TOMReadWord(address));
+ gpu_dump_registers();
+ gpu_dump_disassembly();
+// for(int i=0; i<10000; i++)
+// WriteLog("[M68K] About to run GPU!\n");
+}//*/
+//WriteLog("[WM8 PC=%08X] Addr: %08X, val: %02X\n", m68k_get_reg(NULL, M68K_REG_PC), address, value);
+/*if (m68k_get_reg(NULL, M68K_REG_PC) >= 0x00006696 && m68k_get_reg(NULL, M68K_REG_PC) <= 0x000066A8)
+{
+ if (address == 0x000066A0)
+ {
+ gpu_dump_registers();
+ gpu_dump_disassembly();
+ }
+ for(int i=0; i<10000; i++)
+ WriteLog("[M68K] About to run GPU! (Addr:%08X, data:%04X)\n", address, TOMReadWord(address));
+}//*/
+//; So, it seems that it stores the returned DWORD at $51136 and $FB074.
+/* if (address == 0x51136 || address == 0x51138 || address == 0xFB074 || address == 0xFB076
+ || address == 0x1AF05E)
+ WriteLog("[RM16 PC=%08X] Addr: %08X, val: %04X\n", m68k_get_reg(NULL, M68K_REG_PC), address, GET16(jaguar_mainRam, address));//*/
+#ifndef USE_NEW_MMU
+ unsigned int retVal = 0;
+
+ if ((address >= 0x000000) && (address <= 0x3FFFFE))
+// retVal = (jaguar_mainRam[address] << 8) | jaguar_mainRam[address+1];
+ retVal = GET16(jaguarMainRAM, address);
+// else if ((address >= 0x800000) && (address <= 0xDFFFFE))
+ else if ((address >= 0x800000) && (address <= 0xDFFEFE))
+ retVal = (jaguarMainROM[address - 0x800000] << 8) | jaguarMainROM[address - 0x800000 + 1];
+ else if ((address >= 0xE00000) && (address <= 0xE3FFFE))
+ retVal = (jaguarBootROM[address - 0xE00000] << 8) | jaguarBootROM[address - 0xE00000 + 1];
+ else if ((address >= 0xDFFF00) && (address <= 0xDFFFFE))
+ retVal = CDROMReadWord(address, M68K);
+ else if ((address >= 0xF00000) && (address <= 0xF0FFFE))
+ retVal = TOMReadWord(address, M68K);
+ else if ((address >= 0xF10000) && (address <= 0xF1FFFE))
+ retVal = JERRYReadWord(address, M68K);
+ else
+ retVal = jaguar_unknown_readword(address, M68K);
+
+//if (address >= 0xF1B000 && address <= 0xF1CFFF)
+// WriteLog("M68K: Read word $%04X at $%08X [PC=%08X]\n", retVal, address, m68k_get_reg(NULL, M68K_REG_PC));
+//if (address >= 0x2800 && address <= 0x281F)
+// WriteLog("M68K: Read word $%04X at $%08X [PC=%08X]\n", retVal, address, m68k_get_reg(NULL, M68K_REG_PC));
+//$8B3AE -> Transferred from $F1C010
+//$8B5E4 -> Only +1 read at $808AA
+//if (address >= 0x8B5E4 && address <= 0x8B5E4 + 16)
+// WriteLog("M68K: Read word $%04X at $%08X [PC=%08X]\n", retVal, address, m68k_get_reg(NULL, M68K_REG_PC));
+ return retVal;
+#else
+ return MMURead16(address, M68K);
+#endif
+}
+
+unsigned int m68k_read_memory_32(unsigned int address)
+{
+//; So, it seems that it stores the returned DWORD at $51136 and $FB074.
+/* if (address == 0x51136 || address == 0xFB074 || address == 0x1AF05E)
+ WriteLog("[RM32 PC=%08X] Addr: %08X, val: %08X\n", m68k_get_reg(NULL, M68K_REG_PC), address, (m68k_read_memory_16(address) << 16) | m68k_read_memory_16(address + 2));//*/
+
+//WriteLog("--> [RM32]\n");
+#ifndef USE_NEW_MMU
+ return (m68k_read_memory_16(address) << 16) | m68k_read_memory_16(address + 2);
+#else
+ return MMURead32(address, M68K);
+#endif
+}
+
+void m68k_write_memory_8(unsigned int address, unsigned int value)
+{
+#ifdef CPU_DEBUG_MEMORY
+ if ((address >= 0x000000) && (address <= 0x3FFFFF))
+ {
+ if (startMemLog)
+ {
+ if (value > writeMemMax[address])
+ writeMemMax[address] = value;
+ if (value < writeMemMin[address])
+ writeMemMin[address] = value;
+ }
+ }
+#endif
+//if ((address >= 0x1FF020 && address <= 0x1FF03F) || (address >= 0x1FF820 && address <= 0x1FF83F))
+// WriteLog("M68K: Writing %02X at %08X\n", value, address);
+//WriteLog("[WM8 PC=%08X] Addr: %08X, val: %02X\n", m68k_get_reg(NULL, M68K_REG_PC), address, value);
+/*if (effect_start)
+ if (address >= 0x18FA70 && address < (0x18FA70 + 8000))
+ WriteLog("M68K: Byte %02X written at %08X by 68K\n", value, address);//*/
+
+#ifndef USE_NEW_MMU
+ if ((address >= 0x000000) && (address <= 0x3FFFFF))
+ jaguarMainRAM[address] = value;
+ else if ((address >= 0xDFFF00) && (address <= 0xDFFFFF))
+ CDROMWriteByte(address, value, M68K);
+ else if ((address >= 0xF00000) && (address <= 0xF0FFFF))
+ TOMWriteByte(address, value, M68K);
+ else if ((address >= 0xF10000) && (address <= 0xF1FFFF))
+ JERRYWriteByte(address, value, M68K);
+ else
+ jaguar_unknown_writebyte(address, value, M68K);
+#else
+ MMUWrite8(address, value, M68K);
+#endif
+}
+
+void m68k_write_memory_16(unsigned int address, unsigned int value)
+{
+#ifdef CPU_DEBUG_MEMORY
+ if ((address >= 0x000000) && (address <= 0x3FFFFE))
+ {
+ if (startMemLog)
+ {
+ uint8 hi = value >> 8, lo = value & 0xFF;
+
+ if (hi > writeMemMax[address])
+ writeMemMax[address] = hi;
+ if (hi < writeMemMin[address])
+ writeMemMin[address] = hi;
+
+ if (lo > writeMemMax[address+1])
+ writeMemMax[address+1] = lo;
+ if (lo < writeMemMin[address+1])
+ writeMemMin[address+1] = lo;
+ }
+ }
+#endif
+//if ((address >= 0x1FF020 && address <= 0x1FF03F) || (address >= 0x1FF820 && address <= 0x1FF83F))
+// WriteLog("M68K: Writing %04X at %08X\n", value, address);
+//WriteLog("[WM16 PC=%08X] Addr: %08X, val: %04X\n", m68k_get_reg(NULL, M68K_REG_PC), address, value);
+//if (address >= 0xF02200 && address <= 0xF0229F)
+// WriteLog("M68K: Writing to blitter --> %04X at %08X\n", value, address);
+//if (address >= 0x0E75D0 && address <= 0x0E75E7)
+// WriteLog("M68K: Writing %04X at %08X, M68K PC=%08X\n", value, address, m68k_get_reg(NULL, M68K_REG_PC));
+/*extern uint32 totalFrames;
+if (address == 0xF02114)
+ WriteLog("M68K: Writing to GPU_CTRL (frame:%u)... [M68K PC:%08X]\n", totalFrames, m68k_get_reg(NULL, M68K_REG_PC));
+if (address == 0xF02110)
+ WriteLog("M68K: Writing to GPU_PC (frame:%u)... [M68K PC:%08X]\n", totalFrames, m68k_get_reg(NULL, M68K_REG_PC));//*/
+//if (address >= 0xF03B00 && address <= 0xF03DFF)
+// WriteLog("M68K: Writing %04X to %08X...\n", value, address);
+
+/*if (address == 0x0100)//64*4)
+ WriteLog("M68K: Wrote word to VI vector value %04X...\n", value);//*/
+/*if (effect_start)
+ if (address >= 0x18FA70 && address < (0x18FA70 + 8000))
+ WriteLog("M68K: Word %04X written at %08X by 68K\n", value, address);//*/
+/* if (address == 0x51136 || address == 0x51138 || address == 0xFB074 || address == 0xFB076
+ || address == 0x1AF05E)
+ WriteLog("[WM16 PC=%08X] Addr: %08X, val: %04X\n", m68k_get_reg(NULL, M68K_REG_PC), address, value);//*/
+
+#ifndef USE_NEW_MMU
+ if ((address >= 0x000000) && (address <= 0x3FFFFE))
+ {
+/* jaguar_mainRam[address] = value >> 8;
+ jaguar_mainRam[address + 1] = value & 0xFF;*/
+ SET16(jaguarMainRAM, address, value);
+ }
+ else if ((address >= 0xDFFF00) && (address <= 0xDFFFFE))
+ CDROMWriteWord(address, value, M68K);
+ else if ((address >= 0xF00000) && (address <= 0xF0FFFE))
+ TOMWriteWord(address, value, M68K);
+ else if ((address >= 0xF10000) && (address <= 0xF1FFFE))
+ JERRYWriteWord(address, value, M68K);
+ else
+ {
+ jaguar_unknown_writeword(address, value, M68K);
+#ifdef LOG_UNMAPPED_MEMORY_ACCESSES
+ WriteLog("\tA0=%08X, A1=%08X, D0=%08X, D1=%08X\n",
+ m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1),
+ m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1));
+#endif
+ }
+#else
+ MMUWrite16(address, value, M68K);
+#endif
+}
+
+void m68k_write_memory_32(unsigned int address, unsigned int value)
+{
+//WriteLog("--> [WM32]\n");
+/*if (address == 0x0100)//64*4)
+ WriteLog("M68K: Wrote dword to VI vector value %08X...\n", value);//*/
+/*if (address >= 0xF03214 && address < 0xF0321F)
+ WriteLog("M68K: Writing DWORD (%08X) to GPU RAM (%08X)...\n", value, address);//*/
+//M68K: Writing DWORD (88E30047) to GPU RAM (00F03214)...
+/*extern bool doGPUDis;
+if (address == 0xF03214 && value == 0x88E30047)
+// start = true;
+ doGPUDis = true;//*/
+/* if (address == 0x51136 || address == 0xFB074)
+ WriteLog("[WM32 PC=%08X] Addr: %08X, val: %02X\n", m68k_get_reg(NULL, M68K_REG_PC), address, value);//*/
+
+#ifndef USE_NEW_MMU
+ m68k_write_memory_16(address, value >> 16);
+ m68k_write_memory_16(address + 2, value & 0xFFFF);
+#else
+ MMUWrite32(address, value, M68K);
+#endif
+}
+
+
+uint32 JaguarGetHandler(uint32 i)
+{
+ return JaguarReadLong(i * 4);
+}
+
+bool JaguarInterruptHandlerIsValid(uint32 i) // Debug use only...
+{
+ uint32 handler = JaguarGetHandler(i);
+ return (handler && (handler != 0xFFFFFFFF) ? true : false);
+}
+
+void M68K_show_context(void)
+{
+ WriteLog("\t68K PC=%06X\n", m68k_get_reg(NULL, M68K_REG_PC));
+ for(int i=M68K_REG_D0; i<=M68K_REG_D7; i++)
+ WriteLog("\tD%i = %08X\n", i-M68K_REG_D0, m68k_get_reg(NULL, (m68k_register_t)i));
+ WriteLog("\n");
+ for(int i=M68K_REG_A0; i<=M68K_REG_A7; i++)
+ WriteLog("\tA%i = %08X\n", i-M68K_REG_A0, m68k_get_reg(NULL, (m68k_register_t)i));
+
+ WriteLog("68K disasm\n");
+// jaguar_dasm(s68000readPC()-0x1000,0x20000);
+ JaguarDasm(m68k_get_reg(NULL, M68K_REG_PC) - 0x80, 0x200);
+// jaguar_dasm(0x5000, 0x14414);
+
+// WriteLog("\n.......[Cart start]...........\n\n");
+// jaguar_dasm(0x192000, 0x1000);//0x200);
+
+ WriteLog("..................\n");
+
+ if (TOMIRQEnabled(IRQ_VBLANK))
+ {
+ WriteLog("vblank int: enabled\n");
+ JaguarDasm(JaguarGetHandler(64), 0x200);
+ }
+ else
+ WriteLog("vblank int: disabled\n");
+
+ WriteLog("..................\n");
+
+ for(int i=0; i<256; i++)
+ WriteLog("handler %03i at $%08X\n", i, (unsigned int)JaguarGetHandler(i));
+}
+
+//
+// Unknown read/write byte/word routines
+//
+
+// It's hard to believe that developers would be sloppy with their memory writes, yet in
+// some cases the developers screwed up royal. E.g., Club Drive has the following code:
+//
+// 807EC4: movea.l #$f1b000, A1
+// 807ECA: movea.l #$8129e0, A0
+// 807ED0: move.l A0, D0
+// 807ED2: move.l #$f1bb94, D1
+// 807ED8: sub.l D0, D1
+// 807EDA: lsr.l #2, D1
+// 807EDC: move.l (A0)+, (A1)+
+// 807EDE: dbra D1, 807edc
+//
+// The problem is at $807ED0--instead of putting A0 into D0, they really meant to put A1
+// in. This mistake causes it to try and overwrite approximately $700000 worth of address
+// space! (That is, unless the 68K causes a bus error...)
+
+void jaguar_unknown_writebyte(unsigned address, unsigned data, uint32 who/*=UNKNOWN*/)
+{
+#ifdef LOG_UNMAPPED_MEMORY_ACCESSES
+ WriteLog("Jaguar: Unknown byte %02X written at %08X by %s (M68K PC=%06X)\n", data, address, whoName[who], m68k_get_reg(NULL, M68K_REG_PC));
+#endif
+#ifdef ABORT_ON_UNMAPPED_MEMORY_ACCESS
+// extern bool finished;
+ finished = true;
+// extern bool doDSPDis;
+ if (who == DSP)
+ doDSPDis = true;
+#endif
+}
+
+void jaguar_unknown_writeword(unsigned address, unsigned data, uint32 who/*=UNKNOWN*/)
+{
+#ifdef LOG_UNMAPPED_MEMORY_ACCESSES
+ WriteLog("Jaguar: Unknown word %04X written at %08X by %s (M68K PC=%06X)\n", data, address, whoName[who], m68k_get_reg(NULL, M68K_REG_PC));
+#endif
+#ifdef ABORT_ON_UNMAPPED_MEMORY_ACCESS
+// extern bool finished;
+ finished = true;
+// extern bool doDSPDis;
+ if (who == DSP)
+ doDSPDis = true;
+#endif
+}
+
+unsigned jaguar_unknown_readbyte(unsigned address, uint32 who/*=UNKNOWN*/)
+{
+#ifdef LOG_UNMAPPED_MEMORY_ACCESSES
+ WriteLog("Jaguar: Unknown byte read at %08X by %s (M68K PC=%06X)\n", address, whoName[who], m68k_get_reg(NULL, M68K_REG_PC));
+#endif
+#ifdef ABORT_ON_UNMAPPED_MEMORY_ACCESS
+// extern bool finished;
+ finished = true;
+// extern bool doDSPDis;
+ if (who == DSP)
+ doDSPDis = true;
+#endif
+ return 0xFF;
+}
+
+unsigned jaguar_unknown_readword(unsigned address, uint32 who/*=UNKNOWN*/)
+{
+#ifdef LOG_UNMAPPED_MEMORY_ACCESSES
+ WriteLog("Jaguar: Unknown word read at %08X by %s (M68K PC=%06X)\n", address, whoName[who], m68k_get_reg(NULL, M68K_REG_PC));
+#endif
+#ifdef ABORT_ON_UNMAPPED_MEMORY_ACCESS
+// extern bool finished;
+ finished = true;
+// extern bool doDSPDis;
+ if (who == DSP)
+ doDSPDis = true;
+#endif
+ return 0xFFFF;
+}
+
+//
+// Disassemble M68K instructions at the given offset
+//
+
+unsigned int m68k_read_disassembler_8(unsigned int address)
+{
+ return m68k_read_memory_8(address);
+}
+
+unsigned int m68k_read_disassembler_16(unsigned int address)
+{
+ return m68k_read_memory_16(address);
+}
+
+unsigned int m68k_read_disassembler_32(unsigned int address)
+{
+ return m68k_read_memory_32(address);
+}
+
+void JaguarDasm(uint32 offset, uint32 qt)
+{
+#ifdef CPU_DEBUG
+ static char buffer[2048];//, mem[64];
+ int pc = offset, oldpc;
+
+ for(uint32 i=0; i<qt; i++)
+ {
+/* oldpc = pc;
+ for(int j=0; j<64; j++)
+ mem[j^0x01] = jaguar_byte_read(pc + j);
+
+ pc += Dasm68000((char *)mem, buffer, 0);
+ WriteLog("%08X: %s\n", oldpc, buffer);//*/
+ oldpc = pc;
+ pc += m68k_disassemble(buffer, pc, M68K_CPU_TYPE_68000);
+ WriteLog("%08X: %s\n", oldpc, buffer);//*/
+ }
+#endif
+}
+
+uint8 JaguarReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ uint8 data = 0x00;
+
+ offset &= 0xFFFFFF;
+ if (offset < 0x400000)
+ data = jaguarMainRAM[offset & 0x3FFFFF];
+ else if ((offset >= 0x800000) && (offset < 0xC00000))
+ data = jaguarMainROM[offset - 0x800000];
+ else if ((offset >= 0xDFFF00) && (offset <= 0xDFFFFF))
+ data = CDROMReadByte(offset, who);
+ else if ((offset >= 0xE00000) && (offset < 0xE40000))
+ data = jaguarBootROM[offset & 0x3FFFF];
+ else if ((offset >= 0xF00000) && (offset < 0xF10000))
+ data = TOMReadByte(offset, who);
+ else if ((offset >= 0xF10000) && (offset < 0xF20000))
+ data = JERRYReadByte(offset, who);
+ else
+ data = jaguar_unknown_readbyte(offset, who);
+
+ return data;
+}
+
+uint16 JaguarReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ offset &= 0xFFFFFF;
+ if (offset <= 0x3FFFFE)
+ {
+ return (jaguarMainRAM[(offset+0) & 0x3FFFFF] << 8) | jaguarMainRAM[(offset+1) & 0x3FFFFF];
+ }
+ else if ((offset >= 0x800000) && (offset <= 0xBFFFFE))
+ {
+ offset -= 0x800000;
+ return (jaguarMainROM[offset+0] << 8) | jaguarMainROM[offset+1];
+ }
+// else if ((offset >= 0xDFFF00) && (offset < 0xDFFF00))
+ else if ((offset >= 0xDFFF00) && (offset <= 0xDFFFFE))
+ return CDROMReadWord(offset, who);
+ else if ((offset >= 0xE00000) && (offset <= 0xE3FFFE))
+ return (jaguarBootROM[(offset+0) & 0x3FFFF] << 8) | jaguarBootROM[(offset+1) & 0x3FFFF];
+ else if ((offset >= 0xF00000) && (offset <= 0xF0FFFE))
+ return TOMReadWord(offset, who);
+ else if ((offset >= 0xF10000) && (offset <= 0xF1FFFE))
+ return JERRYReadWord(offset, who);
+
+ return jaguar_unknown_readword(offset, who);
+}
+
+void JaguarWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
+{
+//Need to check for writes in the range of $18FA70 + 8000...
+/*if (effect_start)
+ if (offset >= 0x18FA70 && offset < (0x18FA70 + 8000))
+ WriteLog("JWB: Byte %02X written at %08X by %s\n", data, offset, whoName[who]);//*/
+
+ offset &= 0xFFFFFF;
+ if (offset < 0x400000)
+ {
+ jaguarMainRAM[offset & 0x3FFFFF] = data;
+ return;
+ }
+ else if ((offset >= 0xDFFF00) && (offset <= 0xDFFFFF))
+ {
+ CDROMWriteByte(offset, data, who);
+ return;
+ }
+ else if ((offset >= 0xF00000) && (offset <= 0xF0FFFF))
+ {
+ TOMWriteByte(offset, data, who);
+ return;
+ }
+ else if ((offset >= 0xF10000) && (offset <= 0xF1FFFF))
+ {
+ JERRYWriteByte(offset, data, who);
+ return;
+ }
+
+ jaguar_unknown_writebyte(offset, data, who);
+}
+
+uint32 starCount;
+void JaguarWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
+{
+/*if (offset == 0x0100)//64*4)
+ WriteLog("M68K: %s wrote word to VI vector value %04X...\n", whoName[who], data);
+if (offset == 0x0102)//64*4)
+ WriteLog("M68K: %s wrote word to VI vector+2 value %04X...\n", whoName[who], data);//*/
+//TEMP--Mirror of F03000? Yes, but only 32-bit CPUs can do it (i.e., NOT the 68K!)
+// PLUS, you would handle this in the GPU/DSP WriteLong code! Not here!
+//Need to check for writes in the range of $18FA70 + 8000...
+/*if (effect_start)
+ if (offset >= 0x18FA70 && offset < (0x18FA70 + 8000))
+ WriteLog("JWW: Word %04X written at %08X by %s\n", data, offset, whoName[who]);//*/
+/*if (offset >= 0x2C00 && offset <= 0x2CFF)
+ WriteLog("Jaguar: Word %04X written to TOC+%02X by %s\n", data, offset-0x2C00, whoName[who]);//*/
+
+ offset &= 0xFFFFFF;
+
+ if (offset <= 0x3FFFFE)
+ {
+/*
+GPU Table (CD BIOS)
+
+1A 69 F0 ($0000) -> Starfield
+1A 73 C8 ($0001) -> Final clearing blit & bitmap blit?
+1A 79 F0 ($0002)
+1A 88 C0 ($0003)
+1A 8F E8 ($0004) -> "Jaguar" small color logo?
+1A 95 20 ($0005)
+1A 9F 08 ($0006)
+1A A1 38 ($0007)
+1A AB 38 ($0008)
+1A B3 C8 ($0009)
+1A B9 C0 ($000A)
+*/
+
+//This MUST be done by the 68K!
+/*if (offset == 0x670C)
+ WriteLog("Jaguar: %s writing to location $670C...\n", whoName[who]);*/
+
+/*extern bool doGPUDis;
+//if ((offset == 0x100000 + 75522) && who == GPU) // 76,226 -> 75522
+if ((offset == 0x100000 + 128470) && who == GPU) // 107,167 -> 128470 (384 x 250 screen size 16BPP)
+//if ((offset >= 0x100000 && offset <= 0x12C087) && who == GPU)
+ doGPUDis = true;//*/
+/*if (offset == 0x100000 + 128470) // 107,167 -> 128470 (384 x 250 screen size 16BPP)
+ WriteLog("JWW: Writing value %04X at %08X by %s...\n", data, offset, whoName[who]);
+if ((data & 0xFF00) != 0x7700)
+ WriteLog("JWW: Writing value %04X at %08X by %s...\n", data, offset, whoName[who]);//*/
+/*if ((offset >= 0x100000 && offset <= 0x147FFF) && who == GPU)
+ return;//*/
+/*if ((data & 0xFF00) != 0x7700 && who == GPU)
+ WriteLog("JWW: Writing value %04X at %08X by %s...\n", data, offset, whoName[who]);//*/
+/*if ((offset >= 0x100000 + 0x48000 && offset <= 0x12C087 + 0x48000) && who == GPU)
+ return;//*/
+/*extern bool doGPUDis;
+if (offset == 0x120216 && who == GPU)
+ doGPUDis = true;//*/
+/*extern uint32 gpu_pc;
+if (who == GPU && (gpu_pc == 0xF03604 || gpu_pc == 0xF03638))
+{
+ uint32 base = offset - (offset > 0x148000 ? 0x148000 : 0x100000);
+ uint32 y = base / 0x300;
+ uint32 x = (base - (y * 0x300)) / 2;
+ WriteLog("JWW: Writing starfield star %04X at %08X (%u/%u) [%s]\n", data, offset, x, y, (gpu_pc == 0xF03604 ? "s" : "L"));
+}//*/
+/*
+JWW: Writing starfield star 775E at 0011F650 (555984/1447)
+*/
+//if (offset == (0x001E17F8 + 0x34))
+/*if (who == GPU && offset == (0x001E17F8 + 0x34))
+ data = 0xFE3C;//*/
+// WriteLog("JWW: Write at %08X written to by %s.\n", 0x001E17F8 + 0x34, whoName[who]);//*/
+/*extern uint32 gpu_pc;
+if (who == GPU && (gpu_pc == 0xF03604 || gpu_pc == 0xF03638))
+{
+ extern int objectPtr;
+// if (offset > 0x148000)
+// return;
+ starCount++;
+ if (starCount > objectPtr)
+ return;
+
+// if (starCount == 1)
+// WriteLog("--> Drawing 1st star...\n");
+//
+// uint32 base = offset - (offset > 0x148000 ? 0x148000 : 0x100000);
+// uint32 y = base / 0x300;
+// uint32 x = (base - (y * 0x300)) / 2;
+// WriteLog("JWW: Writing starfield star %04X at %08X (%u/%u) [%s]\n", data, offset, x, y, (gpu_pc == 0xF03604 ? "s" : "L"));
+
+//A star of interest...
+//-->JWW: Writing starfield star 77C9 at 0011D31A (269/155) [s]
+//1st trail +3(x), -1(y) -> 272, 154 -> 0011D020
+//JWW: Blitter writing echo 77B3 at 0011D022...
+}//*/
+//extern bool doGPUDis;
+/*if (offset == 0x11D022 + 0x48000 || offset == 0x11D022)// && who == GPU)
+{
+// doGPUDis = true;
+ WriteLog("JWW: %s writing echo %04X at %08X...\n", whoName[who], data, offset);
+// LogBlit();
+}
+if (offset == 0x11D31A + 0x48000 || offset == 0x11D31A)
+ WriteLog("JWW: %s writing star %04X at %08X...\n", whoName[who], data, offset);//*/
+
+ jaguarMainRAM[(offset+0) & 0x3FFFFF] = data >> 8;
+ jaguarMainRAM[(offset+1) & 0x3FFFFF] = data & 0xFF;
+ return;
+ }
+ else if (offset >= 0xDFFF00 && offset <= 0xDFFFFE)
+ {
+ CDROMWriteWord(offset, data, who);
+ return;
+ }
+ else if (offset >= 0xF00000 && offset <= 0xF0FFFE)
+ {
+ TOMWriteWord(offset, data, who);
+ return;
+ }
+ else if (offset >= 0xF10000 && offset <= 0xF1FFFE)
+ {
+ JERRYWriteWord(offset, data, who);
+ return;
+ }
+ // Don't bomb on attempts to write to ROM
+ else if (offset >= 0x800000 && offset <= 0xEFFFFF)
+ return;
+
+ jaguar_unknown_writeword(offset, data, who);
+}
+
+// We really should re-do this so that it does *real* 32-bit access... !!! FIX !!!
+uint32 JaguarReadLong(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ return (JaguarReadWord(offset, who) << 16) | JaguarReadWord(offset+2, who);
+}
+
+// We really should re-do this so that it does *real* 32-bit access... !!! FIX !!!
+void JaguarWriteLong(uint32 offset, uint32 data, uint32 who/*=UNKNOWN*/)
+{
+/* extern bool doDSPDis;
+ if (offset < 0x400 && !doDSPDis)
+ {
+ WriteLog("JLW: Write to %08X by %s... Starting DSP log!\n\n", offset, whoName[who]);
+ doDSPDis = true;
+ }//*/
+/*if (offset == 0x0100)//64*4)
+ WriteLog("M68K: %s wrote dword to VI vector value %08X...\n", whoName[who], data);//*/
+
+ JaguarWriteWord(offset, data >> 16, who);
+ JaguarWriteWord(offset+2, data & 0xFFFF, who);
+}
+
+//
+// Jaguar console initialization
+//
+void JaguarInit(void)
+{
+#ifdef CPU_DEBUG_MEMORY
+ memset(readMem, 0x00, 0x400000);
+ memset(writeMemMin, 0xFF, 0x400000);
+ memset(writeMemMax, 0x00, 0x400000);
+#endif
+ memset(jaguarMainRAM, 0x00, 0x400000);
+// memset(jaguar_mainRom, 0xFF, 0x200000); // & set it to all Fs...
+// memset(jaguar_mainRom, 0x00, 0x200000); // & set it to all 0s...
+//NOTE: This *doesn't* fix FlipOut...
+//Or does it? Hmm...
+//Seems to want $01010101... Dunno why. Investigate!
+ memset(jaguarMainROM, 0x01, 0x600000); // & set it to all 01s...
+// memset(jaguar_mainRom, 0xFF, 0x600000); // & set it to all Fs...
+
+ m68k_set_cpu_type(M68K_CPU_TYPE_68000);
+ GPUInit();
+ DSPInit();
+ TOMInit();
+ JERRYInit();
+ CDROMInit();
+}
+
+//New timer based code stuffola...
+void ScanlineCallback(void);
+void RenderCallback(void);
+//extern uint32 * backbuffer;
+void JaguarReset(void)
+{
+//NOTE: This causes a (virtual) crash if this is set in the config but not found... !!! FIX !!!
+ if (vjs.useJaguarBIOS)
+ memcpy(jaguarMainRAM, jaguarBootROM, 8);
+ else
+ SET32(jaguarMainRAM, 4, jaguarRunAddress);
+
+// WriteLog("jaguar_reset():\n");
+ TOMReset();
+ JERRYReset();
+ GPUReset();
+ DSPReset();
+ CDROMReset();
+ m68k_pulse_reset(); // Reset the 68000
+ WriteLog("Jaguar: 68K reset. PC=%06X SP=%08X\n", m68k_get_reg(NULL, M68K_REG_PC), m68k_get_reg(NULL, M68K_REG_A7));
+
+ // New timer base code stuffola...
+ InitializeEventList();
+ TOMResetBackbuffer(backbuffer);
+// SetCallbackTime(ScanlineCallback, 63.5555);
+ SetCallbackTime(ScanlineCallback, 31.77775);
+// SetCallbackTime(RenderCallback, 33303.082); // # Scanlines * scanline time
+// SetCallbackTime(RenderCallback, 16651.541); // # Scanlines * scanline time
+}
+
+void JaguarDone(void)
+{
+#ifdef CPU_DEBUG_MEMORY
+/* WriteLog("\nJaguar: Memory Usage Stats (return addresses)\n\n");
+
+ for(uint32 i=0; i<=raPtr; i++)
+ {
+ WriteLog("\t%08X\n", returnAddr[i]);
+ WriteLog("M68000 disassembly at $%08X...\n", returnAddr[i] - 16);
+ jaguar_dasm(returnAddr[i] - 16, 16);
+ WriteLog("\n");
+ }
+ WriteLog("\n");//*/
+
+/* int start = 0, end = 0;
+ bool endTriggered = false, startTriggered = false;
+ for(int i=0; i<0x400000; i++)
+ {
+ if (readMem[i] && writeMemMin[i] != 0xFF && writeMemMax != 0x00)
+ {
+ if (!startTriggered)
+ startTriggered = true, endTriggered = false, start = i;
+
+ WriteLog("\t\tMin/Max @ %06X: %u/%u\n", i, writeMemMin[i], writeMemMax[i]);
+ }
+ else
+ {
+ if (!endTriggered)
+ {
+ end = i - 1, endTriggered = true, startTriggered = false;
+ WriteLog("\tMemory range accessed: %06X - %06X\n", start, end);
+ }
+ }
+ }
+ WriteLog("\n");//*/
+#endif
+//#ifdef CPU_DEBUG
+// for(int i=M68K_REG_A0; i<=M68K_REG_A7; i++)
+// WriteLog("\tA%i = 0x%.8x\n", i-M68K_REG_A0, m68k_get_reg(NULL, (m68k_register_t)i));
+ int32 topOfStack = m68k_get_reg(NULL, M68K_REG_A7);
+ WriteLog("M68K: Top of stack: %08X. Stack trace:\n", JaguarReadLong(topOfStack));
+ for(int i=-2; i<9; i++)
+ WriteLog("%06X: %08X\n", topOfStack + (i * 4), JaguarReadLong(topOfStack + (i * 4)));
+
+/* WriteLog("\nM68000 disassembly at $802288...\n");
+ jaguar_dasm(0x802288, 3);
+ WriteLog("\nM68000 disassembly at $802200...\n");
+ jaguar_dasm(0x802200, 500);
+ WriteLog("\nM68000 disassembly at $802518...\n");
+ jaguar_dasm(0x802518, 100);//*/
+
+/* WriteLog("\n\nM68000 disassembly at $803F00 (look @ $803F2A)...\n");
+ jaguar_dasm(0x803F00, 500);
+ WriteLog("\n");//*/
+
+/* WriteLog("\n\nM68000 disassembly at $802B00 (look @ $802B5E)...\n");
+ jaguar_dasm(0x802B00, 500);
+ WriteLog("\n");//*/
+
+/* WriteLog("\n\nM68000 disassembly at $809900 (look @ $8099F8)...\n");
+ jaguar_dasm(0x809900, 500);
+ WriteLog("\n");//*/
+//8099F8
+/* WriteLog("\n\nDump of $8093C8:\n\n");
+ for(int i=0x8093C8; i<0x809900; i+=4)
+ WriteLog("%06X: %08X\n", i, JaguarReadLong(i));//*/
+/* WriteLog("\n\nM68000 disassembly at $90006C...\n");
+ jaguar_dasm(0x90006C, 500);
+ WriteLog("\n");//*/
+/* WriteLog("\n\nM68000 disassembly at $1AC000...\n");
+ jaguar_dasm(0x1AC000, 6000);
+ WriteLog("\n");//*/
+
+// WriteLog("Jaguar: CD BIOS version %04X\n", JaguarReadWord(0x3004));
+ WriteLog("Jaguar: Interrupt enable = %02X\n", TOMReadByte(0xF000E1) & 0x1F);
+ WriteLog("Jaguar: VBL interrupt is %s\n", ((TOMIRQEnabled(IRQ_VBLANK)) && (JaguarInterruptHandlerIsValid(64))) ? "enabled" : "disabled");
+ M68K_show_context();
+//#endif
+
+ CDROMDone();
+ GPUDone();
+ DSPDone();
+ TOMDone();
+ JERRYDone();
+}
+
+//
+// Main Jaguar execution loop (1 frame)
+//
+void JaguarExecute(uint32 * backbuffer, bool render)
+{
+ uint16 vp = TOMReadWord(0xF0003E) + 1;
+ uint16 vi = TOMReadWord(0xF0004E);
+//Using WO registers is OK, since we're the ones controlling access--there's nothing wrong here! ;-)
+//Though we shouldn't be able to do it using TOMReadWord... !!! FIX !!!
+
+// uint16 vdb = TOMReadWord(0xF00046);
+//Note: This is the *definite* end of the display, though VDE *might* be less than this...
+// uint16 vbb = TOMReadWord(0xF00040);
+//It seems that they mean it when they say that VDE is the end of object processing.
+//However, we need to be able to tell the OP (or TOM) that we've reached the end of the
+//buffer and not to write any more pixels... !!! FIX !!!
+// uint16 vde = TOMReadWord(0xF00048);
+
+ uint16 refreshRate = (vjs.hardwareTypeNTSC ? 60 : 50);
+ uint32 m68kClockRate = (vjs.hardwareTypeNTSC ? M68K_CLOCK_RATE_NTSC : M68K_CLOCK_RATE_PAL);
+//Not sure the above is correct, since the number of lines and timings given in the JTRM
+//seem to indicate the refresh rate is *half* the above...
+// uint16 refreshRate = (vjs.hardwareTypeNTSC ? 30 : 25);
+ // Should these be hardwired or read from VP? Yes, from VP!
+ uint32 M68KCyclesPerScanline = m68kClockRate / (vp * refreshRate);
+ uint32 RISCCyclesPerScanline = m68kClockRate / (vp * refreshRate);
+
+ TOMResetBackbuffer(backbuffer);
+/*extern int effect_start;
+if (effect_start)
+ WriteLog("JagExe: VP=%u, VI=%u, CPU CPS=%u, GPU CPS=%u\n", vp, vi, M68KCyclesPerScanline, RISCCyclesPerScanline);//*/
+
+//extern int start_logging;
+ for(uint16 i=0; i<vp; i++)
+ {
+ // Increment the horizontal count (why? RNG? Besides which, this is *NOT* cycle accurate!)
+ TOMWriteWord(0xF00004, (TOMReadWord(0xF00004) + 1) & 0x7FF);
+
+ TOMWriteWord(0xF00006, i); // Write the VC
+
+// if (i == vi) // Time for Vertical Interrupt?
+//Not sure if this is correct...
+//Seems to be, kinda. According to the JTRM, this should only fire on odd lines in non-interlace mode...
+//Which means that it normally wouldn't go when it's zero.
+ if (i == vi && i > 0 && TOMIRQEnabled(IRQ_VBLANK)) // Time for Vertical Interrupt?
+ {
+ // We don't have to worry about autovectors & whatnot because the Jaguar
+ // tells you through its HW registers who sent the interrupt...
+ TOMSetPendingVideoInt();
+ m68k_set_irq(7);
+ }
+
+//if (start_logging)
+// WriteLog("About to execute M68K (%u)...\n", i);
+ m68k_execute(M68KCyclesPerScanline);
+//if (start_logging)
+// WriteLog("About to execute TOM's PIT (%u)...\n", i);
+ TOMExecPIT(RISCCyclesPerScanline);
+//if (start_logging)
+// WriteLog("About to execute JERRY's PIT (%u)...\n", i);
+ JERRYExecPIT(RISCCyclesPerScanline);
+//if (start_logging)
+// WriteLog("About to execute JERRY's SSI (%u)...\n", i);
+ JERRYI2SExec(RISCCyclesPerScanline);
+ BUTCHExec(RISCCyclesPerScanline);
+//if (start_logging)
+// WriteLog("About to execute GPU (%u)...\n", i);
+ GPUExec(RISCCyclesPerScanline);
+
+ if (vjs.DSPEnabled)
+ {
+ if (vjs.usePipelinedDSP)
+ DSPExecP2(RISCCyclesPerScanline); // Pipelined DSP execution (3 stage)....
+ else
+ DSPExec(RISCCyclesPerScanline); // Ordinary non-pipelined DSP
+// DSPExecComp(RISCCyclesPerScanline); // Comparison core
+ }
+
+//if (start_logging)
+// WriteLog("About to execute OP (%u)...\n", i);
+ TOMExecScanline(i, render);
+ }
+}
+
+// Temp debugging stuff
+
+void DumpMainMemory(void)
+{
+ FILE * fp = fopen("./memdump.bin", "wb");
+
+ if (fp == NULL)
+ return;
+
+ fwrite(jaguarMainRAM, 1, 0x400000, fp);
+ fclose(fp);
+}
+
+uint8 * GetRamPtr(void)
+{
+ return jaguarMainRAM;
+}
+
+//
+// New Jaguar execution stack
+//
+
+#if 0
+
+void JaguarExecuteNew(void)
+{
+ extern bool finished, showGUI;
+ extern bool debounceRunKey;
+ // Pass a message to the "joystick" code to debounce the ESC key...
+ debounceRunKey = true;
+ finished = false;
+/* InitializeEventList();
+ TOMResetBackbuffer(backbuffer);
+// SetCallbackTime(ScanlineCallback, 63.5555);
+ SetCallbackTime(ScanlineCallback, 31.77775);
+// SetCallbackTime(RenderCallback, 33303.082); // # Scanlines * scanline time
+// SetCallbackTime(RenderCallback, 16651.541); // # Scanlines * scanline time//*/
+// uint8 * keystate = SDL_GetKeyState(NULL);
+
+ do
+ {
+ double timeToNextEvent = GetTimeToNextEvent();
+//WriteLog("JEN: Time to next event (%u) is %f usec (%u RISC cycles)...\n", nextEvent, timeToNextEvent, USEC_TO_RISC_CYCLES(timeToNextEvent));
+
+ m68k_execute(USEC_TO_M68K_CYCLES(timeToNextEvent));
+ gpu_exec(USEC_TO_RISC_CYCLES(timeToNextEvent));
+
+ if (vjs.DSPEnabled)
+ {
+ if (vjs.usePipelinedDSP)
+ DSPExecP2(USEC_TO_RISC_CYCLES(timeToNextEvent)); // Pipelined DSP execution (3 stage)...
+ else
+ DSPExec(USEC_TO_RISC_CYCLES(timeToNextEvent)); // Ordinary non-pipelined DSP
+ }
+
+ HandleNextEvent();
+
+// if (keystate[SDLK_ESCAPE])
+// break;
+
+// SDL_PumpEvents(); // Needed to keep the keystate current...
+ }
+ while (!finished);
+}
+
+void ScanlineCallback(void)
+{
+ uint16 vc = TOMReadWord(0xF00006);
+ uint16 vp = TOMReadWord(0xF0003E) + 1;
+ uint16 vi = TOMReadWord(0xF0004E);
+// uint16 vbb = TOMReadWord(0xF00040);
+ vc++;
+
+ if (vc >= vp)
+ vc = 0;
+
+//WriteLog("SLC: Currently on line %u (VP=%u)...\n", vc, vp);
+ TOMWriteWord(0xF00006, vc);
+
+//This is a crappy kludge, but maybe it'll work for now...
+//Maybe it's not so bad, since the IRQ happens on a scanline boundary...
+ if (vc == vi && vc > 0 && tom_irq_enabled(IRQ_VBLANK)) // Time for Vertical Interrupt?
+ {
+ // We don't have to worry about autovectors & whatnot because the Jaguar
+ // tells you through its HW registers who sent the interrupt...
+ tom_set_pending_video_int();
+ m68k_set_irq(7);
+ }
+
+ TOMExecScanline(vc, true);
+
+//Change this to VBB???
+//Doesn't seem to matter (at least for Flip Out & I-War)
+ if (vc == 0)
+// if (vc == vbb)
+ {
+joystick_exec();
+
+ RenderBackbuffer();
+ TOMResetBackbuffer(backbuffer);
+ }//*/
+
+// if (vc == 0)
+// TOMResetBackbuffer(backbuffer);
+
+// SetCallbackTime(ScanlineCallback, 63.5555);
+ SetCallbackTime(ScanlineCallback, 31.77775);
+}
+
+#else
+
+bool frameDone;
+void JaguarExecuteNew(void)
+{
+// extern bool finished, showGUI;
+// extern bool debounceRunKey;
+ // Pass a message to the "joystick" code to debounce the ESC key...
+// debounceRunKey = true;
+// finished = false;
+/* InitializeEventList();
+ TOMResetBackbuffer(backbuffer);
+// SetCallbackTime(ScanlineCallback, 63.5555);
+ SetCallbackTime(ScanlineCallback, 31.77775);
+// SetCallbackTime(RenderCallback, 33303.082); // # Scanlines * scanline time
+// SetCallbackTime(RenderCallback, 16651.541); // # Scanlines * scanline time//*/
+// uint8 * keystate = SDL_GetKeyState(NULL);
+ frameDone = false;
+
+ do
+ {
+ double timeToNextEvent = GetTimeToNextEvent();
+//WriteLog("JEN: Time to next event (%u) is %f usec (%u RISC cycles)...\n", nextEvent, timeToNextEvent, USEC_TO_RISC_CYCLES(timeToNextEvent));
+
+ m68k_execute(USEC_TO_M68K_CYCLES(timeToNextEvent));
+ GPUExec(USEC_TO_RISC_CYCLES(timeToNextEvent));
+
+ if (vjs.DSPEnabled)
+ {
+ if (vjs.usePipelinedDSP)
+ DSPExecP2(USEC_TO_RISC_CYCLES(timeToNextEvent)); // Pipelined DSP execution (3 stage)...
+ else
+ DSPExec(USEC_TO_RISC_CYCLES(timeToNextEvent)); // Ordinary non-pipelined DSP
+ }
+
+ HandleNextEvent();
+
+// if (keystate[SDLK_ESCAPE])
+// break;
+
+// SDL_PumpEvents(); // Needed to keep the keystate current...
+ }
+ while (!frameDone);
+}
+
+void ScanlineCallback(void)
+{
+ uint16 vc = TOMReadWord(0xF00006);
+ uint16 vp = TOMReadWord(0xF0003E) + 1;
+ uint16 vi = TOMReadWord(0xF0004E);
+// uint16 vbb = TOMReadWord(0xF00040);
+ vc++;
+
+ if (vc >= vp)
+ vc = 0;
+
+//WriteLog("SLC: Currently on line %u (VP=%u)...\n", vc, vp);
+ TOMWriteWord(0xF00006, vc);
+
+//This is a crappy kludge, but maybe it'll work for now...
+//Maybe it's not so bad, since the IRQ happens on a scanline boundary...
+ if (vc == vi && vc > 0 && TOMIRQEnabled(IRQ_VBLANK)) // Time for Vertical Interrupt?
+ {
+ // We don't have to worry about autovectors & whatnot because the Jaguar
+ // tells you through its HW registers who sent the interrupt...
+ TOMSetPendingVideoInt();
+ m68k_set_irq(7);
+ }
+
+ TOMExecScanline(vc, true);
+
+//Change this to VBB???
+//Doesn't seem to matter (at least for Flip Out & I-War)
+ if (vc == 0)
+// if (vc == vbb)
+ {
+ JoystickExec();
+//We comment this out so that the GUI can manage this instead. Which is how it should be anyway.
+// RenderBackbuffer();
+ TOMResetBackbuffer(backbuffer);
+ frameDone = true;
+ }//*/
+
+// if (vc == 0)
+// TOMResetBackbuffer(backbuffer);
+
+// SetCallbackTime(ScanlineCallback, 63.5555);
+ SetCallbackTime(ScanlineCallback, 31.77775);
+}
+
+#endif
+
+// This isn't currently used, but maybe it should be...
+void RenderCallback(void)
+{
+ RenderBackbuffer();
+ TOMResetBackbuffer(backbuffer);
+// SetCallbackTime(RenderCallback, 33303.082); // # Scanlines * scanline time
+ SetCallbackTime(RenderCallback, 16651.541); // # Scanlines * scanline time
+}
diff --git a/src/jaguar/jaguar.h b/src/jaguar/jaguar.h
new file mode 100644
index 00000000..d83cd6ae
--- /dev/null
+++ b/src/jaguar/jaguar.h
@@ -0,0 +1,50 @@
+#ifndef __JAGUAR_H__
+#define __JAGUAR_H__
+
+#include "types.h"
+#include "memory.h" // For "UNKNOWN" enum
+
+void JaguarInit(void);
+void JaguarReset(void);
+void JaguarDone(void);
+
+uint8 JaguarReadByte(uint32 offset, uint32 who = UNKNOWN);
+uint16 JaguarReadWord(uint32 offset, uint32 who = UNKNOWN);
+uint32 JaguarReadLong(uint32 offset, uint32 who = UNKNOWN);
+void JaguarWriteByte(uint32 offset, uint8 data, uint32 who = UNKNOWN);
+void JaguarWriteWord(uint32 offset, uint16 data, uint32 who = UNKNOWN);
+void JaguarWriteLong(uint32 offset, uint32 data, uint32 who = UNKNOWN);
+
+bool JaguarInterruptHandlerIsValid(uint32 i);
+void JaguarDasm(uint32 offset, uint32 qt);
+
+void JaguarExecute(uint32 * backbuffer, bool render);
+//For testing the new system...
+void JaguarExecuteNew(void);
+
+// Exports from JAGUAR.CPP
+
+extern bool BIOSLoaded;
+extern bool CDBIOSLoaded;
+extern int32 jaguarCPUInExec;
+extern uint32 jaguarMainROMCRC32, jaguarROMSize, jaguarRunAddress;
+extern char * jaguarEepromsPath;
+
+// Various clock rates
+
+#define M68K_CLOCK_RATE_PAL 13296950
+#define M68K_CLOCK_RATE_NTSC 13295453
+#define RISC_CLOCK_RATE_PAL 26593900
+#define RISC_CLOCK_RATE_NTSC 26590906
+
+// Stuff for IRQ handling
+
+#define ASSERT_LINE 1
+#define CLEAR_LINE 0
+
+//Temp debug stuff (will go away soon, so don't depend on these)
+
+void DumpMainMemory(void);
+uint8 * GetRamPtr(void);
+
+#endif // __JAGUAR_H__
diff --git a/src/jaguar/jerry.c b/src/jaguar/jerry.c
new file mode 100644
index 00000000..671b08af
--- /dev/null
+++ b/src/jaguar/jerry.c
@@ -0,0 +1,855 @@
+//
+// JERRY Core
+//
+// Originally by David Raingeard
+// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Carwin Jones (BeOS)
+// Cleanups/rewrites/fixes by James L. Hammons
+//
+// JLH = James L. Hammons
+//
+// WHO WHEN WHAT
+// --- ---------- -----------------------------------------------------------
+// JLH 11/25/2009 Major rewrite of memory subsystem and handlers
+//
+
+// ------------------------------------------------------------
+// JERRY REGISTERS (Mapped by Aaron Giles)
+// ------------------------------------------------------------
+// F10000-F13FFF R/W xxxxxxxx xxxxxxxx Jerry
+// F10000 W xxxxxxxx xxxxxxxx JPIT1 - timer 1 pre-scaler
+// F10002 W xxxxxxxx xxxxxxxx JPIT2 - timer 1 divider
+// F10004 W xxxxxxxx xxxxxxxx JPIT3 - timer 2 pre-scaler
+// F10008 W xxxxxxxx xxxxxxxx JPIT4 - timer 2 divider
+// F10010 W ------xx xxxxxxxx CLK1 - processor clock divider
+// F10012 W ------xx xxxxxxxx CLK2 - video clock divider
+// F10014 W -------- --xxxxxx CLK3 - chroma clock divider
+// F10020 R/W ---xxxxx ---xxxxx JINTCTRL - interrupt control register
+// W ---x---- -------- (J_SYNCLR - clear synchronous serial intf ints)
+// W ----x--- -------- (J_ASYNCLR - clear asynchronous serial intf ints)
+// W -----x-- -------- (J_TIM2CLR - clear timer 2 [tempo] interrupts)
+// W ------x- -------- (J_TIM1CLR - clear timer 1 [sample] interrupts)
+// W -------x -------- (J_EXTCLR - clear external interrupts)
+// R/W -------- ---x---- (J_SYNENA - enable synchronous serial intf ints)
+// R/W -------- ----x--- (J_ASYNENA - enable asynchronous serial intf ints)
+// R/W -------- -----x-- (J_TIM2ENA - enable timer 2 [tempo] interrupts)
+// R/W -------- ------x- (J_TIM1ENA - enable timer 1 [sample] interrupts)
+// R/W -------- -------x (J_EXTENA - enable external interrupts)
+// F10030 R/W -------- xxxxxxxx ASIDATA - asynchronous serial data
+// F10032 W -x------ -xxxxxxx ASICTRL - asynchronous serial control
+// W -x------ -------- (TXBRK - transmit break)
+// W -------- -x------ (CLRERR - clear error)
+// W -------- --x----- (RINTEN - enable receiver interrupts)
+// W -------- ---x---- (TINTEN - enable transmitter interrupts)
+// W -------- ----x--- (RXIPOL - receiver input polarity)
+// W -------- -----x-- (TXOPOL - transmitter output polarity)
+// W -------- ------x- (PAREN - parity enable)
+// W -------- -------x (ODD - odd parity select)
+// F10032 R xxx-xxxx x-xxxxxx ASISTAT - asynchronous serial status
+// R x------- -------- (ERROR - OR of PE,FE,OE)
+// R -x------ -------- (TXBRK - transmit break)
+// R --x----- -------- (SERIN - serial input)
+// R ----x--- -------- (OE - overrun error)
+// R -----x-- -------- (FE - framing error)
+// R ------x- -------- (PE - parity error)
+// R -------x -------- (TBE - transmit buffer empty)
+// R -------- x------- (RBF - receive buffer full)
+// R -------- ---x---- (TINTEN - enable transmitter interrupts)
+// R -------- ----x--- (RXIPOL - receiver input polarity)
+// R -------- -----x-- (TXOPOL - transmitter output polarity)
+// R -------- ------x- (PAREN - parity enable)
+// R -------- -------x (ODD - odd parity)
+// F10034 R/W xxxxxxxx xxxxxxxx ASICLK - asynchronous serial interface clock
+// F10036 R xxxxxxxx xxxxxxxx JPIT1 - timer 1 pre-scaler
+// F10038 R xxxxxxxx xxxxxxxx JPIT2 - timer 1 divider
+// F1003A R xxxxxxxx xxxxxxxx JPIT3 - timer 2 pre-scaler
+// F1003C R xxxxxxxx xxxxxxxx JPIT4 - timer 2 divider
+// ------------------------------------------------------------
+// F14000-F17FFF R/W xxxxxxxx xxxxxxxx Joysticks and GPIO0-5
+// F14000 R xxxxxxxx xxxxxxxx JOYSTICK - read joystick state
+// F14000 W x------- xxxxxxxx JOYSTICK - latch joystick output
+// W x------- -------- (enable joystick outputs)
+// W -------- xxxxxxxx (joystick output data)
+// F14002 R xxxxxxxx xxxxxxxx JOYBUTS - button register
+// F14800-F14FFF R/W xxxxxxxx xxxxxxxx GPI00 - reserved (CD-ROM? no.)
+// F15000-F15FFF R/W xxxxxxxx xxxxxxxx GPI01 - reserved
+// F16000-F16FFF R/W xxxxxxxx xxxxxxxx GPI02 - reserved
+// F17000-F177FF R/W xxxxxxxx xxxxxxxx GPI03 - reserved
+// F17800-F17BFF R/W xxxxxxxx xxxxxxxx GPI04 - reserved
+// F17C00-F17FFF R/W xxxxxxxx xxxxxxxx GPI05 - reserved
+// ------------------------------------------------------------
+// F18000-F1FFFF R/W xxxxxxxx xxxxxxxx Jerry DSP
+// F1A100 R/W xxxxxxxx xxxxxxxx D_FLAGS - DSP flags register
+// R/W x------- -------- (DMAEN - DMA enable)
+// R/W -x------ -------- (REGPAGE - register page)
+// W --x----- -------- (D_EXT0CLR - clear external interrupt 0)
+// W ---x---- -------- (D_TIM2CLR - clear timer 2 interrupt)
+// W ----x--- -------- (D_TIM1CLR - clear timer 1 interrupt)
+// W -----x-- -------- (D_I2SCLR - clear I2S interrupt)
+// W ------x- -------- (D_CPUCLR - clear CPU interrupt)
+// R/W -------x -------- (D_EXT0ENA - enable external interrupt 0)
+// R/W -------- x------- (D_TIM2ENA - enable timer 2 interrupt)
+// R/W -------- -x------ (D_TIM1ENA - enable timer 1 interrupt)
+// R/W -------- --x----- (D_I2SENA - enable I2S interrupt)
+// R/W -------- ---x---- (D_CPUENA - enable CPU interrupt)
+// R/W -------- ----x--- (IMASK - interrupt mask)
+// R/W -------- -----x-- (NEGA_FLAG - ALU negative)
+// R/W -------- ------x- (CARRY_FLAG - ALU carry)
+// R/W -------- -------x (ZERO_FLAG - ALU zero)
+// F1A102 R/W -------- ------xx D_FLAGS - upper DSP flags
+// R/W -------- ------x- (D_EXT1ENA - enable external interrupt 1)
+// R/W -------- -------x (D_EXT1CLR - clear external interrupt 1)
+// F1A104 W -------- ----xxxx D_MTXC - matrix control register
+// W -------- ----x--- (MATCOL - column/row major)
+// W -------- -----xxx (MATRIX3-15 - matrix width)
+// F1A108 W ----xxxx xxxxxx-- D_MTXA - matrix address register
+// F1A10C W -------- -----x-x D_END - data organization register
+// W -------- -----x-- (BIG_INST - big endian instruction fetch)
+// W -------- -------x (BIG_IO - big endian I/O)
+// F1A110 R/W xxxxxxxx xxxxxxxx D_PC - DSP program counter
+// F1A114 R/W xxxxxxxx xx-xxxxx D_CTRL - DSP control/status register
+// R xxxx---- -------- (VERSION - DSP version code)
+// R/W ----x--- -------- (BUS_HOG - hog the bus!)
+// R/W -----x-- -------- (D_EXT0LAT - external interrupt 0 latch)
+// R/W ------x- -------- (D_TIM2LAT - timer 2 interrupt latch)
+// R/W -------x -------- (D_TIM1LAT - timer 1 interrupt latch)
+// R/W -------- x------- (D_I2SLAT - I2S interrupt latch)
+// R/W -------- -x------ (D_CPULAT - CPU interrupt latch)
+// R/W -------- ---x---- (SINGLE_GO - single step one instruction)
+// R/W -------- ----x--- (SINGLE_STEP - single step mode)
+// R/W -------- -----x-- (FORCEINT0 - cause interrupt 0 on GPU)
+// R/W -------- ------x- (CPUINT - send GPU interrupt to CPU)
+// R/W -------- -------x (DSPGO - enable DSP execution)
+// F1A116 R/W -------- -------x D_CTRL - upper DSP control/status register
+// R/W -------- -------x (D_EXT1LAT - external interrupt 1 latch)
+// F1A118-F1A11B W xxxxxxxx xxxxxxxx D_MOD - modulo instruction mask
+// F1A11C-F1A11F R xxxxxxxx xxxxxxxx D_REMAIN - divide unit remainder
+// F1A11C W -------- -------x D_DIVCTRL - divide unit control
+// W -------- -------x (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
+// F1A120-F1A123 R xxxxxxxx xxxxxxxx D_MACHI - multiply & accumulate high bits
+// F1A148 W xxxxxxxx xxxxxxxx R_DAC - right transmit data
+// F1A14C W xxxxxxxx xxxxxxxx L_DAC - left transmit data
+// F1A150 W -------- xxxxxxxx SCLK - serial clock frequency
+// F1A150 R -------- ------xx SSTAT
+// R -------- ------x- (left - no description)
+// R -------- -------x (WS - word strobe status)
+// F1A154 W -------- --xxxx-x SMODE - serial mode
+// W -------- --x----- (EVERYWORD - interrupt on MSB of every word)
+// W -------- ---x---- (FALLING - interrupt on falling edge)
+// W -------- ----x--- (RISING - interrupt of rising edge)
+// W -------- -----x-- (WSEN - enable word strobes)
+// W -------- -------x (INTERNAL - enables serial clock)
+// ------------------------------------------------------------
+// F1B000-F1CFFF R/W xxxxxxxx xxxxxxxx Local DSP RAM
+// ------------------------------------------------------------
+// F1D000 R xxxxxxxx xxxxxxxx ROM_TRI - triangle wave
+// F1D200 R xxxxxxxx xxxxxxxx ROM_SINE - full sine wave
+// F1D400 R xxxxxxxx xxxxxxxx ROM_AMSINE - amplitude modulated sine wave
+// F1D600 R xxxxxxxx xxxxxxxx ROM_12W - sine wave and second order harmonic
+// F1D800 R xxxxxxxx xxxxxxxx ROM_CHIRP16 - chirp
+// F1DA00 R xxxxxxxx xxxxxxxx ROM_NTRI - traingle wave with noise
+// F1DC00 R xxxxxxxx xxxxxxxx ROM_DELTA - spike
+// F1DE00 R xxxxxxxx xxxxxxxx ROM_NOISE - white noise
+// ------------------------------------------------------------
+
+#include "jerry.h"
+
+#include <string.h> // For memcpy
+//#include <math.h>
+#include "cdrom.h"
+#include "dac.h"
+#include "dsp.h"
+#include "eeprom.h"
+#include "event.h"
+#include "jaguar.h"
+#include "joystick.h"
+#include "log.h"
+//#include "memory.h"
+#include "wavetable.h"
+
+//Note that 44100 Hz requires samples every 22.675737 usec.
+#define NEW_TIMER_SYSTEM
+//#define JERRY_DEBUG
+
+/*static*/ uint8 jerry_ram_8[0x10000];
+
+//#define JERRY_CONFIG 0x4002 // ??? What's this ???
+
+uint8 analog_x, analog_y;
+
+static uint32 JERRYPIT1Prescaler;
+static uint32 JERRYPIT1Divider;
+static uint32 JERRYPIT2Prescaler;
+static uint32 JERRYPIT2Divider;
+static int32 jerry_timer_1_counter;
+static int32 jerry_timer_2_counter;
+
+uint32 JERRYI2SInterruptDivide = 8;
+int32 JERRYI2SInterruptTimer = -1;
+uint32 jerryI2SCycles;
+uint32 jerryIntPending;
+
+// Private function prototypes
+
+void JERRYResetPIT1(void);
+void JERRYResetPIT2(void);
+void JERRYResetI2S(void);
+
+void JERRYPIT1Callback(void);
+void JERRYPIT2Callback(void);
+void JERRYI2SCallback(void);
+
+//This approach is probably wrong, since the timer is continuously counting down, though
+//it might only be a problem if the # of interrupts generated is greater than 1--the M68K's
+//timeslice should be running during that phase... (The DSP needs to be aware of this!)
+
+//This is only used by the old system, so once the new timer system is working this
+//should be safe to nuke.
+void JERRYI2SExec(uint32 cycles)
+{
+#ifndef NEW_TIMER_SYSTEM
+#warning "externed var in source--should be in header file. !!! FIX !!!"
+ extern uint16 serialMode; // From DAC.CPP
+ if (serialMode & 0x01) // INTERNAL flag (JERRY is master)
+ {
+
+ // Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP???
+//Yes, it should. !!! FIX !!!
+ JERRYI2SInterruptDivide &= 0xFF;
+
+ if (JERRYI2SInterruptTimer == -1)
+ {
+ // We don't have to divide the RISC clock rate by this--the reason is a bit
+ // convoluted. Will put explanation here later...
+// What's needed here is to find the ratio of the frequency to the number of clock cycles
+// in one second. For example, if the sample rate is 44100, we divide the clock rate by
+// this: 26590906 / 44100 = 602 cycles.
+// Which means, every 602 cycles that go by we have to generate an interrupt.
+ jerryI2SCycles = 32 * (2 * (JERRYI2SInterruptDivide + 1));
+ }
+
+ JERYI2SInterruptTimer -= cycles;
+ if (JERRYI2SInterruptTimer <= 0)
+ {
+//This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!!
+ DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
+ JERRYI2SInterruptTimer += jerryI2SCycles;
+#ifdef JERRY_DEBUG
+ if (JERRYI2SInterruptTimer < 0)
+ WriteLog("JERRY: Missed generating an interrupt (missed %u)!\n", (-JERRYI2SInterruptTimer / jerryI2SCycles) + 1);
+#endif
+ }
+ }
+ else // JERRY is slave to external word clock
+ {
+ // This is just a temporary kludge to see if the CD bus mastering works
+ // I.e., this is totally faked...!
+// The whole interrupt system is pretty much borked and is need of an overhaul.
+// What we need is a way of handling these interrupts when they happen instead of
+// scanline boundaries the way it is now.
+ JERRYI2SInterruptTimer -= cycles;
+ if (JERRYI2SInterruptTimer <= 0)
+ {
+//This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!! [DONE]
+ if (ButchIsReadyToSend())//Not sure this is right spot to check...
+ {
+// return GetWordFromButchSSI(offset, who);
+ SetSSIWordsXmittedFromButch();
+ DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
+ }
+ JERRYI2SInterruptTimer += 602;
+ }
+ }
+#else
+ RemoveCallback(JERRYI2SCallback);
+ JERRYI2SCallback();
+#endif
+}
+
+//NOTE: This is only used by the old execution core. Safe to nuke once it's stable.
+void JERRYExecPIT(uint32 cycles)
+{
+//This is wrong too: Counters are *always* spinning! !!! FIX !!! [DONE]
+// if (jerry_timer_1_counter)
+ jerry_timer_1_counter -= cycles;
+
+ if (jerry_timer_1_counter <= 0)
+ {
+//Also, it can generate a CPU interrupt as well... !!! FIX !!! or does it? Maybe it goes Timer->GPU->CPU?
+ DSPSetIRQLine(DSPIRQ_TIMER0, ASSERT_LINE); // This does the 'IRQ enabled' checking...
+// JERRYResetPIT1();
+ jerry_timer_1_counter += (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
+ }
+
+//This is wrong too: Counters are *always* spinning! !!! FIX !!! [DONE]
+// if (jerry_timer_2_counter)
+ jerry_timer_2_counter -= cycles;
+
+ if (jerry_timer_2_counter <= 0)
+ {
+//Also, it can generate a CPU interrupt as well... !!! FIX !!! or does it? Maybe it goes Timer->GPU->CPU?
+ DSPSetIRQLine(DSPIRQ_TIMER1, ASSERT_LINE); // This does the 'IRQ enabled' checking...
+// JERRYResetPIT2();
+ jerry_timer_2_counter += (JERRYPIT2Prescaler + 1) * (JERRYPIT2Divider + 1);
+ }
+}
+
+void JERRYResetI2S(void)
+{
+ //WriteLog("i2s: reseting\n");
+//This is really SCLK... !!! FIX !!!
+ JERRYI2SInterruptDivide = 8;
+ JERRYI2SInterruptTimer = -1;
+}
+
+void JERRYResetPIT1(void)
+{
+#ifndef NEW_TIMER_SYSTEM
+/* if (!JERRYPIT1Prescaler || !JERRYPIT1Divider)
+ jerry_timer_1_counter = 0;
+ else//*/
+//Small problem with this approach: Overflow if both are = $FFFF. !!! FIX !!!
+ jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
+
+// if (jerry_timer_1_counter)
+// WriteLog("jerry: reseting timer 1 to 0x%.8x (%i)\n",jerry_timer_1_counter,jerry_timer_1_counter);
+
+#else
+ RemoveCallback(JERRYPIT1Callback);
+
+ if (JERRYPIT1Prescaler | JERRYPIT1Divider)
+ {
+ double usecs = (float)(JERRYPIT1Prescaler + 1) * (float)(JERRYPIT1Divider + 1) * RISC_CYCLE_IN_USEC;
+ SetCallbackTime(JERRYPIT1Callback, usecs);
+ }
+#endif
+}
+
+void JERRYResetPIT2(void)
+{
+#ifndef NEW_TIMER_SYSTEM
+/* if (!JERRYPIT2Prescaler || !JERRYPIT2Divider)
+ {
+ jerry_timer_2_counter = 0;
+ return;
+ }
+ else//*/
+ jerry_timer_2_counter = (JERRYPIT2Prescaler + 1) * (JERRYPIT2Divider + 1);
+
+// if (jerry_timer_2_counter)
+// WriteLog("jerry: reseting timer 2 to 0x%.8x (%i)\n",jerry_timer_2_counter,jerry_timer_2_counter);
+
+#else
+ RemoveCallback(JERRYPIT2Callback);
+
+ if (JERRYPIT1Prescaler | JERRYPIT1Divider)
+ {
+ double usecs = (float)(JERRYPIT2Prescaler + 1) * (float)(JERRYPIT2Divider + 1) * RISC_CYCLE_IN_USEC;
+ SetCallbackTime(JERRYPIT2Callback, usecs);
+ }
+#endif
+}
+
+void JERRYPIT1Callback(void)
+{
+ DSPSetIRQLine(DSPIRQ_TIMER0, ASSERT_LINE); // This does the 'IRQ enabled' checking...
+ JERRYResetPIT1();
+}
+
+void JERRYPIT2Callback(void)
+{
+ DSPSetIRQLine(DSPIRQ_TIMER1, ASSERT_LINE); // This does the 'IRQ enabled' checking...
+ JERRYResetPIT2();
+}
+
+void JERRYI2SCallback(void)
+{
+ // Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP???
+//Yes, it should. !!! FIX !!!
+#warning "Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP??? Yes, it should. !!! FIX !!!"
+ JERRYI2SInterruptDivide &= 0xFF;
+ // We don't have to divide the RISC clock rate by this--the reason is a bit
+ // convoluted. Will put explanation here later...
+// What's needed here is to find the ratio of the frequency to the number of clock cycles
+// in one second. For example, if the sample rate is 44100, we divide the clock rate by
+// this: 26590906 / 44100 = 602 cycles.
+// Which means, every 602 cycles that go by we have to generate an interrupt.
+ jerryI2SCycles = 32 * (2 * (JERRYI2SInterruptDivide + 1));
+
+//This should be in this file with an extern reference in the header file so that
+//DAC.CPP can see it... !!! FIX !!!
+ extern uint16 serialMode; // From DAC.CPP
+
+ if (serialMode & 0x01) // INTERNAL flag (JERRY is master)
+ {
+ DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE); // This does the 'IRQ enabled' checking...
+ double usecs = (float)jerryI2SCycles * RISC_CYCLE_IN_USEC;
+ SetCallbackTime(JERRYI2SCallback, usecs);
+ }
+ else // JERRY is slave to external word clock
+ {
+//Note that 44100 Hz requires samples every 22.675737 usec.
+//When JERRY is slave to the word clock, we need to do interrupts either at 44.1K
+//sample rate or at a 88.2K sample rate (11.332... usec).
+/* // This is just a temporary kludge to see if the CD bus mastering works
+ // I.e., this is totally faked...!
+// The whole interrupt system is pretty much borked and is need of an overhaul.
+// What we need is a way of handling these interrupts when they happen instead of
+// scanline boundaries the way it is now.
+ jerry_i2s_interrupt_timer -= cycles;
+ if (jerry_i2s_interrupt_timer <= 0)
+ {
+//This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!! [DONE]
+ if (ButchIsReadyToSend())//Not sure this is right spot to check...
+ {
+// return GetWordFromButchSSI(offset, who);
+ SetSSIWordsXmittedFromButch();
+ DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
+ }
+ jerry_i2s_interrupt_timer += 602;
+ }*/
+
+ if (ButchIsReadyToSend())//Not sure this is right spot to check...
+ {
+// return GetWordFromButchSSI(offset, who);
+ SetSSIWordsXmittedFromButch();
+ DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
+ }
+
+ SetCallbackTime(JERRYI2SCallback, 22.675737);
+ }
+}
+
+
+void JERRYInit(void)
+{
+// clock_init();
+// anajoy_init();
+ JoystickInit();
+ DACInit();
+//This should be handled with the cart initialization...
+// eeprom_init();
+// memory_malloc_secure((void **)&jerry_ram_8, 0x10000, "JERRY RAM/ROM");
+ memcpy(&jerry_ram_8[0xD000], waveTableROM, 0x1000);
+
+ JERRYPIT1Prescaler = 0xFFFF;
+ JERRYPIT2Prescaler = 0xFFFF;
+ JERRYPIT1Divider = 0xFFFF;
+ JERRYPIT2Divider = 0xFFFF;
+}
+
+void JERRYReset(void)
+{
+// clock_reset();
+// anajoy_reset();
+ JoystickReset();
+ EepromReset();
+ JERRYResetI2S();
+ DACReset();
+
+ memset(jerry_ram_8, 0x00, 0xD000); // Don't clear out the Wavetable ROM....!
+ JERRYPIT1Prescaler = 0xFFFF;
+ JERRYPIT2Prescaler = 0xFFFF;
+ JERRYPIT1Divider = 0xFFFF;
+ JERRYPIT2Divider = 0xFFFF;
+ jerry_timer_1_counter = 0;
+ jerry_timer_2_counter = 0;
+}
+
+void JERRYDone(void)
+{
+ WriteLog("JERRY: M68K Interrupt control ($F10020) = %04X\n", GET16(jerry_ram_8, 0x20));
+// memory_free(jerry_ram_8);
+// clock_done();
+// anajoy_done();
+ JoystickDone();
+ DACDone();
+ EepromDone();
+}
+
+bool JERRYIRQEnabled(int irq)
+{
+ // Read the word @ $F10020
+ return jerry_ram_8[0x21] & (1 << irq);
+}
+
+void JERRYSetPendingIRQ(int irq)
+{
+ // This is the shadow of INT (it's a split RO/WO register)
+ jerryIntPending |= (1 << irq);
+}
+
+//
+// JERRY byte access (read)
+//
+uint8 JERRYReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+#ifdef JERRY_DEBUG
+ WriteLog("JERRY: Reading byte at %06X\n", offset);
+#endif
+ if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
+ return DSPReadByte(offset, who);
+ else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
+ return DSPReadByte(offset, who);
+ // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
+ else if (offset >= 0xF1A148 && offset <= 0xF1A153)
+ return DACReadByte(offset, who);
+// F10036 R xxxxxxxx xxxxxxxx JPIT1 - timer 1 pre-scaler
+// F10038 R xxxxxxxx xxxxxxxx JPIT2 - timer 1 divider
+// F1003A R xxxxxxxx xxxxxxxx JPIT3 - timer 2 pre-scaler
+// F1003C R xxxxxxxx xxxxxxxx JPIT4 - timer 2 divider
+//This is WRONG!
+// else if (offset >= 0xF10000 && offset <= 0xF10007)
+//This is still wrong. What needs to be returned here are the values being counted down
+//in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
+
+//This is probably the problem with the new timer code... This is invalid
+//under the new system... !!! FIX !!!
+ else if ((offset >= 0xF10036) && (offset <= 0xF1003D))
+ {
+#ifndef NEW_TIMER_SYSTEM
+// jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
+ uint32 counter1Hi = (jerry_timer_1_counter / (JERRYPIT1Divider + 1)) - 1;
+ uint32 counter1Lo = (jerry_timer_1_counter % (JERRYPIT1Divider + 1)) - 1;
+ uint32 counter2Hi = (jerry_timer_2_counter / (JERRYPIT2Divider + 1)) - 1;
+ uint32 counter2Lo = (jerry_timer_2_counter % (JERRYPIT2Divider + 1)) - 1;
+
+ switch(offset & 0x0F)
+ {
+ case 6:
+// return JERRYPIT1Prescaler >> 8;
+ return counter1Hi >> 8;
+ case 7:
+// return JERRYPIT1Prescaler & 0xFF;
+ return counter1Hi & 0xFF;
+ case 8:
+// return JERRYPIT1Divider >> 8;
+ return counter1Lo >> 8;
+ case 9:
+// return JERRYPIT1Divider & 0xFF;
+ return counter1Lo & 0xFF;
+ case 10:
+// return JERRYPIT2Prescaler >> 8;
+ return counter2Hi >> 8;
+ case 11:
+// return JERRYPIT2Prescaler & 0xFF;
+ return counter2Hi & 0xFF;
+ case 12:
+// return JERRYPIT2Divider >> 8;
+ return counter2Lo >> 8;
+ case 13:
+// return JERRYPIT2Divider & 0xFF;
+ return counter2Lo & 0xFF;
+ }
+#else
+WriteLog("JERRY: Unhandled timer read (BYTE) at %08X...\n", offset);
+#endif
+ }
+// else if (offset >= 0xF10010 && offset <= 0xF10015)
+// return clock_byte_read(offset);
+// else if (offset >= 0xF17C00 && offset <= 0xF17C01)
+// return anajoy_byte_read(offset);
+ else if (offset >= 0xF14000 && offset <= 0xF14003)
+ return JoystickReadByte(offset) | EepromReadByte(offset);
+ else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
+ return EepromReadByte(offset);
+
+ return jerry_ram_8[offset & 0xFFFF];
+}
+
+//
+// JERRY word access (read)
+//
+uint16 JERRYReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+#ifdef JERRY_DEBUG
+ WriteLog("JERRY: Reading word at %06X\n", offset);
+#endif
+
+ if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
+ return DSPReadWord(offset, who);
+ else if (offset >= DSP_WORK_RAM_BASE && offset <= DSP_WORK_RAM_BASE + 0x1FFF)
+ return DSPReadWord(offset, who);
+ // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
+ else if (offset >= 0xF1A148 && offset <= 0xF1A153)
+ return DACReadWord(offset, who);
+// F10036 R xxxxxxxx xxxxxxxx JPIT1 - timer 1 pre-scaler
+// F10038 R xxxxxxxx xxxxxxxx JPIT2 - timer 1 divider
+// F1003A R xxxxxxxx xxxxxxxx JPIT3 - timer 2 pre-scaler
+// F1003C R xxxxxxxx xxxxxxxx JPIT4 - timer 2 divider
+//This is WRONG!
+// else if ((offset >= 0xF10000) && (offset <= 0xF10007))
+//This is still wrong. What needs to be returned here are the values being counted down
+//in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
+ else if ((offset >= 0xF10036) && (offset <= 0xF1003D))
+ {
+#ifndef NEW_TIMER_SYSTEM
+// jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
+ uint32 counter1Hi = (jerry_timer_1_counter / (JERRYPIT1Divider + 1)) - 1;
+ uint32 counter1Lo = (jerry_timer_1_counter % (JERRYPIT1Divider + 1)) - 1;
+ uint32 counter2Hi = (jerry_timer_2_counter / (JERRYPIT2Divider + 1)) - 1;
+ uint32 counter2Lo = (jerry_timer_2_counter % (JERRYPIT2Divider + 1)) - 1;
+
+ switch(offset & 0x0F)
+ {
+ case 6:
+// return JERRYPIT1Prescaler;
+ return counter1Hi;
+ case 8:
+// return JERRYPIT1Divider;
+ return counter1Lo;
+ case 10:
+// return JERRYPIT2Prescaler;
+ return counter2Hi;
+ case 12:
+// return JERRYPIT2Divider;
+ return counter2Lo;
+ }
+ // Unaligned word reads???
+#else
+WriteLog("JERRY: Unhandled timer read (WORD) at %08X...\n", offset);
+#endif
+ }
+// else if ((offset >= 0xF10010) && (offset <= 0xF10015))
+// return clock_word_read(offset);
+ else if (offset == 0xF10020)
+ return jerryIntPending;
+// else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
+// return anajoy_word_read(offset);
+ else if (offset == 0xF14000)
+ return (JoystickReadWord(offset) & 0xFFFE) | EepromReadWord(offset);
+ else if ((offset >= 0xF14002) && (offset < 0xF14003))
+ return JoystickReadWord(offset);
+ else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
+ return EepromReadWord(offset);
+
+/*if (offset >= 0xF1D000)
+ WriteLog("JERRY: Reading word at %08X [%04X]...\n", offset, ((uint16)jerry_ram_8[(offset+0)&0xFFFF] << 8) | jerry_ram_8[(offset+1)&0xFFFF]);//*/
+
+ offset &= 0xFFFF; // Prevent crashing...!
+ return ((uint16)jerry_ram_8[offset+0] << 8) | jerry_ram_8[offset+1];
+}
+
+//
+// JERRY byte access (write)
+//
+void JERRYWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
+{
+#ifdef JERRY_DEBUG
+ WriteLog("jerry: writing byte %.2x at 0x%.6x\n",data,offset);
+#endif
+ if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
+ {
+ DSPWriteByte(offset, data, who);
+ return;
+ }
+ else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
+ {
+ DSPWriteByte(offset, data, who);
+ return;
+ }
+ // SCLK ($F1A150--8 bits wide)
+//NOTE: This should be taken care of in DAC...
+ else if ((offset >= 0xF1A152) && (offset <= 0xF1A153))
+ {
+// WriteLog("JERRY: Writing %02X to SCLK...\n", data);
+ if ((offset & 0x03) == 2)
+ JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0x00FF) | ((uint32)data << 8);
+ else
+ JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0xFF00) | (uint32)data;
+
+ JERRYI2SInterruptTimer = -1;
+#ifndef NEW_TIMER_SYSTEM
+ jerry_i2s_exec(0);
+#else
+ RemoveCallback(JERRYI2SCallback);
+ JERRYI2SCallback();
+#endif
+// return;
+ }
+ // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
+ else if (offset >= 0xF1A148 && offset <= 0xF1A157)
+ {
+ DACWriteByte(offset, data, who);
+ return;
+ }
+ else if (offset >= 0xF10000 && offset <= 0xF10007)
+ {
+#ifndef NEW_TIMER_SYSTEM
+ switch (offset & 0x07)
+ {
+ case 0:
+ JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0x00FF) | (data << 8);
+ JERRYResetPIT1();
+ break;
+ case 1:
+ JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0xFF00) | data;
+ JERRYResetPIT1();
+ break;
+ case 2:
+ JERRYPIT1Divider = (JERRYPIT1Divider & 0x00FF) | (data << 8);
+ JERRYResetPIT1();
+ break;
+ case 3:
+ JERRYPIT1Divider = (JERRYPIT1Divider & 0xFF00) | data;
+ JERRYResetPIT1();
+ break;
+ case 4:
+ JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0x00FF) | (data << 8);
+ JERRYResetPIT2();
+ break;
+ case 5:
+ JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0xFF00) | data;
+ JERRYResetPIT2();
+ break;
+ case 6:
+ JERRYPIT2Divider = (JERRYPIT2Divider & 0x00FF) | (data << 8);
+ JERRYResetPIT2();
+ break;
+ case 7:
+ JERRYPIT2Divider = (JERRYPIT2Divider & 0xFF00) | data;
+ JERRYResetPIT2();
+ }
+#else
+WriteLog("JERRY: Unhandled timer write (BYTE) at %08X...\n", offset);
+#endif
+ return;
+ }
+/* else if ((offset >= 0xF10010) && (offset <= 0xF10015))
+ {
+ clock_byte_write(offset, data);
+ return;
+ }//*/
+ // JERRY -> 68K interrupt enables/latches (need to be handled!)
+ else if (offset >= 0xF10020 && offset <= 0xF10023)
+ {
+WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%02X to $%08X!\n", data, offset);
+ }
+/* else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
+ {
+ anajoy_byte_write(offset, data);
+ return;
+ }*/
+ else if ((offset >= 0xF14000) && (offset <= 0xF14003))
+ {
+ JoystickWriteByte(offset, data);
+ EepromWriteByte(offset, data);
+ return;
+ }
+ else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
+ {
+ EepromWriteByte(offset, data);
+ return;
+ }
+
+//Need to protect write attempts to Wavetable ROM (F1D000-FFF)
+ if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
+ return;
+
+ jerry_ram_8[offset & 0xFFFF] = data;
+}
+
+//
+// JERRY word access (write)
+//
+void JERRYWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
+{
+#ifdef JERRY_DEBUG
+ WriteLog( "JERRY: Writing word %04X at %06X\n", data, offset);
+#endif
+
+ if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
+ {
+ DSPWriteWord(offset, data, who);
+ return;
+ }
+ else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
+ {
+ DSPWriteWord(offset, data, who);
+ return;
+ }
+//NOTE: This should be taken care of in DAC...
+ else if (offset == 0xF1A152) // Bottom half of SCLK ($F1A150)
+ {
+ WriteLog("JERRY: Writing %04X to SCLK (by %s)...\n", data, whoName[who]);
+//This should *only* be enabled when SMODE has its INTERNAL bit set! !!! FIX !!!
+ JERRYI2SInterruptDivide = (uint8)data;
+ JERRYI2SInterruptTimer = -1;
+#ifndef NEW_TIMER_SYSTEM
+ jerry_i2s_exec(0);
+#else
+ RemoveCallback(JERRYI2SCallback);
+ JERRYI2SCallback();
+#endif
+
+ DACWriteWord(offset, data, who);
+ return;
+ }
+ // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
+ else if (offset >= 0xF1A148 && offset <= 0xF1A156)
+ {
+ DACWriteWord(offset, data, who);
+ return;
+ }
+ else if (offset >= 0xF10000 && offset <= 0xF10007)
+ {
+//#ifndef NEW_TIMER_SYSTEM
+#if 1
+ switch(offset & 0x07)
+ {
+ case 0:
+ JERRYPIT1Prescaler = data;
+ JERRYResetPIT1();
+ break;
+ case 2:
+ JERRYPIT1Divider = data;
+ JERRYResetPIT1();
+ break;
+ case 4:
+ JERRYPIT2Prescaler = data;
+ JERRYResetPIT2();
+ break;
+ case 6:
+ JERRYPIT2Divider = data;
+ JERRYResetPIT2();
+ }
+ // Need to handle (unaligned) cases???
+#else
+WriteLog("JERRY: Unhandled timer write %04X (WORD) at %08X by %s...\n", data, offset, whoName[who]);
+#endif
+ return;
+ }
+/* else if (offset >= 0xF10010 && offset < 0xF10016)
+ {
+ clock_word_write(offset, data);
+ return;
+ }//*/
+ // JERRY -> 68K interrupt enables/latches (need to be handled!)
+ else if (offset >= 0xF10020 && offset <= 0xF10022)
+ {
+WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%04X to $%08X!\n", data, offset);
+ }
+/* else if (offset >= 0xF17C00 && offset < 0xF17C02)
+ {
+//I think this was removed from the Jaguar. If so, then we don't need this....!
+ anajoy_word_write(offset, data);
+ return;
+ }*/
+ else if (offset >= 0xF14000 && offset < 0xF14003)
+ {
+ JoystickWriteWord(offset, data);
+ EepromWriteWord(offset, data);
+ return;
+ }
+ else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
+ {
+ EepromWriteWord(offset, data);
+ return;
+ }
+
+//Need to protect write attempts to Wavetable ROM (F1D000-FFF)
+ if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
+ return;
+
+ jerry_ram_8[(offset+0) & 0xFFFF] = (data >> 8) & 0xFF;
+ jerry_ram_8[(offset+1) & 0xFFFF] = data & 0xFF;
+}
diff --git a/src/jaguar/jerry.h b/src/jaguar/jerry.h
new file mode 100644
index 00000000..fd008d93
--- /dev/null
+++ b/src/jaguar/jerry.h
@@ -0,0 +1,39 @@
+//
+// JERRY.H: Header file
+//
+
+#ifndef __JERRY_H__
+#define __JERRY_H__
+
+//#include "types.h"
+#include "memory.h"
+
+void JERRYInit(void);
+void JERRYReset(void);
+void JERRYDone(void);
+
+uint8 JERRYReadByte(uint32 offset, uint32 who = UNKNOWN);
+uint16 JERRYReadWord(uint32 offset, uint32 who = UNKNOWN);
+void JERRYWriteByte(uint32 offset, uint8 data, uint32 who = UNKNOWN);
+void JERRYWriteWord(uint32 offset, uint16 data, uint32 who = UNKNOWN);
+
+void JERRYExecPIT(uint32 cycles);
+void JERRYI2SExec(uint32 cycles);
+
+// 68000 Interrupt bit positions (enabled at $F10020)
+
+enum { IRQ2_EXTERNAL = 0, IRQ2_DSP, IRQ2_TIMER1, IRQ2_TIMER2, IRQ2_ASI, IRQ2_SSI };
+
+bool JERRYIRQEnabled(int irq);
+void JERRYSetPendingIRQ(int irq);
+
+// This should stay inside this file, but it's here for now...
+// Need to set up an interface function so that this can go back
+void JERRYI2SCallback(void);
+
+// External variables
+
+extern uint32 JERRYI2SInterruptDivide;
+extern int32 JERRYI2SInterruptTimer;
+
+#endif
diff --git a/src/jaguar/joystick.c b/src/jaguar/joystick.c
new file mode 100644
index 00000000..0a391b0b
--- /dev/null
+++ b/src/jaguar/joystick.c
@@ -0,0 +1,450 @@
+//
+// Joystick handler
+//
+// by cal2
+// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
+// Cleanups/fixes by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+//
+
+#include "joystick.h"
+
+#include <SDL.h>
+#include <time.h>
+#include "gpu.h"
+//#include "gui.h"
+#include "jaguar.h"
+#include "log.h"
+#include "settings.h"
+#include "video.h"
+
+#if 0
+#define BUTTON_U 0
+#define BUTTON_D 1
+#define BUTTON_L 2
+#define BUTTON_R 3
+#define BUTTON_s 4
+#define BUTTON_7 5
+#define BUTTON_4 6
+#define BUTTON_1 7
+#define BUTTON_0 8
+#define BUTTON_8 9
+#define BUTTON_5 10
+#define BUTTON_2 11
+#define BUTTON_d 12
+#define BUTTON_9 13
+#define BUTTON_6 14
+#define BUTTON_3 15
+
+#define BUTTON_A 16
+#define BUTTON_B 17
+#define BUTTON_C 18
+#define BUTTON_OPTION 19
+#define BUTTON_PAUSE 20
+#endif
+
+// Global vars
+
+static uint8 joystick_ram[4];
+uint8 joypad_0_buttons[21];
+uint8 joypad_1_buttons[21];
+
+bool keyBuffer[21];
+
+//extern bool finished;
+////extern bool showGUI;
+bool GUIKeyHeld = false;
+extern int start_logging;
+int gpu_start_log = 0;
+int op_start_log = 0;
+int blit_start_log = 0;
+int effect_start = 0;
+int effect_start2 = 0, effect_start3 = 0, effect_start4 = 0, effect_start5 = 0, effect_start6 = 0;
+bool interactiveMode = false;
+bool iLeft, iRight, iToggle = false;
+bool keyHeld1 = false, keyHeld2 = false, keyHeld3 = false;
+int objectPtr = 0;
+bool startMemLog = false;
+extern bool doDSPDis, doGPUDis;
+
+bool blitterSingleStep = false;
+bool bssGo = false;
+bool bssHeld = false;
+
+void JoystickInit(void)
+{
+ JoystickReset();
+}
+
+void JoystickExec(void)
+{
+// uint8 * keystate = SDL_GetKeyState(NULL);
+
+// memset(joypad_0_buttons, 0, 21);
+// memset(joypad_1_buttons, 0, 21);
+ gpu_start_log = 0; // Only log while key down!
+ effect_start = 0;
+ effect_start2 = effect_start3 = effect_start4 = effect_start5 = effect_start6 = 0;
+ blit_start_log = 0;
+ iLeft = iRight = false;
+
+#if 0
+ if ((keystate[SDLK_LALT] || keystate[SDLK_RALT]) & keystate[SDLK_RETURN])
+ ToggleFullscreen();
+
+ // Keybindings in order of U, D, L, R, C, B, A, Op, Pa, 0-9, #, *
+// vjs.p1KeyBindings[0] = sdlemu_getval_int("p1k_up", SDLK_UP);
+
+#if 0
+ if (keystate[vjs.p1KeyBindings[0]])
+ joypad_0_buttons[BUTTON_U] = 0x01;
+ if (keystate[vjs.p1KeyBindings[1]])
+ joypad_0_buttons[BUTTON_D] = 0x01;
+ if (keystate[vjs.p1KeyBindings[2]])
+ joypad_0_buttons[BUTTON_L] = 0x01;
+ if (keystate[vjs.p1KeyBindings[3]])
+ joypad_0_buttons[BUTTON_R] = 0x01;
+ // The buttons are labelled C,B,A on the controller (going from left to right)
+ if (keystate[vjs.p1KeyBindings[4]])
+ joypad_0_buttons[BUTTON_C] = 0x01;
+ if (keystate[vjs.p1KeyBindings[5]])
+ joypad_0_buttons[BUTTON_B] = 0x01;
+ if (keystate[vjs.p1KeyBindings[6]])
+ joypad_0_buttons[BUTTON_A] = 0x01;
+//I may yet move these to O and P...
+ if (keystate[vjs.p1KeyBindings[7]])
+ joypad_0_buttons[BUTTON_OPTION] = 0x01;
+ if (keystate[vjs.p1KeyBindings[8]])
+ joypad_0_buttons[BUTTON_PAUSE] = 0x01;
+
+ if (keystate[vjs.p1KeyBindings[9]])
+ joypad_0_buttons[BUTTON_0] = 0x01;
+ if (keystate[vjs.p1KeyBindings[10]])
+ joypad_0_buttons[BUTTON_1] = 0x01;
+ if (keystate[vjs.p1KeyBindings[11]])
+ joypad_0_buttons[BUTTON_2] = 0x01;
+ if (keystate[vjs.p1KeyBindings[12]])
+ joypad_0_buttons[BUTTON_3] = 0x01;
+ if (keystate[vjs.p1KeyBindings[13]])
+ joypad_0_buttons[BUTTON_4] = 0x01;
+ if (keystate[vjs.p1KeyBindings[14]])
+ joypad_0_buttons[BUTTON_5] = 0x01;
+ if (keystate[vjs.p1KeyBindings[15]])
+ joypad_0_buttons[BUTTON_6] = 0x01;
+ if (keystate[vjs.p1KeyBindings[16]])
+ joypad_0_buttons[BUTTON_7] = 0x01;
+ if (keystate[vjs.p1KeyBindings[17]])
+ joypad_0_buttons[BUTTON_8] = 0x01;
+ if (keystate[vjs.p1KeyBindings[18]])
+ joypad_0_buttons[BUTTON_9] = 0x01;
+ if (keystate[vjs.p1KeyBindings[19]])
+ joypad_0_buttons[BUTTON_s] = 0x01;
+ if (keystate[vjs.p1KeyBindings[20]])
+ joypad_0_buttons[BUTTON_d] = 0x01;
+#else
+ if (keyBuffer[0])
+ joypad_0_buttons[BUTTON_U] = 0x01;
+ if (keyBuffer[1])
+ joypad_0_buttons[BUTTON_D] = 0x01;
+ if (keyBuffer[2])
+ joypad_0_buttons[BUTTON_L] = 0x01;
+ if (keyBuffer[3])
+ joypad_0_buttons[BUTTON_R] = 0x01;
+ // The buttons are labelled C,B,A on the controller (going from left to right)
+ if (keyBuffer[4])
+ joypad_0_buttons[BUTTON_C] = 0x01;
+ if (keyBuffer[5])
+ joypad_0_buttons[BUTTON_B] = 0x01;
+ if (keyBuffer[6])
+ joypad_0_buttons[BUTTON_A] = 0x01;
+//I may yet move these to O and P...
+ if (keyBuffer[7])
+ joypad_0_buttons[BUTTON_OPTION] = 0x01;
+ if (keyBuffer[8])
+ joypad_0_buttons[BUTTON_PAUSE] = 0x01;
+
+ if (keyBuffer[9])
+ joypad_0_buttons[BUTTON_0] = 0x01;
+ if (keyBuffer[10])
+ joypad_0_buttons[BUTTON_1] = 0x01;
+ if (keyBuffer[11])
+ joypad_0_buttons[BUTTON_2] = 0x01;
+ if (keyBuffer[12])
+ joypad_0_buttons[BUTTON_3] = 0x01;
+ if (keyBuffer[13])
+ joypad_0_buttons[BUTTON_4] = 0x01;
+ if (keyBuffer[14])
+ joypad_0_buttons[BUTTON_5] = 0x01;
+ if (keyBuffer[15])
+ joypad_0_buttons[BUTTON_6] = 0x01;
+ if (keyBuffer[16])
+ joypad_0_buttons[BUTTON_7] = 0x01;
+ if (keyBuffer[17])
+ joypad_0_buttons[BUTTON_8] = 0x01;
+ if (keyBuffer[18])
+ joypad_0_buttons[BUTTON_9] = 0x01;
+ if (keyBuffer[19])
+ joypad_0_buttons[BUTTON_s] = 0x01;
+ if (keyBuffer[20])
+ joypad_0_buttons[BUTTON_d] = 0x01;
+#endif
+
+#warning "!!! FIX !!! (debounceRunKey)"
+// extern bool debounceRunKey;
+ bool debounceRunKey;
+ if (keystate[SDLK_ESCAPE])
+ {
+ if (!debounceRunKey)
+#warning "!!! FIX !!! (finished = true)"
+;// finished = true;
+ }
+ else
+ debounceRunKey = false;
+
+ if (keystate[SDLK_TAB])
+ {
+ if (!GUIKeyHeld)
+#warning "!!! FIX !!! (showGUI = !showGUI, ...)"
+;// showGUI = !showGUI, GUIKeyHeld = true;
+ }
+ else
+ GUIKeyHeld = false;
+
+ if (keystate[SDLK_q])
+ start_logging = 1;
+ if (keystate[SDLK_w])
+ GPUResetStats();
+// if (keystate[SDLK_u]) jaguar_long_write(0xf1c384,jaguar_long_read(0xf1c384)+1);
+ if (keystate[SDLK_d])
+ DumpMainMemory();
+ if (keystate[SDLK_l])
+ gpu_start_log = 1;
+ if (keystate[SDLK_o])
+ op_start_log = 1;
+ if (keystate[SDLK_b])
+ blit_start_log = 1;
+
+ if (keystate[SDLK_1])
+ effect_start = 1;
+ if (keystate[SDLK_2])
+ effect_start2 = 1;
+ if (keystate[SDLK_3])
+ effect_start3 = 1;
+ if (keystate[SDLK_4])
+ effect_start4 = 1;
+ if (keystate[SDLK_5])
+ effect_start5 = 1;
+ if (keystate[SDLK_6])
+ effect_start6 = 1;
+
+ if (keystate[SDLK_i])
+ interactiveMode = true;
+
+ if (keystate[SDLK_8] && interactiveMode)
+ {
+ if (!keyHeld1)
+ objectPtr--, keyHeld1 = true;
+ }
+ else
+ keyHeld1 = false;
+
+ if (keystate[SDLK_0] && interactiveMode)
+ {
+ if (!keyHeld2)
+ objectPtr++, keyHeld2 = true;
+ }
+ else
+ keyHeld2 = false;
+
+ if (keystate[SDLK_9] && interactiveMode)
+ {
+ if (!keyHeld3)
+ iToggle = !iToggle, keyHeld3 = true;
+ }
+ else
+ keyHeld3 = false;
+
+ if (keystate[SDLK_e])
+ startMemLog = true;
+ if (keystate[SDLK_r])
+ WriteLog("\n--------> MARK!\n\n");
+ if (keystate[SDLK_t])
+ doDSPDis = true;
+ if (keystate[SDLK_y])
+ doGPUDis = true;
+
+ // BLITTER single step
+ if (keystate[SDLK_F5])
+ blitterSingleStep = true;
+
+ if (keystate[SDLK_F6])
+ {
+ if (!bssHeld)
+ {
+ bssHeld = true;
+ bssGo = true;
+ }
+ }
+ else
+ bssHeld = false;
+#endif
+ // We need to ensure that illegal combinations are not possible.
+ // So, we do a simple minded way here...
+ // It would be better to check to see which one was pressed last
+ // and discard that one, but for now...
+//This didn't work... Was still able to do bad combination.
+//It's because the GUI is changing this *after* we fix it here.
+#if 0
+ if (joypad_0_buttons[BUTTON_R] && joypad_0_buttons[BUTTON_L])
+ joypad_0_buttons[BUTTON_L] = 0;
+
+ if (joypad_0_buttons[BUTTON_U] && joypad_0_buttons[BUTTON_D])
+ joypad_0_buttons[BUTTON_D] = 0;
+#endif
+
+ // Joystick support [nwagenaar]
+
+ if (vjs.useJoystick)
+ {
+ extern SDL_Joystick * joystick1;
+ int16 x = SDL_JoystickGetAxis(joystick1, 0),
+ y = SDL_JoystickGetAxis(joystick1, 1);
+
+ if (x > 16384)
+ joypad_0_buttons[BUTTON_R] = 0x01;
+ if (x < -16384)
+ joypad_0_buttons[BUTTON_L] = 0x01;
+ if (y > 16384)
+ joypad_0_buttons[BUTTON_D] = 0x01;
+ if (y < -16384)
+ joypad_0_buttons[BUTTON_U] = 0x01;
+
+ if (SDL_JoystickGetButton(joystick1, 0) == SDL_PRESSED)
+ joypad_0_buttons[BUTTON_A] = 0x01;
+ if (SDL_JoystickGetButton(joystick1, 1) == SDL_PRESSED)
+ joypad_0_buttons[BUTTON_B] = 0x01;
+ if (SDL_JoystickGetButton(joystick1, 2) == SDL_PRESSED)
+ joypad_0_buttons[BUTTON_C] = 0x01;
+ }
+
+ // Needed to ensure that the events queue is empty [nwagenaar]
+ SDL_PumpEvents();
+}
+
+void JoystickReset(void)
+{
+ memset(joystick_ram, 0x00, 4);
+ memset(joypad_0_buttons, 0, 21);
+ memset(joypad_1_buttons, 0, 21);
+}
+
+void JoystickDone(void)
+{
+}
+
+uint8 JoystickReadByte(uint32 offset)
+{
+#warning "No bounds checking done in JoystickReadByte!"
+// extern bool hardwareTypeNTSC;
+ offset &= 0x03;
+
+ if (offset == 0)
+ {
+ uint8 data = 0x00;
+ int pad0Index = joystick_ram[1] & 0x0F;
+ int pad1Index = (joystick_ram[1] >> 4) & 0x0F;
+
+// This is bad--we're assuming that a bit is set in the last case. Might not be so!
+// NOTE: values $7, B, D, & E are only legal ones for pad 0, (rows 3 to 0, in both cases)
+// $E, D, B, & 7 are only legal ones for pad 1
+// So the following code is WRONG!
+
+ if (!(pad0Index & 0x01))
+ pad0Index = 0;
+ else if (!(pad0Index & 0x02))
+ pad0Index = 1;
+ else if (!(pad0Index & 0x04))
+ pad0Index = 2;
+ else
+ pad0Index = 3;
+
+ if (!(pad1Index & 0x01))
+ pad1Index = 0;
+ else if (!(pad1Index & 0x02))
+ pad1Index = 1;
+ else if (!(pad1Index & 0x04))
+ pad1Index = 2;
+ else
+ pad1Index = 3;
+
+ if (joypad_0_buttons[(pad0Index << 2) + 0]) data |= 0x01;
+ if (joypad_0_buttons[(pad0Index << 2) + 1]) data |= 0x02;
+ if (joypad_0_buttons[(pad0Index << 2) + 2]) data |= 0x04;
+ if (joypad_0_buttons[(pad0Index << 2) + 3]) data |= 0x08;
+ if (joypad_1_buttons[(pad1Index << 2) + 0]) data |= 0x10;
+ if (joypad_1_buttons[(pad1Index << 2) + 1]) data |= 0x20;
+ if (joypad_1_buttons[(pad1Index << 2) + 2]) data |= 0x40;
+ if (joypad_1_buttons[(pad1Index << 2) + 3]) data |= 0x80;
+
+ return ~data;
+ }
+ else if (offset == 3)
+ {
+ // Hardware ID returns NTSC/PAL identification bit here
+ uint8 data = 0x2F | (vjs.hardwareTypeNTSC ? 0x10 : 0x00);
+ int pad0Index = joystick_ram[1] & 0x0F;
+//unused int pad1Index = (joystick_ram[1] >> 4) & 0x0F;
+
+//WTF is this shit?
+ if (!(pad0Index & 0x01))
+ {
+ if (joypad_0_buttons[BUTTON_PAUSE])
+ data ^= 0x01;
+ if (joypad_0_buttons[BUTTON_A])
+ data ^= 0x02;
+ }
+ else if (!(pad0Index & 0x02))
+ {
+ if (joypad_0_buttons[BUTTON_B])
+ data ^= 0x02;
+ }
+ else if (!(pad0Index & 0x04))
+ {
+ if (joypad_0_buttons[BUTTON_C])
+ data ^= 0x02;
+ }
+ else
+ {
+ if (joypad_0_buttons[BUTTON_OPTION])
+ data ^= 0x02;
+ }
+
+ return data;
+ }
+
+ return joystick_ram[offset];
+}
+
+uint16 JoystickReadWord(uint32 offset)
+{
+ return ((uint16)JoystickReadByte((offset + 0) & 0x03) << 8) | JoystickReadByte((offset + 1) & 0x03);
+}
+
+void JoystickWriteByte(uint32 offset, uint8 data)
+{
+ joystick_ram[offset & 0x03] = data;
+}
+
+void JoystickWriteWord(uint32 offset, uint16 data)
+{
+#warning "No bounds checking done for JoystickWriteWord!"
+ offset &= 0x03;
+ joystick_ram[offset + 0] = (data >> 8) & 0xFF;
+ joystick_ram[offset + 1] = data & 0xFF;
+}
diff --git a/src/jaguar/joystick.h b/src/jaguar/joystick.h
new file mode 100644
index 00000000..98eb9775
--- /dev/null
+++ b/src/jaguar/joystick.h
@@ -0,0 +1,46 @@
+//
+// Jaguar joystick handler
+//
+
+#ifndef __JOYSTICK_H__
+#define __JOYSTICK_H__
+
+#include "types.h"
+
+enum { BUTTON_FIRST = 0, BUTTON_U = 0,
+BUTTON_D = 1,
+BUTTON_L = 2,
+BUTTON_R = 3,
+
+BUTTON_s = 4,
+BUTTON_7 = 5,
+BUTTON_4 = 6,
+BUTTON_1 = 7,
+BUTTON_0 = 8,
+BUTTON_8 = 9,
+BUTTON_5 = 10,
+BUTTON_2 = 11,
+BUTTON_d = 12,
+BUTTON_9 = 13,
+BUTTON_6 = 14,
+BUTTON_3 = 15,
+
+BUTTON_A = 16,
+BUTTON_B = 17,
+BUTTON_C = 18,
+BUTTON_OPTION = 19,
+BUTTON_PAUSE = 20, BUTTON_LAST = 20 };
+
+void JoystickInit(void);
+void JoystickReset(void);
+void JoystickDone(void);
+void JoystickWriteByte(uint32, uint8);
+void JoystickWriteWord(uint32, uint16);
+uint8 JoystickReadByte(uint32);
+uint16 JoystickReadWord(uint32);
+void JoystickExec(void);
+
+extern bool keyBuffer[];
+extern uint8 joypad_0_buttons[];
+extern uint8 joypad_1_buttons[];
+#endif
diff --git a/src/jaguar/log.c b/src/jaguar/log.c
new file mode 100644
index 00000000..76c0aa98
--- /dev/null
+++ b/src/jaguar/log.c
@@ -0,0 +1,67 @@
+//
+// Log handler
+//
+// Originally by David Raingeard (Cal2)
+// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
+// Cleanups/new stuff by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+//
+
+#include "log.h"
+
+#include <stdlib.h>
+#include <stdarg.h>
+#include "types.h"
+
+#define MAX_LOG_SIZE 10000000 // Maximum size of log file (10 MB)
+
+static FILE * log_stream = NULL;
+static uint32 logSize = 0;
+
+int LogInit(const char * path)
+{
+ log_stream = fopen(path, "wrt");
+
+ if (log_stream == NULL)
+ return 0;
+
+ return 1;
+}
+
+FILE * LogGet(void)
+{
+ return log_stream;
+}
+
+void LogDone(void)
+{
+ fclose(log_stream);
+}
+
+//
+// This logger is used mainly to ensure that text gets written to the log file
+// even if the program crashes. The performance hit is acceptable in this case!
+//
+void WriteLog(const char * text, ...)
+{
+ va_list arg;
+
+ va_start(arg, text);
+ logSize += vfprintf(log_stream, text, arg);
+
+ if (logSize > MAX_LOG_SIZE)
+ {
+ fflush(log_stream);
+ fclose(log_stream);
+ exit(1);
+ }//*/
+
+ va_end(arg);
+ fflush(log_stream); // Make sure that text is written!
+}
diff --git a/src/jaguar/log.h b/src/jaguar/log.h
new file mode 100644
index 00000000..0bf9e092
--- /dev/null
+++ b/src/jaguar/log.h
@@ -0,0 +1,23 @@
+//
+// LOG.H
+//
+
+#ifndef __LOG_H__
+#define __LOG_H__
+
+#include <stdio.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int LogInit(const char *);
+FILE * LogGet(void);
+void LogDone(void);
+void WriteLog(const char * text, ...);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __LOG_H__
diff --git a/src/jaguar/memory.c b/src/jaguar/memory.c
new file mode 100644
index 00000000..c1b299a5
--- /dev/null
+++ b/src/jaguar/memory.c
@@ -0,0 +1,267 @@
+//
+// Jaguar memory and I/O physical (hosted!) memory
+//
+// by James L. Hammons
+//
+// JLH = James L. Hammons
+//
+// WHO WHEN WHAT
+// --- ---------- -----------------------------------------------------------
+// JLH 12/10/2009 Repurposed this file. :-)
+//
+
+/*
+$FFFFFF => 16,777,215
+$A00000 => 10,485,760
+
+Really, just six megabytes short of using the entire address space...
+Why not? We could just allocate the entire space and then use the MMU code to do
+things like call functions and whatnot...
+In other words, read/write would just tuck the value into the host RAM space and
+the I/O function would take care of any weird stuff...
+
+Actually: writes would tuck in the value, but reads would have to be handled
+correctly since some registers do not fall on the same address as far as reading
+goes... Still completely doable though. :-)
+*/
+
+#include "memory.h"
+
+uint8 jagMemSpace[0xF20000]; // The entire memory space of the Jaguar....!
+
+uint8 * jaguarMainRAM = &jagMemSpace[0x000000];
+uint8 * jaguarMainROM = &jagMemSpace[0x800000];
+uint8 * cdRAM = &jagMemSpace[0xDFFF00];
+uint8 * gpuRAM = &jagMemSpace[0xF03000];
+uint8 * dspRAM = &jagMemSpace[0xF1B000];
+
+uint8 jaguarBootROM[0x040000]; // 68K CPU BIOS ROM--uses only half of this!
+uint8 jaguarCDBootROM[0x040000]; // 68K CPU CD BIOS ROM (256K)
+
+
+#if 0
+union Word
+{
+ uint16 word;
+ struct {
+ // This changes depending on endianness...
+#ifdef __BIG_ENDIAN__
+ uint8 hi, lo; // Big endian
+#else
+ uint8 lo, hi; // Little endian
+#endif
+ };
+};
+#endif
+
+#if 0
+union DWord
+{
+ uint32 dword;
+ struct
+ {
+#ifdef __BIG_ENDIAN__
+ uint16 hiw, low;
+#else
+ uint16 low, hiw;
+#endif
+ };
+};
+#endif
+
+#if 0
+static void test(void)
+{
+ Word reg;
+ reg.word = 0x1234;
+ reg.lo = 0xFF;
+ reg.hi = 0xEE;
+
+ DWord reg2;
+ reg2.hiw = 0xFFFE;
+ reg2.low = 0x3322;
+ reg2.low.lo = 0x11;
+}
+#endif
+
+// OR, we could do like so:
+#if 0
+#ifdef __BIG_ENDIAN__
+#define DWORD_BYTE_HWORD_H 1
+#define DWORD_BYTE_HWORD_L 2
+#define DWORD_BYTE_LWORD_H 3
+#define DWORD_BYTE_LWORD_L 4
+#else
+#define DWORD_BYTE_HWORD_H 4
+#define DWORD_BYTE_HWORD_L 3
+#define DWORD_BYTE_LWORD_H 2
+#define DWORD_BYTE_LWORD_L 1
+#endif
+// But this starts to get cumbersome after a while... Is union really better?
+
+//More union stuff...
+unsigned long ByteSwap1 (unsigned long nLongNumber)
+{
+ union u {unsigned long vi; unsigned char c[sizeof(unsigned long)];};
+ union v {unsigned long ni; unsigned char d[sizeof(unsigned long)];};
+ union u un;
+ union v vn;
+ un.vi = nLongNumber;
+ vn.d[0]=un.c[3];
+ vn.d[1]=un.c[2];
+ vn.d[2]=un.c[1];
+ vn.d[3]=un.c[0];
+ return (vn.ni);
+}
+#endif
+
+//Not sure if this is a good approach yet...
+//should be if we use proper aliasing, and htonl and friends...
+#if 1
+uint32 & butch = *((uint32 *)&jagMemSpace[0xDFFF00]); // base of Butch == interrupt control register, R/W
+uint32 & dscntrl = *((uint32 *)&jagMemSpace[0xDFFF04]); // DSA control register, R/W
+uint16 & ds_data = *((uint16 *)&jagMemSpace[0xDFFF0A]); // DSA TX/RX data, R/W
+uint32 & i2cntrl = *((uint32 *)&jagMemSpace[0xDFFF10]); // i2s bus control register, R/W
+uint32 & sbcntrl = *((uint32 *)&jagMemSpace[0xDFFF14]); // CD subcode control register, R/W
+uint32 & subdata = *((uint32 *)&jagMemSpace[0xDFFF18]); // Subcode data register A
+uint32 & subdatb = *((uint32 *)&jagMemSpace[0xDFFF1C]); // Subcode data register B
+uint32 & sb_time = *((uint32 *)&jagMemSpace[0xDFFF20]); // Subcode time and compare enable (D24)
+uint32 & fifo_data = *((uint32 *)&jagMemSpace[0xDFFF24]); // i2s FIFO data
+uint32 & i2sdat2 = *((uint32 *)&jagMemSpace[0xDFFF28]); // i2s FIFO data (old)
+uint32 & unknown = *((uint32 *)&jagMemSpace[0xDFFF2C]); // Seems to be some sort of I2S interface
+#else
+uint32 butch, dscntrl, ds_data, i2cntrl, sbcntrl, subdata, subdatb, sb_time, fifo_data, i2sdat2, unknown;
+#endif
+
+#warning "Need to separate out this stuff (or do we???)"
+//if we use a contiguous memory space, we don't need this shit...
+//err, maybe we do, let's not be so hasty now... :-)
+
+//#define ENDIANSAFE(x) htonl(x)
+
+// The nice thing about doing it this way is that on big endian machines, htons/l
+// compile to nothing and on Intel machines, it compiles down to a single bswap instruction.
+// So endianness issues go away nicely without a lot of drama. :-D
+
+#define BSWAP16(x) (htons(x))
+#define BSWAP32(x) (htonl(x))
+//this isn't endian safe...
+#define BSWAP64(x) ((htonl(x & 0xFFFFFFFF) << 32) | htonl(x >> 32))
+// Actually, we use ESAFExx() macros instead of this, and we use GCC to check the endianness...
+
+uint16 & memcon1 = *((uint16 *)&jagMemSpace[0xF00000]);
+uint16 & memcon2 = *((uint16 *)&jagMemSpace[0xF00002]);
+uint16 & hc = *((uint16 *)&jagMemSpace[0xF00004]);
+uint16 & vc = *((uint16 *)&jagMemSpace[0xF00006]);
+uint16 & lph = *((uint16 *)&jagMemSpace[0xF00008]);
+uint16 & lpv = *((uint16 *)&jagMemSpace[0xF0000A]);
+uint64 & obData = *((uint64 *)&jagMemSpace[0xF00010]);
+uint32 & olp = *((uint32 *)&jagMemSpace[0xF00020]);
+uint16 & obf = *((uint16 *)&jagMemSpace[0xF00026]);
+uint16 & vmode = *((uint16 *)&jagMemSpace[0xF00028]);
+uint16 & bord1 = *((uint16 *)&jagMemSpace[0xF0002A]);
+uint16 & bord2 = *((uint16 *)&jagMemSpace[0xF0002C]);
+uint16 & hp = *((uint16 *)&jagMemSpace[0xF0002E]);
+uint16 & hbb = *((uint16 *)&jagMemSpace[0xF00030]);
+uint16 & hbe = *((uint16 *)&jagMemSpace[0xF00032]);
+uint16 & hs = *((uint16 *)&jagMemSpace[0xF00034]);
+uint16 & hvs = *((uint16 *)&jagMemSpace[0xF00036]);
+uint16 & hdb1 = *((uint16 *)&jagMemSpace[0xF00038]);
+uint16 & hdb2 = *((uint16 *)&jagMemSpace[0xF0003A]);
+uint16 & hde = *((uint16 *)&jagMemSpace[0xF0003C]);
+uint16 & vp = *((uint16 *)&jagMemSpace[0xF0003E]);
+uint16 & vbb = *((uint16 *)&jagMemSpace[0xF00040]);
+uint16 & vbe = *((uint16 *)&jagMemSpace[0xF00042]);
+uint16 & vs = *((uint16 *)&jagMemSpace[0xF00044]);
+uint16 & vdb = *((uint16 *)&jagMemSpace[0xF00046]);
+uint16 & vde = *((uint16 *)&jagMemSpace[0xF00048]);
+uint16 & veb = *((uint16 *)&jagMemSpace[0xF0004A]);
+uint16 & vee = *((uint16 *)&jagMemSpace[0xF0004C]);
+uint16 & vi = *((uint16 *)&jagMemSpace[0xF0004E]);
+uint16 & pit0 = *((uint16 *)&jagMemSpace[0xF00050]);
+uint16 & pit1 = *((uint16 *)&jagMemSpace[0xF00052]);
+uint16 & heq = *((uint16 *)&jagMemSpace[0xF00054]);
+uint32 & bg = *((uint32 *)&jagMemSpace[0xF00058]);
+uint16 & int1 = *((uint16 *)&jagMemSpace[0xF000E0]);
+uint16 & int2 = *((uint16 *)&jagMemSpace[0xF000E2]);
+uint8 * clut = (uint8 *) &jagMemSpace[0xF00400];
+uint8 * lbuf = (uint8 *) &jagMemSpace[0xF00800];
+uint32 & g_flags = *((uint32 *)&jagMemSpace[0xF02100]);
+uint32 & g_mtxc = *((uint32 *)&jagMemSpace[0xF02104]);
+uint32 & g_mtxa = *((uint32 *)&jagMemSpace[0xF02108]);
+uint32 & g_end = *((uint32 *)&jagMemSpace[0xF0210C]);
+uint32 & g_pc = *((uint32 *)&jagMemSpace[0xF02110]);
+uint32 & g_ctrl = *((uint32 *)&jagMemSpace[0xF02114]);
+uint32 & g_hidata = *((uint32 *)&jagMemSpace[0xF02118]);
+uint32 & g_divctrl = *((uint32 *)&jagMemSpace[0xF0211C]);
+uint32 g_remain; // Dual register with $F0211C
+uint32 & a1_base = *((uint32 *)&jagMemSpace[0xF02200]);
+uint32 & a1_flags = *((uint32 *)&jagMemSpace[0xF02204]);
+uint32 & a1_clip = *((uint32 *)&jagMemSpace[0xF02208]);
+uint32 & a1_pixel = *((uint32 *)&jagMemSpace[0xF0220C]);
+uint32 & a1_step = *((uint32 *)&jagMemSpace[0xF02210]);
+uint32 & a1_fstep = *((uint32 *)&jagMemSpace[0xF02214]);
+uint32 & a1_fpixel = *((uint32 *)&jagMemSpace[0xF02218]);
+uint32 & a1_inc = *((uint32 *)&jagMemSpace[0xF0221C]);
+uint32 & a1_finc = *((uint32 *)&jagMemSpace[0xF02220]);
+uint32 & a2_base = *((uint32 *)&jagMemSpace[0xF02224]);
+uint32 & a2_flags = *((uint32 *)&jagMemSpace[0xF02228]);
+uint32 & a2_mask = *((uint32 *)&jagMemSpace[0xF0222C]);
+uint32 & a2_pixel = *((uint32 *)&jagMemSpace[0xF02230]);
+uint32 & a2_step = *((uint32 *)&jagMemSpace[0xF02234]);
+uint32 & b_cmd = *((uint32 *)&jagMemSpace[0xF02238]);
+uint32 & b_count = *((uint32 *)&jagMemSpace[0xF0223C]);
+uint64 & b_srcd = *((uint64 *)&jagMemSpace[0xF02240]);
+uint64 & b_dstd = *((uint64 *)&jagMemSpace[0xF02248]);
+uint64 & b_dstz = *((uint64 *)&jagMemSpace[0xF02250]);
+uint64 & b_srcz1 = *((uint64 *)&jagMemSpace[0xF02258]);
+uint64 & b_srcz2 = *((uint64 *)&jagMemSpace[0xF02260]);
+uint64 & b_patd = *((uint64 *)&jagMemSpace[0xF02268]);
+uint32 & b_iinc = *((uint32 *)&jagMemSpace[0xF02270]);
+uint32 & b_zinc = *((uint32 *)&jagMemSpace[0xF02274]);
+uint32 & b_stop = *((uint32 *)&jagMemSpace[0xF02278]);
+uint32 & b_i3 = *((uint32 *)&jagMemSpace[0xF0227C]);
+uint32 & b_i2 = *((uint32 *)&jagMemSpace[0xF02280]);
+uint32 & b_i1 = *((uint32 *)&jagMemSpace[0xF02284]);
+uint32 & b_i0 = *((uint32 *)&jagMemSpace[0xF02288]);
+uint32 & b_z3 = *((uint32 *)&jagMemSpace[0xF0228C]);
+uint32 & b_z2 = *((uint32 *)&jagMemSpace[0xF02290]);
+uint32 & b_z1 = *((uint32 *)&jagMemSpace[0xF02294]);
+uint32 & b_z0 = *((uint32 *)&jagMemSpace[0xF02298]);
+uint16 & jpit1 = *((uint16 *)&jagMemSpace[0xF10000]);
+uint16 & jpit2 = *((uint16 *)&jagMemSpace[0xF10002]);
+uint16 & jpit3 = *((uint16 *)&jagMemSpace[0xF10004]);
+uint16 & jpit4 = *((uint16 *)&jagMemSpace[0xF10006]);
+uint16 & clk1 = *((uint16 *)&jagMemSpace[0xF10010]);
+uint16 & clk2 = *((uint16 *)&jagMemSpace[0xF10012]);
+uint16 & clk3 = *((uint16 *)&jagMemSpace[0xF10014]);
+uint16 & j_int = *((uint16 *)&jagMemSpace[0xF10020]);
+uint16 & asidata = *((uint16 *)&jagMemSpace[0xF10030]);
+uint16 & asictrl = *((uint16 *)&jagMemSpace[0xF10032]);
+uint16 asistat; // Dual register with $F10032
+uint16 & asiclk = *((uint16 *)&jagMemSpace[0xF10034]);
+uint16 & joystick = *((uint16 *)&jagMemSpace[0xF14000]);
+uint16 & joybuts = *((uint16 *)&jagMemSpace[0xF14002]);
+uint32 & d_flags = *((uint32 *)&jagMemSpace[0xF1A100]);
+uint32 & d_mtxc = *((uint32 *)&jagMemSpace[0xF1A104]);
+uint32 & d_mtxa = *((uint32 *)&jagMemSpace[0xF1A108]);
+uint32 & d_end = *((uint32 *)&jagMemSpace[0xF1A10C]);
+uint32 & d_pc = *((uint32 *)&jagMemSpace[0xF1A110]);
+uint32 & d_ctrl = *((uint32 *)&jagMemSpace[0xF1A114]);
+uint32 & d_mod = *((uint32 *)&jagMemSpace[0xF1A118]);
+uint32 & d_divctrl = *((uint32 *)&jagMemSpace[0xF1A11C]);
+uint32 d_remain; // Dual register with $F0211C
+uint32 & d_machi = *((uint32 *)&jagMemSpace[0xF1A120]);
+uint16 & ltxd = *((uint16 *)&jagMemSpace[0xF1A148]);
+uint16 lrxd; // Dual register with $F1A148
+uint16 & rtxd = *((uint16 *)&jagMemSpace[0xF1A14C]);
+uint16 rrxd; // Dual register with $F1A14C
+uint8 & sclk = *((uint8 *) &jagMemSpace[0xF1A150]);
+uint8 sstat; // Dual register with $F1A150
+uint32 & smode = *((uint32 *)&jagMemSpace[0xF1A154]);
+
+// Memory debugging identifiers
+
+const char * whoName[9] =
+ { "Unknown", "Jaguar", "DSP", "GPU", "TOM", "JERRY", "M68K", "Blitter", "OP" };
+
diff --git a/src/jaguar/memory.h b/src/jaguar/memory.h
new file mode 100644
index 00000000..e57dc84a
--- /dev/null
+++ b/src/jaguar/memory.h
@@ -0,0 +1,107 @@
+//
+// MEMORY.H: Header file
+//
+// All Jaguar related memory and I/O locations are contained in this file
+//
+
+#ifndef __MEMORY_H__
+#define __MEMORY_H__
+
+#include "types.h"
+
+extern uint8 jagMemSpace[];
+
+extern uint8 * jaguarMainRAM;
+extern uint8 * jaguarMainROM;
+extern uint8 jaguarBootROM[];
+extern uint8 jaguarCDBootROM[];
+extern uint8 * gpuRAM;
+extern uint8 * dspRAM;
+
+#if 1
+extern uint32 & butch, & dscntrl;
+extern uint16 & ds_data;
+extern uint32 & i2cntrl, & sbcntrl, & subdata, & subdatb, & sb_time, & fifo_data, & i2sdat2, & unknown;
+#else
+extern uint32 butch, dscntrl, ds_data, i2cntrl, sbcntrl, subdata, subdatb, sb_time, fifo_data, i2sdat2, unknown;
+#endif
+
+extern uint16 & memcon1, & memcon2, & hc, & vc, & lph, & lpv;
+extern uint64 & obData;
+extern uint32 & olp;
+extern uint16 & obf, & vmode, & bord1, & bord2, & hp, & hbb, & hbe, & hs,
+ & hvs, & hdb1, & hdb2, & hde, & vp, & vbb, & vbe, & vs, & vdb, & vde,
+ & veb, & vee, & vi, & pit0, & pit1, & heq;
+extern uint32 & bg;
+extern uint16 & int1, & int2;
+extern uint8 * clut, * lbuf;
+extern uint32 & g_flags, & g_mtxc, & g_mtxa, & g_end, & g_pc, & g_ctrl,
+ & g_hidata, & g_divctrl;
+extern uint32 g_remain;
+extern uint32 & a1_base, & a1_flags, & a1_clip, & a1_pixel, & a1_step,
+ & a1_fstep, & a1_fpixel, & a1_inc, & a1_finc, & a2_base, & a2_flags,
+ & a2_mask, & a2_pixel, & a2_step, & b_cmd, & b_count;
+extern uint64 & b_srcd, & b_dstd, & b_dstz, & b_srcz1, & b_srcz2, & b_patd;
+extern uint32 & b_iinc, & b_zinc, & b_stop, & b_i3, & b_i2, & b_i1, & b_i0, & b_z3,
+ & b_z2, & b_z1, & b_z0;
+extern uint16 & jpit1, & jpit2, & jpit3, & jpit4, & clk1, & clk2, & clk3, & j_int,
+ & asidata, & asictrl;
+extern uint16 asistat;
+extern uint16 & asiclk, & joystick, & joybuts;
+extern uint32 & d_flags, & d_mtxc, & d_mtxa, & d_end, & d_pc, & d_ctrl,
+ & d_mod, & d_divctrl;
+extern uint32 d_remain;
+extern uint32 & d_machi;
+extern uint16 & ltxd, lrxd, & rtxd, rrxd;
+extern uint8 & sclk, sstat;
+extern uint32 & smode;
+/*
+uint16 & ltxd = *((uint16 *)&jagMemSpace[0xF1A148]);
+uint16 lrxd; // Dual register with $F1A148
+uint16 & rtxd = *((uint16 *)&jagMemSpace[0xF1A14C]);
+uint16 rrxd; // Dual register with $F1A14C
+uint8 & sclk = *((uint8 *) &jagMemSpace[0xF1A150]);
+uint8 sstat; // Dual register with $F1A150
+uint32 & smode = *((uint32 *)&jagMemSpace[0xF1A154]);
+*/
+
+// Read/write tracing enumeration
+
+enum { UNKNOWN, JAGUAR, DSP, GPU, TOM, JERRY, M68K, BLITTER, OP };
+extern const char * whoName[9];
+
+// Some handy macros to help converting native endian to big endian (jaguar native)
+// & vice versa
+
+#define SET64(r, a, v) r[(a)] = ((v) & 0xFF00000000000000) >> 56, r[(a)+1] = ((v) & 0x00FF000000000000) >> 48, \
+ r[(a)+2] = ((v) & 0x0000FF0000000000) >> 40, r[(a)+3] = ((v) & 0x000000FF00000000) >> 32, \
+ r[(a)+4] = ((v) & 0xFF000000) >> 24, r[(a)+5] = ((v) & 0x00FF0000) >> 16, \
+ r[(a)+6] = ((v) & 0x0000FF00) >> 8, r[(a)+7] = (v) & 0x000000FF
+#define GET64(r, a) (((uint64)r[(a)] << 56) | ((uint64)r[(a)+1] << 48) | \
+ ((uint64)r[(a)+2] << 40) | ((uint64)r[(a)+3] << 32) | \
+ ((uint64)r[(a)+4] << 24) | ((uint64)r[(a)+5] << 16) | \
+ ((uint64)r[(a)+6] << 8) | (uint64)r[(a)+7])
+#define SET32(r, a, v) r[(a)] = ((v) & 0xFF000000) >> 24, r[(a)+1] = ((v) & 0x00FF0000) >> 16, \
+ r[(a)+2] = ((v) & 0x0000FF00) >> 8, r[(a)+3] = (v) & 0x000000FF
+#define GET32(r, a) ((r[(a)] << 24) | (r[(a)+1] << 16) | (r[(a)+2] << 8) | r[(a)+3])
+#define SET16(r, a, v) r[(a)] = ((v) & 0xFF00) >> 8, r[(a)+1] = (v) & 0xFF
+#define GET16(r, a) ((r[(a)] << 8) | r[(a)+1])
+
+// This is GCC specific, but we can fix that if we need to...
+// Big plus of this approach is that these compile down to single instructions on little
+// endian machines while one big endian machines we don't have any overhead. :-)
+
+#include <byteswap.h>
+#include <endian.h>
+
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+ #define ESAFE16(x) bswap_16(x)
+ #define ESAFE32(x) bswap_32(x)
+ #define ESAFE64(x) bswap_64(x)
+#else
+ #define ESAFE16(x) (x)
+ #define ESAFE32(x) (x)
+ #define ESAFE64(x) (x)
+#endif
+
+#endif // __MEMORY_H__
diff --git a/src/jaguar/objectp.c b/src/jaguar/objectp.c
new file mode 100644
index 00000000..555268e4
--- /dev/null
+++ b/src/jaguar/objectp.c
@@ -0,0 +1,1671 @@
+//
+// Object Processor
+//
+// Original source by David Raingeard (Cal2)
+// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
+// Extensive cleanups/fixes/rewrites by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+//
+
+#include "objectp.h"
+
+#include <stdlib.h>
+#include <string.h>
+#include "gpu.h"
+#include "jaguar.h"
+#include "log.h"
+#include "m68k.h"
+#include "memory.h"
+#include "tom.h"
+
+//#define OP_DEBUG
+//#define OP_DEBUG_BMP
+
+#define BLEND_Y(dst, src) op_blend_y[(((uint16)dst<<8)) | ((uint16)(src))]
+#define BLEND_CR(dst, src) op_blend_cr[(((uint16)dst)<<8) | ((uint16)(src))]
+
+#define OBJECT_TYPE_BITMAP 0 // 000
+#define OBJECT_TYPE_SCALE 1 // 001
+#define OBJECT_TYPE_GPU 2 // 010
+#define OBJECT_TYPE_BRANCH 3 // 011
+#define OBJECT_TYPE_STOP 4 // 100
+
+#define CONDITION_EQUAL 0
+#define CONDITION_LESS_THAN 1
+#define CONDITION_GREATER_THAN 2
+#define CONDITION_OP_FLAG_SET 3
+#define CONDITION_SECOND_HALF_LINE 4
+
+#define OPFLAG_RELEASE 8 // Bus release bit
+#define OPFLAG_TRANS 4 // Transparency bit
+#define OPFLAG_RMW 2 // Read-Modify-Write bit
+#define OPFLAG_REFLECT 1 // Horizontal mirror bit
+
+// Private function prototypes
+
+void OPProcessFixedBitmap(uint64 p0, uint64 p1, bool render);
+void OPProcessScaledBitmap(uint64 p0, uint64 p1, uint64 p2, bool render);
+void DumpScaledObject(uint64 p0, uint64 p1, uint64 p2);
+void DumpFixedObject(uint64 p0, uint64 p1);
+uint64 OPLoadPhrase(uint32 offset);
+
+// Local global variables
+
+// Blend tables (64K each)
+static uint8 op_blend_y[0x10000];
+static uint8 op_blend_cr[0x10000];
+// There may be a problem with this "RAM" overlapping (and thus being independent of)
+// some of the regular TOM RAM...
+//#warning objectp_ram is separated from TOM RAM--need to fix that!
+//static uint8 objectp_ram[0x40]; // This is based at $F00000
+uint8 objectp_running = 0;
+//bool objectp_stop_reading_list;
+
+static uint8 op_bitmap_bit_depth[8] = { 1, 2, 4, 8, 16, 24, 32, 0 };
+//static uint32 op_bitmap_bit_size[8] =
+// { (uint32)(0.125*65536), (uint32)(0.25*65536), (uint32)(0.5*65536), (uint32)(1*65536),
+// (uint32)(2*65536), (uint32)(1*65536), (uint32)(1*65536), (uint32)(1*65536) };
+static uint32 op_pointer;
+
+int32 phraseWidthToPixels[8] = { 64, 32, 16, 8, 4, 2, 0, 0 };
+
+
+//
+// Object Processor initialization
+//
+void OPInit(void)
+{
+ // Here we calculate the saturating blend of a signed 4-bit value and an
+ // existing Cyan/Red value as well as a signed 8-bit value and an existing intensity...
+ // Note: CRY is 4 bits Cyan, 4 bits Red, 16 bits intensitY
+ for(int i=0; i<256*256; i++)
+ {
+ int y = (i >> 8) & 0xFF;
+ int dy = (int8)i; // Sign extend the Y index
+ int c1 = (i >> 8) & 0x0F;
+ int dc1 = (int8)(i << 4) >> 4; // Sign extend the R index
+ int c2 = (i >> 12) & 0x0F;
+ int dc2 = (int8)(i & 0xF0) >> 4; // Sign extend the C index
+
+ y += dy;
+
+ if (y < 0)
+ y = 0;
+ else if (y > 0xFF)
+ y = 0xFF;
+
+ op_blend_y[i] = y;
+
+ c1 += dc1;
+
+ if (c1 < 0)
+ c1 = 0;
+ else if (c1 > 0x0F)
+ c1 = 0x0F;
+
+ c2 += dc2;
+
+ if (c2 < 0)
+ c2 = 0;
+ else if (c2 > 0x0F)
+ c2 = 0x0F;
+
+ op_blend_cr[i] = (c2 << 4) | c1;
+ }
+
+ OPReset();
+}
+
+//
+// Object Processor reset
+//
+void OPReset(void)
+{
+// memset(objectp_ram, 0x00, 0x40);
+ objectp_running = 0;
+}
+
+void OPDone(void)
+{
+ const char * opType[8] =
+ { "(BITMAP)", "(SCALED BITMAP)", "(GPU INT)", "(BRANCH)", "(STOP)", "???", "???", "???" };
+ const char * ccType[8] =
+ { "\"==\"", "\"<\"", "\">\"", "(opflag set)", "(second half line)", "?", "?", "?" };
+
+ uint32 olp = OPGetListPointer();
+ WriteLog("OP: OLP = %08X\n", olp);
+ WriteLog("OP: Phrase dump\n ----------\n");
+ for(uint32 i=0; i<0x100; i+=8)
+ {
+ uint32 hi = JaguarReadLong(olp + i, OP), lo = JaguarReadLong(olp + i + 4, OP);
+ WriteLog("\t%08X: %08X %08X %s", olp + i, hi, lo, opType[lo & 0x07]);
+ if ((lo & 0x07) == 3)
+ {
+ uint16 ypos = (lo >> 3) & 0x7FF;
+ uint8 cc = (lo >> 14) & 0x03;
+ uint32 link = ((hi << 11) | (lo >> 21)) & 0x3FFFF8;
+ WriteLog(" YPOS=%u, CC=%s, link=%08X", ypos, ccType[cc], link);
+ }
+ WriteLog("\n");
+ if ((lo & 0x07) == 0)
+ DumpFixedObject(OPLoadPhrase(olp+i), OPLoadPhrase(olp+i+8));
+ if ((lo & 0x07) == 1)
+ DumpScaledObject(OPLoadPhrase(olp+i), OPLoadPhrase(olp+i+8), OPLoadPhrase(olp+i+16));
+ }
+ WriteLog("\n");
+
+// memory_free(op_blend_y);
+// memory_free(op_blend_cr);
+}
+
+//
+// Object Processor memory access
+// Memory range: F00010 - F00027
+//
+// F00010-F00017 R xxxxxxxx xxxxxxxx OB - current object code from the graphics processor
+// F00020-F00023 W xxxxxxxx xxxxxxxx OLP - start of the object list
+// F00026 W -------- -------x OBF - object processor flag
+//
+
+#if 0
+uint8 OPReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ offset &= 0x3F;
+ return objectp_ram[offset];
+}
+
+uint16 OPReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+ offset &= 0x3F;
+ return GET16(objectp_ram, offset);
+}
+
+void OPWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
+{
+ offset &= 0x3F;
+ objectp_ram[offset] = data;
+}
+
+void OPWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
+{
+ offset &= 0x3F;
+ SET16(objectp_ram, offset, data);
+
+/*if (offset == 0x20)
+WriteLog("OP: Setting lo list pointer: %04X\n", data);
+if (offset == 0x22)
+WriteLog("OP: Setting hi list pointer: %04X\n", data);//*/
+}
+#endif
+
+uint32 OPGetListPointer(void)
+{
+ // Note: This register is LO / HI WORD, hence the funky look of this...
+ return GET16(tomRam8, 0x20) | (GET16(tomRam8, 0x22) << 16);
+}
+
+// This is WRONG, since the OBF is only 16 bits wide!!! [FIXED]
+
+uint32 OPGetStatusRegister(void)
+{
+ return GET16(tomRam8, 0x26);
+}
+
+// This is WRONG, since the OBF is only 16 bits wide!!! [FIXED]
+
+void OPSetStatusRegister(uint32 data)
+{
+ tomRam8[0x26] = (data & 0x0000FF00) >> 8;
+ tomRam8[0x27] |= (data & 0xFE);
+}
+
+void OPSetCurrentObject(uint64 object)
+{
+//Not sure this is right... Wouldn't it just be stored 64 bit BE?
+ // Stored as least significant 32 bits first, ms32 last in big endian
+/* objectp_ram[0x13] = object & 0xFF; object >>= 8;
+ objectp_ram[0x12] = object & 0xFF; object >>= 8;
+ objectp_ram[0x11] = object & 0xFF; object >>= 8;
+ objectp_ram[0x10] = object & 0xFF; object >>= 8;
+
+ objectp_ram[0x17] = object & 0xFF; object >>= 8;
+ objectp_ram[0x16] = object & 0xFF; object >>= 8;
+ objectp_ram[0x15] = object & 0xFF; object >>= 8;
+ objectp_ram[0x14] = object & 0xFF;*/
+// Let's try regular good old big endian...
+ tomRam8[0x17] = object & 0xFF; object >>= 8;
+ tomRam8[0x16] = object & 0xFF; object >>= 8;
+ tomRam8[0x15] = object & 0xFF; object >>= 8;
+ tomRam8[0x14] = object & 0xFF; object >>= 8;
+
+ tomRam8[0x13] = object & 0xFF; object >>= 8;
+ tomRam8[0x12] = object & 0xFF; object >>= 8;
+ tomRam8[0x11] = object & 0xFF; object >>= 8;
+ tomRam8[0x10] = object & 0xFF;
+}
+
+uint64 OPLoadPhrase(uint32 offset)
+{
+ offset &= ~0x07; // 8 byte alignment
+ return ((uint64)JaguarReadLong(offset, OP) << 32) | (uint64)JaguarReadLong(offset+4, OP);
+}
+
+void OPStorePhrase(uint32 offset, uint64 p)
+{
+ offset &= ~0x07; // 8 byte alignment
+ JaguarWriteLong(offset, p >> 32, OP);
+ JaguarWriteLong(offset + 4, p & 0xFFFFFFFF, OP);
+}
+
+//
+// Debugging routines
+//
+void DumpScaledObject(uint64 p0, uint64 p1, uint64 p2)
+{
+ WriteLog(" (SCALED BITMAP)");
+ WriteLog(" %08X --> phrase %08X %08X\n", op_pointer, (uint32)(p1>>32), (uint32)(p1&0xFFFFFFFF));
+ WriteLog(" %08X --> phrase %08X %08X ", op_pointer+8, (uint32)(p2>>32), (uint32)(p2&0xFFFFFFFF));
+ uint8 bitdepth = (p1 >> 12) & 0x07;
+//WAS: int16 ypos = ((p0 >> 3) & 0x3FF); // ??? What if not interlaced (/2)?
+ int16 ypos = ((p0 >> 3) & 0x7FF); // ??? What if not interlaced (/2)?
+ int32 xpos = p1 & 0xFFF;
+ xpos = (xpos & 0x800 ? xpos | 0xFFFFF000 : xpos);
+ uint32 iwidth = ((p1 >> 28) & 0x3FF);
+ uint32 dwidth = ((p1 >> 18) & 0x3FF); // Unsigned!
+ uint16 height = ((p0 >> 14) & 0x3FF);
+ uint32 link = ((p0 >> 24) & 0x7FFFF) << 3;
+ uint32 ptr = ((p0 >> 43) & 0x1FFFFF) << 3;
+ uint32 firstPix = (p1 >> 49) & 0x3F;
+ uint8 flags = (p1 >> 45) & 0x0F;
+ uint8 idx = (p1 >> 38) & 0x7F;
+ uint32 pitch = (p1 >> 15) & 0x07;
+ WriteLog("\n [%u (%u) x %u @ (%i, %u) (%u bpp), l: %08X, p: %08X fp: %02X, fl:%s%s%s%s, idx:%02X, pt:%02X]\n",
+ iwidth, dwidth, height, xpos, ypos, op_bitmap_bit_depth[bitdepth], link, ptr, firstPix, (flags&OPFLAG_REFLECT ? "REFLECT " : ""), (flags&OPFLAG_RMW ? "RMW " : ""), (flags&OPFLAG_TRANS ? "TRANS " : ""), (flags&OPFLAG_RELEASE ? "RELEASE" : ""), idx, pitch);
+ uint32 hscale = p2 & 0xFF;
+ uint32 vscale = (p2 >> 8) & 0xFF;
+ uint32 remainder = (p2 >> 16) & 0xFF;
+ WriteLog(" [hsc: %02X, vsc: %02X, rem: %02X]\n", hscale, vscale, remainder);
+}
+
+void DumpFixedObject(uint64 p0, uint64 p1)
+{
+ WriteLog(" (BITMAP)");
+ WriteLog(" %08X --> phrase %08X %08X\n", op_pointer, (uint32)(p1>>32), (uint32)(p1&0xFFFFFFFF));
+ uint8 bitdepth = (p1 >> 12) & 0x07;
+//WAS: int16 ypos = ((p0 >> 3) & 0x3FF); // ??? What if not interlaced (/2)?
+ int16 ypos = ((p0 >> 3) & 0x7FF); // ??? What if not interlaced (/2)?
+ int32 xpos = p1 & 0xFFF;
+ xpos = (xpos & 0x800 ? xpos | 0xFFFFF000 : xpos);
+ uint32 iwidth = ((p1 >> 28) & 0x3FF);
+ uint32 dwidth = ((p1 >> 18) & 0x3FF); // Unsigned!
+ uint16 height = ((p0 >> 14) & 0x3FF);
+ uint32 link = ((p0 >> 24) & 0x7FFFF) << 3;
+ uint32 ptr = ((p0 >> 43) & 0x1FFFFF) << 3;
+ uint32 firstPix = (p1 >> 49) & 0x3F;
+ uint8 flags = (p1 >> 45) & 0x0F;
+ uint8 idx = (p1 >> 38) & 0x7F;
+ uint32 pitch = (p1 >> 15) & 0x07;
+ WriteLog(" [%u (%u) x %u @ (%i, %u) (%u bpp), l: %08X, p: %08X fp: %02X, fl:%s%s%s%s, idx:%02X, pt:%02X]\n",
+ iwidth, dwidth, height, xpos, ypos, op_bitmap_bit_depth[bitdepth], link, ptr, firstPix, (flags&OPFLAG_REFLECT ? "REFLECT " : ""), (flags&OPFLAG_RMW ? "RMW " : ""), (flags&OPFLAG_TRANS ? "TRANS " : ""), (flags&OPFLAG_RELEASE ? "RELEASE" : ""), idx, pitch);
+}
+
+//
+// Object Processor main routine
+//
+//Need to fix this so that when an GPU object IRQ happens, we can pick up OP processing
+//where we left off. !!! FIX !!!
+#warning "Need to fix this so that when an GPU object IRQ happens, we can pick up OP processing where we left off. !!! FIX !!!"
+void OPProcessList(int scanline, bool render)
+{
+extern int op_start_log;
+// char * condition_to_str[8] =
+// { "==", "<", ">", "(opflag set)", "(second half line)", "?", "?", "?" };
+
+ op_pointer = OPGetListPointer();
+
+// objectp_stop_reading_list = false;
+
+//WriteLog("OP: Processing line #%u (OLP=%08X)...\n", scanline, op_pointer);
+//op_done();
+
+// *** BEGIN OP PROCESSOR TESTING ONLY ***
+extern bool interactiveMode;
+extern bool iToggle;
+extern int objectPtr;
+bool inhibit;
+int bitmapCounter = 0;
+// *** END OP PROCESSOR TESTING ONLY ***
+
+ uint32 opCyclesToRun = 10000; // This is a pulled-out-of-the-air value (will need to be fixed, obviously!)
+
+// if (op_pointer) WriteLog(" new op list at 0x%.8x scanline %i\n",op_pointer,scanline);
+ while (op_pointer)
+ {
+// *** BEGIN OP PROCESSOR TESTING ONLY ***
+if (interactiveMode && bitmapCounter == objectPtr)
+ inhibit = iToggle;
+else
+ inhibit = false;
+// *** END OP PROCESSOR TESTING ONLY ***
+// if (objectp_stop_reading_list)
+// return;
+
+ uint64 p0 = OPLoadPhrase(op_pointer);
+//WriteLog("\t%08X type %i\n", op_pointer, (uint8)p0 & 0x07);
+ op_pointer += 8;
+if (scanline == TOMGetVDB() && op_start_log)
+//if (scanline == 215 && op_start_log)
+//if (scanline == 28 && op_start_log)
+{
+WriteLog("%08X --> phrase %08X %08X", op_pointer - 8, (int)(p0>>32), (int)(p0&0xFFFFFFFF));
+if ((p0 & 0x07) == OBJECT_TYPE_BITMAP)
+{
+WriteLog(" (BITMAP) ");
+uint64 p1 = OPLoadPhrase(op_pointer);
+WriteLog("\n%08X --> phrase %08X %08X ", op_pointer, (int)(p1>>32), (int)(p1&0xFFFFFFFF));
+ uint8 bitdepth = (p1 >> 12) & 0x07;
+//WAS: int16 ypos = ((p0 >> 3) & 0x3FF); // ??? What if not interlaced (/2)?
+ int16 ypos = ((p0 >> 3) & 0x7FF); // ??? What if not interlaced (/2)?
+int32 xpos = p1 & 0xFFF;
+xpos = (xpos & 0x800 ? xpos | 0xFFFFF000 : xpos);
+ uint32 iwidth = ((p1 >> 28) & 0x3FF);
+ uint32 dwidth = ((p1 >> 18) & 0x3FF); // Unsigned!
+ uint16 height = ((p0 >> 14) & 0x3FF);
+ uint32 link = ((p0 >> 24) & 0x7FFFF) << 3;
+ uint32 ptr = ((p0 >> 43) & 0x1FFFFF) << 3;
+ uint32 firstPix = (p1 >> 49) & 0x3F;
+ uint8 flags = (p1 >> 45) & 0x0F;
+ uint8 idx = (p1 >> 38) & 0x7F;
+ uint32 pitch = (p1 >> 15) & 0x07;
+WriteLog("\n [%u (%u) x %u @ (%i, %u) (%u bpp), l: %08X, p: %08X fp: %02X, fl:%s%s%s%s, idx:%02X, pt:%02X]\n",
+ iwidth, dwidth, height, xpos, ypos, op_bitmap_bit_depth[bitdepth], link, ptr, firstPix, (flags&OPFLAG_REFLECT ? "REFLECT " : ""), (flags&OPFLAG_RMW ? "RMW " : ""), (flags&OPFLAG_TRANS ? "TRANS " : ""), (flags&OPFLAG_RELEASE ? "RELEASE" : ""), idx, pitch);
+}
+if ((p0 & 0x07) == OBJECT_TYPE_SCALE)
+{
+WriteLog(" (SCALED BITMAP)");
+uint64 p1 = OPLoadPhrase(op_pointer), p2 = OPLoadPhrase(op_pointer+8);
+WriteLog("\n%08X --> phrase %08X %08X ", op_pointer, (int)(p1>>32), (int)(p1&0xFFFFFFFF));
+WriteLog("\n%08X --> phrase %08X %08X ", op_pointer+8, (int)(p2>>32), (int)(p2&0xFFFFFFFF));
+ uint8 bitdepth = (p1 >> 12) & 0x07;
+//WAS: int16 ypos = ((p0 >> 3) & 0x3FF); // ??? What if not interlaced (/2)?
+ int16 ypos = ((p0 >> 3) & 0x7FF); // ??? What if not interlaced (/2)?
+int32 xpos = p1 & 0xFFF;
+xpos = (xpos & 0x800 ? xpos | 0xFFFFF000 : xpos);
+ uint32 iwidth = ((p1 >> 28) & 0x3FF);
+ uint32 dwidth = ((p1 >> 18) & 0x3FF); // Unsigned!
+ uint16 height = ((p0 >> 14) & 0x3FF);
+ uint32 link = ((p0 >> 24) & 0x7FFFF) << 3;
+ uint32 ptr = ((p0 >> 43) & 0x1FFFFF) << 3;
+ uint32 firstPix = (p1 >> 49) & 0x3F;
+ uint8 flags = (p1 >> 45) & 0x0F;
+ uint8 idx = (p1 >> 38) & 0x7F;
+ uint32 pitch = (p1 >> 15) & 0x07;
+WriteLog("\n [%u (%u) x %u @ (%i, %u) (%u bpp), l: %08X, p: %08X fp: %02X, fl:%s%s%s%s, idx:%02X, pt:%02X]\n",
+ iwidth, dwidth, height, xpos, ypos, op_bitmap_bit_depth[bitdepth], link, ptr, firstPix, (flags&OPFLAG_REFLECT ? "REFLECT " : ""), (flags&OPFLAG_RMW ? "RMW " : ""), (flags&OPFLAG_TRANS ? "TRANS " : ""), (flags&OPFLAG_RELEASE ? "RELEASE" : ""), idx, pitch);
+ uint32 hscale = p2 & 0xFF;
+ uint32 vscale = (p2 >> 8) & 0xFF;
+ uint32 remainder = (p2 >> 16) & 0xFF;
+WriteLog(" [hsc: %02X, vsc: %02X, rem: %02X]\n", hscale, vscale, remainder);
+}
+if ((p0 & 0x07) == OBJECT_TYPE_GPU)
+WriteLog(" (GPU)\n");
+if ((p0 & 0x07) == OBJECT_TYPE_BRANCH)
+{
+WriteLog(" (BRANCH)\n");
+uint8 * jaguarMainRam = GetRamPtr();
+WriteLog("[RAM] --> ");
+for(int k=0; k<8; k++)
+ WriteLog("%02X ", jaguarMainRam[op_pointer-8 + k]);
+WriteLog("\n");
+}
+if ((p0 & 0x07) == OBJECT_TYPE_STOP)
+WriteLog(" --> List end\n");
+}//*/
+
+ switch ((uint8)p0 & 0x07)
+ {
+ case OBJECT_TYPE_BITMAP:
+ {
+//WAS: uint16 ypos = (p0 >> 3) & 0x3FF;
+ uint16 ypos = (p0 >> 3) & 0x7FF;
+// This is only theory implied by Rayman...!
+// It seems that if the YPOS is zero, then bump the YPOS value so that it coincides with
+// the VDB value. With interlacing, this would be slightly more tricky.
+// There's probably another bit somewhere that enables this mode--but so far, doesn't seem
+// to affect any other game in a negative way (that I've seen).
+// Either that, or it's an undocumented bug...
+
+//No, the reason this was needed is that the OP code before was wrong. Any value
+//less than VDB will get written to the top line of the display!
+// if (ypos == 0)
+// ypos = TOMReadWord(0xF00046, OP) / 2; // Get the VDB value
+ uint32 height = (p0 & 0xFFC000) >> 14;
+ uint32 oldOPP = op_pointer - 8;
+// *** BEGIN OP PROCESSOR TESTING ONLY ***
+if (inhibit && op_start_log)
+ WriteLog("!!! ^^^ This object is INHIBITED! ^^^ !!!\n");
+bitmapCounter++;
+if (!inhibit) // For OP testing only!
+// *** END OP PROCESSOR TESTING ONLY ***
+ if (scanline >= ypos && height > 0)
+ {
+ uint64 p1 = OPLoadPhrase(op_pointer);
+ op_pointer += 8;
+//WriteLog("OP: Writing scanline %d with ypos == %d...\n", scanline, ypos);
+//WriteLog("--> Writing %u BPP bitmap...\n", op_bitmap_bit_depth[(p1 >> 12) & 0x07]);
+// OPProcessFixedBitmap(scanline, p0, p1, render);
+ OPProcessFixedBitmap(p0, p1, render);
+
+ // OP write-backs
+
+//???Does this really happen??? Doesn't seem to work if you do this...!
+//Probably not. Must be a bug in the documentation...!
+// uint32 link = (p0 & 0x7FFFF000000) >> 21;
+// SET16(tom_ram_8, 0x20, link & 0xFFFF); // OLP
+// SET16(tom_ram_8, 0x22, link >> 16);
+/* uint32 height = (p0 & 0xFFC000) >> 14;
+ if (height - 1 > 0)
+ height--;*/
+ // NOTE: Would subtract 2 if in interlaced mode...!
+// uint64 height = ((p0 & 0xFFC000) - 0x4000) & 0xFFC000;
+// if (height)
+ height--;
+
+ uint64 data = (p0 & 0xFFFFF80000000000LL) >> 40;
+ uint64 dwidth = (p1 & 0xFFC0000) >> 15;
+ data += dwidth;
+
+ p0 &= ~0xFFFFF80000FFC000LL; // Mask out old data...
+ p0 |= (uint64)height << 14;
+ p0 |= data << 40;
+ OPStorePhrase(oldOPP, p0);
+ }
+//WriteLog("\t\tOld OP: %08X -> ", op_pointer);
+//Temp, for testing...
+//No doubt, this type of check will break all kinds of stuff... !!! FIX !!!
+//And it does! !!! FIX !!!
+//Let's remove this "fix" since it screws up more than it fixes.
+/* if (op_pointer > ((p0 & 0x000007FFFF000000LL) >> 21))
+ return;*/
+
+ op_pointer = (p0 & 0x000007FFFF000000LL) >> 21;
+//WriteLog("New OP: %08X\n", op_pointer);
+ break;
+ }
+ case OBJECT_TYPE_SCALE:
+ {
+//WAS: uint16 ypos = (p0 >> 3) & 0x3FF;
+ uint16 ypos = (p0 >> 3) & 0x7FF;
+ uint32 height = (p0 & 0xFFC000) >> 14;
+ uint32 oldOPP = op_pointer - 8;
+// *** BEGIN OP PROCESSOR TESTING ONLY ***
+if (inhibit && op_start_log)
+{
+ WriteLog("!!! ^^^ This object is INHIBITED! ^^^ !!! (scanline=%u, ypos=%u, height=%u)\n", scanline, ypos, height);
+ DumpScaledObject(p0, OPLoadPhrase(op_pointer), OPLoadPhrase(op_pointer+8));
+}
+bitmapCounter++;
+if (!inhibit) // For OP testing only!
+// *** END OP PROCESSOR TESTING ONLY ***
+ if (scanline >= ypos && height > 0)
+ {
+ uint64 p1 = OPLoadPhrase(op_pointer);
+ op_pointer += 8;
+ uint64 p2 = OPLoadPhrase(op_pointer);
+ op_pointer += 8;
+//WriteLog("OP: %08X (%d) %08X%08X %08X%08X %08X%08X\n", oldOPP, scanline, (uint32)(p0>>32), (uint32)(p0&0xFFFFFFFF), (uint32)(p1>>32), (uint32)(p1&0xFFFFFFFF), (uint32)(p2>>32), (uint32)(p2&0xFFFFFFFF));
+ OPProcessScaledBitmap(p0, p1, p2, render);
+
+ // OP write-backs
+
+ uint16 remainder = (p2 >> 16) & 0xFF;//, vscale = p2 >> 8;
+ uint8 /*remainder = p2 >> 16,*/ vscale = p2 >> 8;
+//Actually, we should skip this object if it has a vscale of zero.
+//Or do we? Not sure... Atari Karts has a few lines that look like:
+// (SCALED BITMAP)
+//000E8268 --> phrase 00010000 7000B00D
+// [7 (0) x 1 @ (13, 0) (8 bpp), l: 000E82A0, p: 000E0FC0 fp: 00, fl:RELEASE, idx:00, pt:01]
+// [hsc: 9A, vsc: 00, rem: 00]
+// Could it be the vscale is overridden if the DWIDTH is zero? Hmm...
+
+ if (vscale == 0)
+ vscale = 0x20; // OP bug??? Nope, it isn't...! Or is it?
+
+//extern int start_logging;
+//if (start_logging)
+// WriteLog("--> Returned from scaled bitmap processing (rem=%02X, vscale=%02X)...\n", remainder, vscale);//*/
+//Locks up here:
+//--> Returned from scaled bitmap processing (rem=20, vscale=80)...
+//There are other problems here, it looks like...
+//Another lock up:
+//About to execute OP (508)...
+/*
+OP: Scaled bitmap 4x? 4bpp at 38,? hscale=7C fpix=0 data=00075E28 pitch 1 hflipped=no dwidth=? (linked to 00071118) Transluency=no
+--> Returned from scaled bitmap processing (rem=50, vscale=7C)...
+OP: Scaled bitmap 4x? 4bpp at 38,? hscale=7C fpix=0 data=00075E28 pitch 1 hflipped=no dwidth=? (linked to 00071118) Transluency=no
+--> Returned from scaled bitmap processing (rem=30, vscale=7C)...
+OP: Scaled bitmap 4x? 4bpp at 38,? hscale=7C fpix=0 data=00075E28 pitch 1 hflipped=no dwidth=? (linked to 00071118) Transluency=no
+--> Returned from scaled bitmap processing (rem=10, vscale=7C)...
+OP: Scaled bitmap 4x? 4bpp at 36,? hscale=7E fpix=0 data=000756A8 pitch 1 hflipped=no dwidth=? (linked to 00073058) Transluency=no
+--> Returned from scaled bitmap processing (rem=00, vscale=7E)...
+OP: Scaled bitmap 4x? 4bpp at 34,? hscale=80 fpix=0 data=000756C8 pitch 1 hflipped=no dwidth=? (linked to 00073078) Transluency=no
+--> Returned from scaled bitmap processing (rem=00, vscale=80)...
+OP: Scaled bitmap 4x? 4bpp at 36,? hscale=7E fpix=0 data=000756C8 pitch 1 hflipped=no dwidth=? (linked to 00073058) Transluency=no
+--> Returned from scaled bitmap processing (rem=5E, vscale=7E)...
+OP: Scaled bitmap 4x? 4bpp at 34,? hscale=80 fpix=0 data=000756E8 pitch 1 hflipped=no dwidth=? (linked to 00073078) Transluency=no
+--> Returned from scaled bitmap processing (rem=60, vscale=80)...
+OP: Scaled bitmap 4x? 4bpp at 36,? hscale=7E fpix=0 data=000756C8 pitch 1 hflipped=no dwidth=? (linked to 00073058) Transluency=no
+--> Returned from scaled bitmap processing (rem=3E, vscale=7E)...
+OP: Scaled bitmap 4x? 4bpp at 34,? hscale=80 fpix=0 data=000756E8 pitch 1 hflipped=no dwidth=? (linked to 00073078) Transluency=no
+--> Returned from scaled bitmap processing (rem=40, vscale=80)...
+OP: Scaled bitmap 4x? 4bpp at 36,? hscale=7E fpix=0 data=000756C8 pitch 1 hflipped=no dwidth=? (linked to 00073058) Transluency=no
+--> Returned from scaled bitmap processing (rem=1E, vscale=7E)...
+OP: Scaled bitmap 4x? 4bpp at 34,? hscale=80 fpix=0 data=000756E8 pitch 1 hflipped=no dwidth=? (linked to 00073078) Transluency=no
+--> Returned from scaled bitmap processing (rem=20, vscale=80)...
+*/
+//Here's another problem:
+// [hsc: 20, vsc: 20, rem: 00]
+// Since we're not checking for $E0 (but that's what we get from the above), we end
+// up repeating this scanline unnecessarily... !!! FIX !!! [DONE, but... still not quite
+// right. Either that, or the Accolade team that wrote Bubsy screwed up royal.]
+//Also note: $E0 = 7.0 which IS a legal vscale value...
+
+// if (remainder & 0x80) // I.e., it's negative
+// if ((remainder & 0x80) || remainder == 0) // I.e., it's <= 0
+// if ((remainder - 1) >= 0xE0) // I.e., it's <= 0
+// if ((remainder >= 0xE1) || remainder == 0)// I.e., it's <= 0
+// if ((remainder >= 0xE1 && remainder <= 0xFF) || remainder == 0)// I.e., it's <= 0
+ if (remainder < 0x20)
+ {
+ uint64 data = (p0 & 0xFFFFF80000000000LL) >> 40;
+ uint64 dwidth = (p1 & 0xFFC0000) >> 15;
+
+// while (remainder & 0x80)
+// while ((remainder & 0x80) || remainder == 0)
+// while ((remainder - 1) >= 0xE0)
+// while ((remainder >= 0xE1) || remainder == 0)
+// while ((remainder >= 0xE1 && remainder <= 0xFF) || remainder == 0)
+ while (remainder < 0x20)
+ {
+ remainder += vscale;
+
+ if (height)
+ height--;
+
+ data += dwidth;
+ }
+
+ p0 &= ~0xFFFFF80000FFC000LL; // Mask out old data...
+ p0 |= (uint64)height << 14;
+ p0 |= data << 40;
+ OPStorePhrase(oldOPP, p0);
+ }
+
+ remainder -= 0x20; // 1.0f in [3.5] fixed point format
+
+//if (start_logging)
+// WriteLog("--> Finished writebacks...\n");//*/
+
+//WriteLog(" [%08X%08X -> ", (uint32)(p2>>32), (uint32)(p2&0xFFFFFFFF));
+ p2 &= ~0x0000000000FF0000LL;
+ p2 |= (uint64)remainder << 16;
+//WriteLog("%08X%08X]\n", (uint32)(p2>>32), (uint32)(p2&0xFFFFFFFF));
+ OPStorePhrase(oldOPP+16, p2);
+//remainder = (uint8)(p2 >> 16), vscale = (uint8)(p2 >> 8);
+//WriteLog(" [after]: rem=%02X, vscale=%02X\n", remainder, vscale);
+ }
+ op_pointer = (p0 & 0x000007FFFF000000LL) >> 21;
+ break;
+ }
+ case OBJECT_TYPE_GPU:
+ {
+//WriteLog("OP: Asserting GPU IRQ #3...\n");
+#warning "Need to fix OP GPU IRQ handling! !!! FIX !!!"
+ OPSetCurrentObject(p0);
+ GPUSetIRQLine(3, ASSERT_LINE);
+//Also, OP processing is suspended from this point until OBF (F00026) is written to...
+// !!! FIX !!!
+//Do something like:
+//OPSuspendedByGPU = true;
+//Dunno if the OP keeps processing from where it was interrupted, or if it just continues
+//on the next scanline...
+// --> It continues from where it was interrupted! !!! FIX !!!
+ break;
+ }
+ case OBJECT_TYPE_BRANCH:
+ {
+ uint16 ypos = (p0 >> 3) & 0x7FF;
+ uint8 cc = (p0 >> 14) & 0x03;
+ uint32 link = (p0 >> 21) & 0x3FFFF8;
+
+// if ((ypos!=507)&&(ypos!=25))
+// WriteLog("\t%i%s%i link=0x%.8x\n",scanline,condition_to_str[cc],ypos>>1,link);
+ switch (cc)
+ {
+ case CONDITION_EQUAL:
+ if (TOMReadWord(0xF00006, OP) == ypos || ypos == 0x7FF)
+ op_pointer = link;
+ break;
+ case CONDITION_LESS_THAN:
+ if (TOMReadWord(0xF00006, OP) < ypos)
+ op_pointer = link;
+ break;
+ case CONDITION_GREATER_THAN:
+ if (TOMReadWord(0xF00006, OP) > ypos)
+ op_pointer = link;
+ break;
+ case CONDITION_OP_FLAG_SET:
+ if (OPGetStatusRegister() & 0x01)
+ op_pointer = link;
+ break;
+ case CONDITION_SECOND_HALF_LINE:
+ // This basically means branch if bit 10 of HC is set
+#warning "Unhandled condition code causes emulator to crash... !!! FIX !!!"
+ WriteLog("OP: Unexpected CONDITION_SECOND_HALF_LINE in BRANCH object\nOP: shuting down\n");
+ LogDone();
+ exit(0);
+ break;
+ default:
+ WriteLog("OP: Unimplemented branch condition %i\n", cc);
+ }
+ break;
+ }
+ case OBJECT_TYPE_STOP:
+ {
+//op_start_log = 0;
+ // unsure
+//WriteLog("OP: --> STOP\n");
+// op_set_status_register(((p0>>3) & 0xFFFFFFFF));
+//This seems more likely...
+ OPSetCurrentObject(p0);
+
+ if (p0 & 0x08)
+ {
+ TOMSetPendingObjectInt();
+ if (TOMIRQEnabled(IRQ_OPFLAG))// && jaguar_interrupt_handler_is_valid(64))
+ m68k_set_irq(7); // Cause an NMI to occur...
+ }
+
+ return;
+// break;
+ }
+ default:
+ WriteLog("op: unknown object type %i\n", ((uint8)p0 & 0x07));
+ return;
+ }
+
+ // Here is a little sanity check to keep the OP from locking up the machine
+ // when fed bad data. Better would be to count how many actual cycles it used
+ // and bail out/reenter to properly simulate an overloaded OP... !!! FIX !!!
+#warning "Better would be to count how many actual cycles it used and bail out/reenter to properly simulate an overloaded OP... !!! FIX !!!"
+ opCyclesToRun--;
+ if (!opCyclesToRun)
+ return;
+ }
+}
+
+//
+// Store fixed size bitmap in line buffer
+//
+void OPProcessFixedBitmap(uint64 p0, uint64 p1, bool render)
+{
+// Need to make sure that when writing that it stays within the line buffer...
+// LBUF ($F01800 - $F01D9E) 360 x 32-bit RAM
+ uint8 depth = (p1 >> 12) & 0x07; // Color depth of image
+ int32 xpos = ((int16)((p1 << 4) & 0xFFFF)) >> 4;// Image xpos in LBUF
+ uint32 iwidth = (p1 >> 28) & 0x3FF; // Image width in *phrases*
+ uint32 data = (p0 >> 40) & 0xFFFFF8; // Pixel data address
+//#ifdef OP_DEBUG_BMP
+ uint32 firstPix = (p1 >> 49) & 0x3F;
+ // "The LSB is significant only for scaled objects..." -JTRM
+ // "In 1 BPP mode, all five bits are significant. In 2 BPP mode, the top four are significant..."
+ firstPix &= 0x3E;
+//#endif
+// We can ignore the RELEASE (high order) bit for now--probably forever...!
+// uint8 flags = (p1 >> 45) & 0x0F; // REFLECT, RMW, TRANS, RELEASE
+//Optimize: break these out to their own BOOL values
+ uint8 flags = (p1 >> 45) & 0x07; // REFLECT (0), RMW (1), TRANS (2)
+ bool flagREFLECT = (flags & OPFLAG_REFLECT ? true : false),
+ flagRMW = (flags & OPFLAG_RMW ? true : false),
+ flagTRANS = (flags & OPFLAG_TRANS ? true : false);
+// "For images with 1 to 4 bits/pixel the top 7 to 4 bits of the index
+// provide the most significant bits of the palette address."
+ uint8 index = (p1 >> 37) & 0xFE; // CLUT index offset (upper pix, 1-4 bpp)
+ uint32 pitch = (p1 >> 15) & 0x07; // Phrase pitch
+ pitch <<= 3; // Optimization: Multiply pitch by 8
+
+// int16 scanlineWidth = tom_getVideoModeWidth();
+ uint8 * tomRam8 = TOMGetRamPointer();
+ uint8 * paletteRAM = &tomRam8[0x400];
+ // This is OK as long as it's used correctly: For 16-bit RAM to RAM direct copies--NOT
+ // for use when using endian-corrected data (i.e., any of the *_word_read functions!)
+ uint16 * paletteRAM16 = (uint16 *)paletteRAM;
+
+// WriteLog("bitmap %ix? %ibpp at %i,? firstpix=? data=0x%.8x pitch %i hflipped=%s dwidth=? (linked to ?) RMW=%s Tranparent=%s\n",
+// iwidth, op_bitmap_bit_depth[bitdepth], xpos, ptr, pitch, (flags&OPFLAG_REFLECT ? "yes" : "no"), (flags&OPFLAG_RMW ? "yes" : "no"), (flags&OPFLAG_TRANS ? "yes" : "no"));
+
+// Is it OK to have a 0 for the data width??? (i.e., undocumented?)
+// Seems to be... Seems that dwidth *can* be zero (i.e., reuse same line) as well.
+// Pitch == 0 is OK too...
+// if (!render || op_pointer == 0 || ptr == 0 || pitch == 0)
+//I'm not convinced that we need to concern ourselves with data & op_pointer here either!
+ if (!render || iwidth == 0)
+ return;
+
+//#define OP_DEBUG_BMP
+//#ifdef OP_DEBUG_BMP
+// WriteLog("bitmap %ix%i %ibpp at %i,%i firstpix=%i data=0x%.8x pitch %i hflipped=%s dwidth=%i (linked to 0x%.8x) Transluency=%s\n",
+// iwidth, height, op_bitmap_bit_depth[bitdepth], xpos, ypos, firstPix, ptr, pitch, (flags&OPFLAG_REFLECT ? "yes" : "no"), dwidth, op_pointer, (flags&OPFLAG_RMW ? "yes" : "no"));
+//#endif
+
+// int32 leftMargin = xpos, rightMargin = (xpos + (phraseWidthToPixels[depth] * iwidth)) - 1;
+ int32 startPos = xpos, endPos = xpos +
+ (!flagREFLECT ? (phraseWidthToPixels[depth] * iwidth) - 1
+ : -((phraseWidthToPixels[depth] * iwidth) + 1));
+ uint32 clippedWidth = 0, phraseClippedWidth = 0, dataClippedWidth = 0;//, phrasePixel = 0;
+ bool in24BPPMode = (((GET16(tomRam8, 0x0028) >> 1) & 0x03) == 1 ? true : false); // VMODE
+ // Not sure if this is Jaguar Two only location or what...
+ // From the docs, it is... If we want to limit here we should think of something else.
+// int32 limit = GET16(tom_ram_8, 0x0008); // LIMIT
+ int32 limit = 720;
+ int32 lbufWidth = (!in24BPPMode ? limit - 1 : (limit / 2) - 1); // Zero based limit...
+
+ // If the image is completely to the left or right of the line buffer, then bail.
+//If in REFLECT mode, then these values are swapped! !!! FIX !!! [DONE]
+//There are four possibilities:
+// 1. image sits on left edge and no REFLECT; starts out of bounds but ends in bounds.
+// 2. image sits on left edge and REFLECT; starts in bounds but ends out of bounds.
+// 3. image sits on right edge and REFLECT; starts out of bounds but ends in bounds.
+// 4. image sits on right edge and no REFLECT; starts in bounds but ends out of bounds.
+//Numbers 2 & 4 can be caught by checking the LBUF clip while in the inner loop,
+// numbers 1 & 3 are of concern.
+// This *indirectly* handles only cases 2 & 4! And is WRONG is REFLECT is set...!
+// if (rightMargin < 0 || leftMargin > lbufWidth)
+
+// It might be easier to swap these (if REFLECTed) and just use XPOS down below...
+// That way, you could simply set XPOS to leftMargin if !REFLECT and to rightMargin otherwise.
+// Still have to be careful with the DATA and IWIDTH values though...
+
+// if ((!flagREFLECT && (rightMargin < 0 || leftMargin > lbufWidth))
+// || (flagREFLECT && (leftMargin < 0 || rightMargin > lbufWidth)))
+// return;
+ if ((!flagREFLECT && (endPos < 0 || startPos > lbufWidth))
+ || (flagREFLECT && (startPos < 0 || endPos > lbufWidth)))
+ return;
+
+ // Otherwise, find the clip limits and clip the phrase as well...
+ // NOTE: I'm fudging here by letting the actual blit overstep the bounds of the
+ // line buffer, but it shouldn't matter since there are two unused line
+ // buffers below and nothing above and I'll at most write 8 bytes outside
+ // the line buffer... I could use a fractional clip begin/end value, but
+ // this makes the blit a *lot* more hairy. I might fix this in the future
+ // if it becomes necessary. (JLH)
+ // Probably wouldn't be *that* hairy. Just use a delta that tells the inner loop
+ // which pixel in the phrase is being written, and quit when either end of phrases
+ // is reached or line buffer extents are surpassed.
+
+//This stuff is probably wrong as well... !!! FIX !!!
+//The strange thing is that it seems to work, but that's no guarantee that it's bulletproof!
+//Yup. Seems that JagMania doesn't work correctly with this...
+//Dunno if this is the problem, but Atari Karts is showing *some* of the road now...
+// if (!flagREFLECT)
+
+/*
+ if (leftMargin < 0)
+ clippedWidth = 0 - leftMargin,
+ phraseClippedWidth = clippedWidth / phraseWidthToPixels[depth],
+ leftMargin = 0 - (clippedWidth % phraseWidthToPixels[depth]);
+// leftMargin = 0;
+
+ if (rightMargin > lbufWidth)
+ clippedWidth = rightMargin - lbufWidth,
+ phraseClippedWidth = clippedWidth / phraseWidthToPixels[depth];//,
+// rightMargin = lbufWidth + (clippedWidth % phraseWidthToPixels[depth]);
+// rightMargin = lbufWidth;
+*/
+if (depth > 5)
+ WriteLog("OP: We're about to encounter a divide by zero error!\n");
+ // NOTE: We're just using endPos to figure out how much, if any, to clip by.
+ // ALSO: There may be another case where we start out of bounds and end out of bounds...!
+ // !!! FIX !!!
+ if (startPos < 0) // Case #1: Begin out, end in, L to R
+ clippedWidth = 0 - startPos,
+ dataClippedWidth = phraseClippedWidth = clippedWidth / phraseWidthToPixels[depth],
+ startPos = 0 - (clippedWidth % phraseWidthToPixels[depth]);
+
+ if (endPos < 0) // Case #2: Begin in, end out, R to L
+ clippedWidth = 0 - endPos,
+ phraseClippedWidth = clippedWidth / phraseWidthToPixels[depth];
+
+ if (endPos > lbufWidth) // Case #3: Begin in, end out, L to R
+ clippedWidth = endPos - lbufWidth,
+ phraseClippedWidth = clippedWidth / phraseWidthToPixels[depth];
+
+ if (startPos > lbufWidth) // Case #4: Begin out, end in, R to L
+ clippedWidth = startPos - lbufWidth,
+ dataClippedWidth = phraseClippedWidth = clippedWidth / phraseWidthToPixels[depth],
+ startPos = lbufWidth + (clippedWidth % phraseWidthToPixels[depth]);
+
+ // If the image is sitting on the line buffer left or right edge, we need to compensate
+ // by decreasing the image phrase width accordingly.
+ iwidth -= phraseClippedWidth;
+
+ // Also, if we're clipping the phrase we need to make sure we're in the correct part of
+ // the pixel data.
+// data += phraseClippedWidth * (pitch << 3);
+ data += dataClippedWidth * pitch;
+
+ // NOTE: When the bitmap is in REFLECT mode, the XPOS marks the *right* side of the
+ // bitmap! This makes clipping & etc. MUCH, much easier...!
+// uint32 lbufAddress = 0x1800 + (!in24BPPMode ? leftMargin * 2 : leftMargin * 4);
+//Why does this work right when multiplying startPos by 2 (instead of 4) for 24 BPP mode?
+//Is this a bug in the OP?
+ uint32 lbufAddress = 0x1800 + (!in24BPPMode ? startPos * 2 : startPos * 2);
+ uint8 * currentLineBuffer = &tomRam8[lbufAddress];
+
+ // Render.
+
+// Hmm. We check above for 24 BPP mode, but don't do anything about it below...
+// If we *were* in 24 BPP mode, how would you convert CRY to RGB24? Seems to me
+// that if you're in CRY mode then you wouldn't be able to use 24 BPP bitmaps
+// anyway.
+// This seems to be the case (at least according to the Midsummer docs)...!
+
+ if (depth == 0) // 1 BPP
+ {
+ // The LSB of flags is OPFLAG_REFLECT, so sign extend it and or 2 into it.
+ int32 lbufDelta = ((int8)((flags << 7) & 0xFF) >> 5) | 0x02;
+
+ // Fetch 1st phrase...
+ uint64 pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+//Note that firstPix should only be honored *if* we start with the 1st phrase of the bitmap
+//i.e., we didn't clip on the margin... !!! FIX !!!
+ pixels <<= firstPix; // Skip first N pixels (N=firstPix)...
+ int i = firstPix; // Start counter at right spot...
+
+ while (iwidth--)
+ {
+ while (i++ < 64)
+ {
+ uint8 bit = pixels >> 63;
+ if (flagTRANS && bit == 0)
+ ; // Do nothing...
+ else
+ {
+ if (!flagRMW)
+//Optimize: Set palleteRAM16 to beginning of palette RAM + index*2 and use only [bit] as index...
+//Won't optimize RMW case though...
+ // This is the *only* correct use of endian-dependent code
+ // (i.e., mem-to-mem direct copying)!
+ *(uint16 *)currentLineBuffer = paletteRAM16[index | bit];
+ else
+ *currentLineBuffer =
+ BLEND_CR(*currentLineBuffer, paletteRAM[(index | bit) << 1]),
+ *(currentLineBuffer + 1) =
+ BLEND_Y(*(currentLineBuffer + 1), paletteRAM[((index | bit) << 1) + 1]);
+ }
+
+ currentLineBuffer += lbufDelta;
+ pixels <<= 1;
+ }
+ i = 0;
+ // Fetch next phrase...
+ data += pitch;
+ pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+ }
+ }
+ else if (depth == 1) // 2 BPP
+ {
+if (firstPix)
+ WriteLog("OP: Fixed bitmap @ 2 BPP requesting FIRSTPIX! (fp=%u)\n", firstPix);
+ index &= 0xFC; // Top six bits form CLUT index
+ // The LSB is OPFLAG_REFLECT, so sign extend it and or 2 into it.
+ int32 lbufDelta = ((int8)((flags << 7) & 0xFF) >> 5) | 0x02;
+
+ while (iwidth--)
+ {
+ // Fetch phrase...
+ uint64 pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+ data += pitch;
+
+ for(int i=0; i<32; i++)
+ {
+ uint8 bits = pixels >> 62;
+// Seems to me that both of these are in the same endian, so we could cast it as
+// uint16 * and do straight across copies (what about 24 bpp? Treat it differently...)
+// This only works for the palettized modes (1 - 8 BPP), since we actually have to
+// copy data from memory in 16 BPP mode (or does it? Isn't this the same as the CLUT case?)
+// No, it isn't because we read the memory in an endian safe way--this *won't* work...
+ if (flagTRANS && bits == 0)
+ ; // Do nothing...
+ else
+ {
+ if (!flagRMW)
+ *(uint16 *)currentLineBuffer = paletteRAM16[index | bits];
+ else
+ *currentLineBuffer =
+ BLEND_CR(*currentLineBuffer, paletteRAM[(index | bits) << 1]),
+ *(currentLineBuffer + 1) =
+ BLEND_Y(*(currentLineBuffer + 1), paletteRAM[((index | bits) << 1) + 1]);
+ }
+
+ currentLineBuffer += lbufDelta;
+ pixels <<= 2;
+ }
+ }
+ }
+ else if (depth == 2) // 4 BPP
+ {
+if (firstPix)
+ WriteLog("OP: Fixed bitmap @ 4 BPP requesting FIRSTPIX! (fp=%u)\n", firstPix);
+ index &= 0xF0; // Top four bits form CLUT index
+ // The LSB is OPFLAG_REFLECT, so sign extend it and or 2 into it.
+ int32 lbufDelta = ((int8)((flags << 7) & 0xFF) >> 5) | 0x02;
+
+ while (iwidth--)
+ {
+ // Fetch phrase...
+ uint64 pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+ data += pitch;
+
+ for(int i=0; i<16; i++)
+ {
+ uint8 bits = pixels >> 60;
+// Seems to me that both of these are in the same endian, so we could cast it as
+// uint16 * and do straight across copies (what about 24 bpp? Treat it differently...)
+// This only works for the palettized modes (1 - 8 BPP), since we actually have to
+// copy data from memory in 16 BPP mode (or does it? Isn't this the same as the CLUT case?)
+// No, it isn't because we read the memory in an endian safe way--this *won't* work...
+ if (flagTRANS && bits == 0)
+ ; // Do nothing...
+ else
+ {
+ if (!flagRMW)
+ *(uint16 *)currentLineBuffer = paletteRAM16[index | bits];
+ else
+ *currentLineBuffer =
+ BLEND_CR(*currentLineBuffer, paletteRAM[(index | bits) << 1]),
+ *(currentLineBuffer + 1) =
+ BLEND_Y(*(currentLineBuffer + 1), paletteRAM[((index | bits) << 1) + 1]);
+ }
+
+ currentLineBuffer += lbufDelta;
+ pixels <<= 4;
+ }
+ }
+ }
+ else if (depth == 3) // 8 BPP
+ {
+ // The LSB is OPFLAG_REFLECT, so sign extend it and or 2 into it.
+ int32 lbufDelta = ((int8)((flags << 7) & 0xFF) >> 5) | 0x02;
+
+ // Fetch 1st phrase...
+ uint64 pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+//Note that firstPix should only be honored *if* we start with the 1st phrase of the bitmap
+//i.e., we didn't clip on the margin... !!! FIX !!!
+ firstPix &= 0x30; // Only top two bits are valid for 8 BPP
+ pixels <<= firstPix; // Skip first N pixels (N=firstPix)...
+ int i = firstPix >> 3; // Start counter at right spot...
+
+ while (iwidth--)
+ {
+ while (i++ < 8)
+ {
+ uint8 bits = pixels >> 56;
+// Seems to me that both of these are in the same endian, so we could cast it as
+// uint16 * and do straight across copies (what about 24 bpp? Treat it differently...)
+// This only works for the palettized modes (1 - 8 BPP), since we actually have to
+// copy data from memory in 16 BPP mode (or does it? Isn't this the same as the CLUT case?)
+// No, it isn't because we read the memory in an endian safe way--this *won't* work...
+ if (flagTRANS && bits == 0)
+ ; // Do nothing...
+ else
+ {
+ if (!flagRMW)
+ *(uint16 *)currentLineBuffer = paletteRAM16[bits];
+ else
+ *currentLineBuffer =
+ BLEND_CR(*currentLineBuffer, paletteRAM[bits << 1]),
+ *(currentLineBuffer + 1) =
+ BLEND_Y(*(currentLineBuffer + 1), paletteRAM[(bits << 1) + 1]);
+ }
+
+ currentLineBuffer += lbufDelta;
+ pixels <<= 8;
+ }
+ i = 0;
+ // Fetch next phrase...
+ data += pitch;
+ pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+ }
+ }
+ else if (depth == 4) // 16 BPP
+ {
+if (firstPix)
+ WriteLog("OP: Fixed bitmap @ 16 BPP requesting FIRSTPIX! (fp=%u)\n", firstPix);
+ // The LSB is OPFLAG_REFLECT, so sign extend it and or 2 into it.
+ int32 lbufDelta = ((int8)((flags << 7) & 0xFF) >> 5) | 0x02;
+
+ while (iwidth--)
+ {
+ // Fetch phrase...
+ uint64 pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+ data += pitch;
+
+ for(int i=0; i<4; i++)
+ {
+ uint8 bitsHi = pixels >> 56, bitsLo = pixels >> 48;
+// Seems to me that both of these are in the same endian, so we could cast it as
+// uint16 * and do straight across copies (what about 24 bpp? Treat it differently...)
+// This only works for the palettized modes (1 - 8 BPP), since we actually have to
+// copy data from memory in 16 BPP mode (or does it? Isn't this the same as the CLUT case?)
+// No, it isn't because we read the memory in an endian safe way--it *won't* work...
+ if (flagTRANS && (bitsLo | bitsHi) == 0)
+ ; // Do nothing...
+ else
+ {
+ if (!flagRMW)
+ *currentLineBuffer = bitsHi,
+ *(currentLineBuffer + 1) = bitsLo;
+ else
+ *currentLineBuffer =
+ BLEND_CR(*currentLineBuffer, bitsHi),
+ *(currentLineBuffer + 1) =
+ BLEND_Y(*(currentLineBuffer + 1), bitsLo);
+ }
+
+ currentLineBuffer += lbufDelta;
+ pixels <<= 16;
+ }
+ }
+ }
+ else if (depth == 5) // 24 BPP
+ {
+//Looks like Iron Soldier is the only game that uses 24BPP mode...
+//There *might* be others...
+//WriteLog("OP: Writing 24 BPP bitmap!\n");
+if (firstPix)
+ WriteLog("OP: Fixed bitmap @ 24 BPP requesting FIRSTPIX! (fp=%u)\n", firstPix);
+ // Not sure, but I think RMW only works with 16 BPP and below, and only in CRY mode...
+ // The LSB of flags is OPFLAG_REFLECT, so sign extend it and OR 4 into it.
+ int32 lbufDelta = ((int8)((flags << 7) & 0xFF) >> 4) | 0x04;
+
+ while (iwidth--)
+ {
+ // Fetch phrase...
+ uint64 pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+ data += pitch;
+
+ for(int i=0; i<2; i++)
+ {
+ // We don't use a 32-bit var here because of endian issues...!
+ uint8 bits3 = pixels >> 56, bits2 = pixels >> 48,
+ bits1 = pixels >> 40, bits0 = pixels >> 32;
+
+ if (flagTRANS && (bits3 | bits2 | bits1 | bits0) == 0)
+ ; // Do nothing...
+ else
+ *currentLineBuffer = bits3,
+ *(currentLineBuffer + 1) = bits2,
+ *(currentLineBuffer + 2) = bits1,
+ *(currentLineBuffer + 3) = bits0;
+
+ currentLineBuffer += lbufDelta;
+ pixels <<= 32;
+ }
+ }
+ }
+}
+
+//
+// Store scaled bitmap in line buffer
+//
+void OPProcessScaledBitmap(uint64 p0, uint64 p1, uint64 p2, bool render)
+{
+// Need to make sure that when writing that it stays within the line buffer...
+// LBUF ($F01800 - $F01D9E) 360 x 32-bit RAM
+ uint8 depth = (p1 >> 12) & 0x07; // Color depth of image
+ int32 xpos = ((int16)((p1 << 4) & 0xFFFF)) >> 4;// Image xpos in LBUF
+ uint32 iwidth = (p1 >> 28) & 0x3FF; // Image width in *phrases*
+ uint32 data = (p0 >> 40) & 0xFFFFF8; // Pixel data address
+//#ifdef OP_DEBUG_BMP
+// Prolly should use this... Though not sure exactly how.
+//Use the upper bits as an offset into the phrase depending on the BPP. That's how!
+ uint32 firstPix = (p1 >> 49) & 0x3F;
+//This is WEIRD! I'm sure I saw Atari Karts request 8 BPP FIRSTPIX! What happened???
+if (firstPix)
+ WriteLog("OP: FIRSTPIX != 0! (Scaled BM)\n");
+//#endif
+// We can ignore the RELEASE (high order) bit for now--probably forever...!
+// uint8 flags = (p1 >> 45) & 0x0F; // REFLECT, RMW, TRANS, RELEASE
+//Optimize: break these out to their own BOOL values [DONE]
+ uint8 flags = (p1 >> 45) & 0x07; // REFLECT (0), RMW (1), TRANS (2)
+ bool flagREFLECT = (flags & OPFLAG_REFLECT ? true : false),
+ flagRMW = (flags & OPFLAG_RMW ? true : false),
+ flagTRANS = (flags & OPFLAG_TRANS ? true : false);
+ uint8 index = (p1 >> 37) & 0xFE; // CLUT index offset (upper pix, 1-4 bpp)
+ uint32 pitch = (p1 >> 15) & 0x07; // Phrase pitch
+
+ uint8 * tomRam8 = TOMGetRamPointer();
+ uint8 * paletteRAM = &tomRam8[0x400];
+ // This is OK as long as it's used correctly: For 16-bit RAM to RAM direct copies--NOT
+ // for use when using endian-corrected data (i.e., any of the *ReadWord functions!)
+ uint16 * paletteRAM16 = (uint16 *)paletteRAM;
+
+ uint16 hscale = p2 & 0xFF;
+// Hmm. It seems that fixing the horizontal scale necessitated re-fixing this. Not sure why,
+// but seems to be consistent with the vertical scaling now (and it may turn out to be wrong!)...
+ uint16 horizontalRemainder = hscale; // Not sure if it starts full, but seems reasonable [It's not!]
+// uint8 horizontalRemainder = 0; // Let's try zero! Seems to work! Yay! [No, it doesn't!]
+ int32 scaledWidthInPixels = (iwidth * phraseWidthToPixels[depth] * hscale) >> 5;
+ uint32 scaledPhrasePixels = (phraseWidthToPixels[depth] * hscale) >> 5;
+
+// WriteLog("bitmap %ix? %ibpp at %i,? firstpix=? data=0x%.8x pitch %i hflipped=%s dwidth=? (linked to ?) RMW=%s Tranparent=%s\n",
+// iwidth, op_bitmap_bit_depth[bitdepth], xpos, ptr, pitch, (flags&OPFLAG_REFLECT ? "yes" : "no"), (flags&OPFLAG_RMW ? "yes" : "no"), (flags&OPFLAG_TRANS ? "yes" : "no"));
+
+// Looks like an hscale of zero means don't draw!
+ if (!render || iwidth == 0 || hscale == 0)
+ return;
+
+/*extern int start_logging;
+if (start_logging)
+ WriteLog("OP: Scaled bitmap %ix? %ibpp at %i,? hscale=%02X fpix=%i data=%08X pitch %i hflipped=%s dwidth=? (linked to %08X) Transluency=%s\n",
+ iwidth, op_bitmap_bit_depth[depth], xpos, hscale, firstPix, data, pitch, (flagREFLECT ? "yes" : "no"), op_pointer, (flagRMW ? "yes" : "no"));*/
+//#define OP_DEBUG_BMP
+//#ifdef OP_DEBUG_BMP
+// WriteLog("OP: Scaled bitmap %ix%i %ibpp at %i,%i firstpix=%i data=0x%.8x pitch %i hflipped=%s dwidth=%i (linked to 0x%.8x) Transluency=%s\n",
+// iwidth, height, op_bitmap_bit_depth[bitdepth], xpos, ypos, firstPix, ptr, pitch, (flags&OPFLAG_REFLECT ? "yes" : "no"), dwidth, op_pointer, (flags&OPFLAG_RMW ? "yes" : "no"));
+//#endif
+
+ int32 startPos = xpos, endPos = xpos +
+ (!flagREFLECT ? scaledWidthInPixels - 1 : -(scaledWidthInPixels + 1));
+ uint32 clippedWidth = 0, phraseClippedWidth = 0, dataClippedWidth = 0;
+ bool in24BPPMode = (((GET16(tomRam8, 0x0028) >> 1) & 0x03) == 1 ? true : false); // VMODE
+ // Not sure if this is Jaguar Two only location or what...
+ // From the docs, it is... If we want to limit here we should think of something else.
+// int32 limit = GET16(tom_ram_8, 0x0008); // LIMIT
+ int32 limit = 720;
+ int32 lbufWidth = (!in24BPPMode ? limit - 1 : (limit / 2) - 1); // Zero based limit...
+
+ // If the image is completely to the left or right of the line buffer, then bail.
+//If in REFLECT mode, then these values are swapped! !!! FIX !!! [DONE]
+//There are four possibilities:
+// 1. image sits on left edge and no REFLECT; starts out of bounds but ends in bounds.
+// 2. image sits on left edge and REFLECT; starts in bounds but ends out of bounds.
+// 3. image sits on right edge and REFLECT; starts out of bounds but ends in bounds.
+// 4. image sits on right edge and no REFLECT; starts in bounds but ends out of bounds.
+//Numbers 2 & 4 can be caught by checking the LBUF clip while in the inner loop,
+// numbers 1 & 3 are of concern.
+// This *indirectly* handles only cases 2 & 4! And is WRONG if REFLECT is set...!
+// if (rightMargin < 0 || leftMargin > lbufWidth)
+
+// It might be easier to swap these (if REFLECTed) and just use XPOS down below...
+// That way, you could simply set XPOS to leftMargin if !REFLECT and to rightMargin otherwise.
+// Still have to be careful with the DATA and IWIDTH values though...
+
+ if ((!flagREFLECT && (endPos < 0 || startPos > lbufWidth))
+ || (flagREFLECT && (startPos < 0 || endPos > lbufWidth)))
+ return;
+
+ // Otherwise, find the clip limits and clip the phrase as well...
+ // NOTE: I'm fudging here by letting the actual blit overstep the bounds of the
+ // line buffer, but it shouldn't matter since there are two unused line
+ // buffers below and nothing above and I'll at most write 40 bytes outside
+ // the line buffer... I could use a fractional clip begin/end value, but
+ // this makes the blit a *lot* more hairy. I might fix this in the future
+ // if it becomes necessary. (JLH)
+ // Probably wouldn't be *that* hairy. Just use a delta that tells the inner loop
+ // which pixel in the phrase is being written, and quit when either end of phrases
+ // is reached or line buffer extents are surpassed.
+
+//This stuff is probably wrong as well... !!! FIX !!!
+//The strange thing is that it seems to work, but that's no guarantee that it's bulletproof!
+//Yup. Seems that JagMania doesn't work correctly with this...
+//Dunno if this is the problem, but Atari Karts is showing *some* of the road now...
+//Actually, it is! Or, it was. It doesn't seem to be clipping here, so the problem lies
+//elsewhere! Hmm. Putting the scaling code into the 1/2/8 BPP cases seems to draw the ground
+// a bit more accurately... Strange!
+//It's probably a case of the REFLECT flag being set and the background being written
+//from the right side of the screen...
+//But no, it isn't... At least if the diagnostics are telling the truth!
+
+ // NOTE: We're just using endPos to figure out how much, if any, to clip by.
+ // ALSO: There may be another case where we start out of bounds and end out of bounds...!
+ // !!! FIX !!!
+
+//There's a problem here with scaledPhrasePixels in that it can be forced to zero when
+//the scaling factor is small. So fix it already! !!! FIX !!!
+/*if (scaledPhrasePixels == 0)
+{
+ WriteLog("OP: [Scaled] We're about to encounter a divide by zero error!\n");
+ DumpScaledObject(p0, p1, p2);
+}//*/
+//NOTE: I'm almost 100% sure that this is wrong... And it is! :-p
+
+//Try a simple example...
+// Let's say we have a 8 BPP scanline with an hscale of $80 (4). Our xpos is -10,
+// non-flipped. Pixels in the bitmap are XYZXYZXYZXYZXYZ.
+// Scaled up, they would be XXXXYYYYZZZZXXXXYYYYZZZZXXXXYYYYZZZZ...
+//
+// Normally, we would expect this in the line buffer:
+// ZZXXXXYYYYZZZZXXXXYYYYZZZZ...
+//
+// But instead we're getting:
+// XXXXYYYYZZZZXXXXYYYYZZZZ...
+//
+// or are we??? It would seem so, simply by virtue of the fact that we're NOT starting
+// on negative boundary--or are we? Hmm...
+// cw = 10, dcw = pcw = 10 / ([8 * 4 = 32] 32) = 0, sp = -10
+//
+// Let's try a real world example:
+//
+//OP: Scaled bitmap (70, 8 BPP, spp=28) sp (-400) < 0... [new sp=-8, cw=400, dcw=pcw=14]
+//OP: Scaled bitmap (6F, 8 BPP, spp=27) sp (-395) < 0... [new sp=-17, cw=395, dcw=pcw=14]
+//
+// Really, spp is 27.75 in the second case...
+// So... If we do 395 / 27.75, we get 14. Ok so far... If we scale that against the
+// start position (14 * 27.75), we get -6.5... NOT -17!
+
+//Now it seems we're working OK, at least for the first case...
+uint32 scaledPhrasePixelsUS = phraseWidthToPixels[depth] * hscale;
+
+ if (startPos < 0) // Case #1: Begin out, end in, L to R
+{
+extern int start_logging;
+if (start_logging)
+ WriteLog("OP: Scaled bitmap (%02X, %u BPP, spp=%u) start pos (%i) < 0....", hscale, op_bitmap_bit_depth[depth], scaledPhrasePixels, startPos);
+// clippedWidth = 0 - startPos,
+ clippedWidth = (0 - startPos) << 5,
+// dataClippedWidth = phraseClippedWidth = clippedWidth / scaledPhrasePixels,
+ dataClippedWidth = phraseClippedWidth = (clippedWidth / scaledPhrasePixelsUS) >> 5,
+// startPos = 0 - (clippedWidth % scaledPhrasePixels);
+ startPos += (dataClippedWidth * scaledPhrasePixelsUS) >> 5;
+if (start_logging)
+ WriteLog(" [new sp=%i, cw=%i, dcw=pcw=%i]\n", startPos, clippedWidth, dataClippedWidth);
+}
+
+ if (endPos < 0) // Case #2: Begin in, end out, R to L
+ clippedWidth = 0 - endPos,
+ phraseClippedWidth = clippedWidth / scaledPhrasePixels;
+
+ if (endPos > lbufWidth) // Case #3: Begin in, end out, L to R
+ clippedWidth = endPos - lbufWidth,
+ phraseClippedWidth = clippedWidth / scaledPhrasePixels;
+
+ if (startPos > lbufWidth) // Case #4: Begin out, end in, R to L
+ clippedWidth = startPos - lbufWidth,
+ dataClippedWidth = phraseClippedWidth = clippedWidth / scaledPhrasePixels,
+ startPos = lbufWidth + (clippedWidth % scaledPhrasePixels);
+
+extern int op_start_log;
+if (op_start_log && clippedWidth != 0)
+ WriteLog("OP: Clipped line. SP=%i, EP=%i, clip=%u, iwidth=%u, hscale=%02X\n", startPos, endPos, clippedWidth, iwidth, hscale);
+if (op_start_log && startPos == 13)
+{
+ WriteLog("OP: Scaled line. SP=%i, EP=%i, clip=%u, iwidth=%u, hscale=%02X, depth=%u, firstPix=%u\n", startPos, endPos, clippedWidth, iwidth, hscale, depth, firstPix);
+ DumpScaledObject(p0, p1, p2);
+ if (iwidth == 7)
+ {
+ WriteLog(" %08X: ", data);
+ for(int i=0; i<7*8; i++)
+ WriteLog("%02X ", JaguarReadByte(data+i));
+ WriteLog("\n");
+ }
+}
+ // If the image is sitting on the line buffer left or right edge, we need to compensate
+ // by decreasing the image phrase width accordingly.
+ iwidth -= phraseClippedWidth;
+
+ // Also, if we're clipping the phrase we need to make sure we're in the correct part of
+ // the pixel data.
+// data += phraseClippedWidth * (pitch << 3);
+ data += dataClippedWidth * (pitch << 3);
+
+ // NOTE: When the bitmap is in REFLECT mode, the XPOS marks the *right* side of the
+ // bitmap! This makes clipping & etc. MUCH, much easier...!
+// uint32 lbufAddress = 0x1800 + (!in24BPPMode ? leftMargin * 2 : leftMargin * 4);
+// uint32 lbufAddress = 0x1800 + (!in24BPPMode ? startPos * 2 : startPos * 4);
+ uint32 lbufAddress = 0x1800 + startPos * 2;
+ uint8 * currentLineBuffer = &tomRam8[lbufAddress];
+//uint8 * lineBufferLowerLimit = &tom_ram_8[0x1800],
+// * lineBufferUpperLimit = &tom_ram_8[0x1800 + 719];
+
+ // Render.
+
+// Hmm. We check above for 24 BPP mode, but don't do anything about it below...
+// If we *were* in 24 BPP mode, how would you convert CRY to RGB24? Seems to me
+// that if you're in CRY mode then you wouldn't be able to use 24 BPP bitmaps
+// anyway.
+// This seems to be the case (at least according to the Midsummer docs)...!
+
+ if (depth == 0) // 1 BPP
+ {
+if (firstPix != 0)
+ WriteLog("OP: Scaled bitmap @ 1 BPP requesting FIRSTPIX!\n");
+ // The LSB of flags is OPFLAG_REFLECT, so sign extend it and or 2 into it.
+ int32 lbufDelta = ((int8)((flags << 7) & 0xFF) >> 5) | 0x02;
+
+ int pixCount = 0;
+ uint64 pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+
+ while ((int32)iwidth > 0)
+ {
+ uint8 bits = pixels >> 63;
+
+ if (flagTRANS && bits == 0)
+ ; // Do nothing...
+ else
+ {
+ if (!flagRMW)
+ // This is the *only* correct use of endian-dependent code
+ // (i.e., mem-to-mem direct copying)!
+ *(uint16 *)currentLineBuffer = paletteRAM16[index | bits];
+ else
+ *currentLineBuffer =
+ BLEND_CR(*currentLineBuffer, paletteRAM[(index | bits) << 1]),
+ *(currentLineBuffer + 1) =
+ BLEND_Y(*(currentLineBuffer + 1), paletteRAM[((index | bits) << 1) + 1]);
+ }
+
+ currentLineBuffer += lbufDelta;
+
+/* horizontalRemainder -= 0x20; // Subtract 1.0f in [3.5] fixed point format
+ while (horizontalRemainder & 0x80)
+ {
+ horizontalRemainder += hscale;
+ pixCount++;
+ pixels <<= 1;
+ }//*/
+ while (horizontalRemainder < 0x20) // I.e., it's <= 1.0 (*before* subtraction)
+ {
+ horizontalRemainder += hscale;
+ pixCount++;
+ pixels <<= 1;
+ }
+ horizontalRemainder -= 0x20; // Subtract 1.0f in [3.5] fixed point format
+
+ if (pixCount > 63)
+ {
+ int phrasesToSkip = pixCount / 64, pixelShift = pixCount % 64;
+
+ data += (pitch << 3) * phrasesToSkip;
+ pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+ pixels <<= 1 * pixelShift;
+ iwidth -= phrasesToSkip;
+ pixCount = pixelShift;
+ }
+ }
+ }
+ else if (depth == 1) // 2 BPP
+ {
+if (firstPix != 0)
+ WriteLog("OP: Scaled bitmap @ 2 BPP requesting FIRSTPIX!\n");
+ index &= 0xFC; // Top six bits form CLUT index
+ // The LSB is OPFLAG_REFLECT, so sign extend it and or 2 into it.
+ int32 lbufDelta = ((int8)((flags << 7) & 0xFF) >> 5) | 0x02;
+
+ int pixCount = 0;
+ uint64 pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+
+ while ((int32)iwidth > 0)
+ {
+ uint8 bits = pixels >> 62;
+
+ if (flagTRANS && bits == 0)
+ ; // Do nothing...
+ else
+ {
+ if (!flagRMW)
+ // This is the *only* correct use of endian-dependent code
+ // (i.e., mem-to-mem direct copying)!
+ *(uint16 *)currentLineBuffer = paletteRAM16[index | bits];
+ else
+ *currentLineBuffer =
+ BLEND_CR(*currentLineBuffer, paletteRAM[(index | bits) << 1]),
+ *(currentLineBuffer + 1) =
+ BLEND_Y(*(currentLineBuffer + 1), paletteRAM[((index | bits) << 1) + 1]);
+ }
+
+ currentLineBuffer += lbufDelta;
+
+/* horizontalRemainder -= 0x20; // Subtract 1.0f in [3.5] fixed point format
+ while (horizontalRemainder & 0x80)
+ {
+ horizontalRemainder += hscale;
+ pixCount++;
+ pixels <<= 2;
+ }//*/
+ while (horizontalRemainder < 0x20) // I.e., it's <= 1.0 (*before* subtraction)
+ {
+ horizontalRemainder += hscale;
+ pixCount++;
+ pixels <<= 2;
+ }
+ horizontalRemainder -= 0x20; // Subtract 1.0f in [3.5] fixed point format
+
+ if (pixCount > 31)
+ {
+ int phrasesToSkip = pixCount / 32, pixelShift = pixCount % 32;
+
+ data += (pitch << 3) * phrasesToSkip;
+ pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+ pixels <<= 2 * pixelShift;
+ iwidth -= phrasesToSkip;
+ pixCount = pixelShift;
+ }
+ }
+ }
+ else if (depth == 2) // 4 BPP
+ {
+if (firstPix != 0)
+ WriteLog("OP: Scaled bitmap @ 4 BPP requesting FIRSTPIX!\n");
+ index &= 0xF0; // Top four bits form CLUT index
+ // The LSB is OPFLAG_REFLECT, so sign extend it and or 2 into it.
+ int32 lbufDelta = ((int8)((flags << 7) & 0xFF) >> 5) | 0x02;
+
+ int pixCount = 0;
+ uint64 pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+
+ while ((int32)iwidth > 0)
+ {
+ uint8 bits = pixels >> 60;
+
+ if (flagTRANS && bits == 0)
+ ; // Do nothing...
+ else
+ {
+ if (!flagRMW)
+ // This is the *only* correct use of endian-dependent code
+ // (i.e., mem-to-mem direct copying)!
+ *(uint16 *)currentLineBuffer = paletteRAM16[index | bits];
+ else
+ *currentLineBuffer =
+ BLEND_CR(*currentLineBuffer, paletteRAM[(index | bits) << 1]),
+ *(currentLineBuffer + 1) =
+ BLEND_Y(*(currentLineBuffer + 1), paletteRAM[((index | bits) << 1) + 1]);
+ }
+
+ currentLineBuffer += lbufDelta;
+
+/* horizontalRemainder -= 0x20; // Subtract 1.0f in [3.5] fixed point format
+ while (horizontalRemainder & 0x80)
+ {
+ horizontalRemainder += hscale;
+ pixCount++;
+ pixels <<= 4;
+ }//*/
+ while (horizontalRemainder < 0x20) // I.e., it's <= 0 (*before* subtraction)
+ {
+ horizontalRemainder += hscale;
+ pixCount++;
+ pixels <<= 4;
+ }
+ horizontalRemainder -= 0x20; // Subtract 1.0f in [3.5] fixed point format
+
+ if (pixCount > 15)
+ {
+ int phrasesToSkip = pixCount / 16, pixelShift = pixCount % 16;
+
+ data += (pitch << 3) * phrasesToSkip;
+ pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+ pixels <<= 4 * pixelShift;
+ iwidth -= phrasesToSkip;
+ pixCount = pixelShift;
+ }
+ }
+ }
+ else if (depth == 3) // 8 BPP
+ {
+if (firstPix)
+ WriteLog("OP: Scaled bitmap @ 8 BPP requesting FIRSTPIX! (fp=%u)\n", firstPix);
+ // The LSB is OPFLAG_REFLECT, so sign extend it and or 2 into it.
+ int32 lbufDelta = ((int8)((flags << 7) & 0xFF) >> 5) | 0x02;
+
+ int pixCount = 0;
+ uint64 pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+
+ while ((int32)iwidth > 0)
+ {
+ uint8 bits = pixels >> 56;
+
+ if (flagTRANS && bits == 0)
+ ; // Do nothing...
+ else
+ {
+ if (!flagRMW)
+ // This is the *only* correct use of endian-dependent code
+ // (i.e., mem-to-mem direct copying)!
+ *(uint16 *)currentLineBuffer = paletteRAM16[bits];
+/* {
+ if (currentLineBuffer >= lineBufferLowerLimit && currentLineBuffer <= lineBufferUpperLimit)
+ *(uint16 *)currentLineBuffer = paletteRAM16[bits];
+ }*/
+ else
+ *currentLineBuffer =
+ BLEND_CR(*currentLineBuffer, paletteRAM[bits << 1]),
+ *(currentLineBuffer + 1) =
+ BLEND_Y(*(currentLineBuffer + 1), paletteRAM[(bits << 1) + 1]);
+ }
+
+ currentLineBuffer += lbufDelta;
+
+ while (horizontalRemainder < 0x20) // I.e., it's <= 1.0 (*before* subtraction)
+ {
+ horizontalRemainder += hscale;
+ pixCount++;
+ pixels <<= 8;
+ }
+ horizontalRemainder -= 0x20; // Subtract 1.0f in [3.5] fixed point format
+
+ if (pixCount > 7)
+ {
+ int phrasesToSkip = pixCount / 8, pixelShift = pixCount % 8;
+
+ data += (pitch << 3) * phrasesToSkip;
+ pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+ pixels <<= 8 * pixelShift;
+ iwidth -= phrasesToSkip;
+ pixCount = pixelShift;
+ }
+ }
+ }
+ else if (depth == 4) // 16 BPP
+ {
+if (firstPix != 0)
+ WriteLog("OP: Scaled bitmap @ 16 BPP requesting FIRSTPIX!\n");
+ // The LSB is OPFLAG_REFLECT, so sign extend it and OR 2 into it.
+ int32 lbufDelta = ((int8)((flags << 7) & 0xFF) >> 5) | 0x02;
+
+ int pixCount = 0;
+ uint64 pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+
+ while ((int32)iwidth > 0)
+ {
+ uint8 bitsHi = pixels >> 56, bitsLo = pixels >> 48;
+
+ if (flagTRANS && (bitsLo | bitsHi) == 0)
+ ; // Do nothing...
+ else
+ {
+ if (!flagRMW)
+ *currentLineBuffer = bitsHi,
+ *(currentLineBuffer + 1) = bitsLo;
+ else
+ *currentLineBuffer =
+ BLEND_CR(*currentLineBuffer, bitsHi),
+ *(currentLineBuffer + 1) =
+ BLEND_Y(*(currentLineBuffer + 1), bitsLo);
+ }
+
+ currentLineBuffer += lbufDelta;
+
+/* horizontalRemainder -= 0x20; // Subtract 1.0f in [3.5] fixed point format
+ while (horizontalRemainder & 0x80)
+ {
+ horizontalRemainder += hscale;
+ pixCount++;
+ pixels <<= 16;
+ }//*/
+ while (horizontalRemainder < 0x20) // I.e., it's <= 1.0 (*before* subtraction)
+ {
+ horizontalRemainder += hscale;
+ pixCount++;
+ pixels <<= 16;
+ }
+ horizontalRemainder -= 0x20; // Subtract 1.0f in [3.5] fixed point format
+//*/
+ if (pixCount > 3)
+ {
+ int phrasesToSkip = pixCount / 4, pixelShift = pixCount % 4;
+
+ data += (pitch << 3) * phrasesToSkip;
+ pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+ pixels <<= 16 * pixelShift;
+
+ iwidth -= phrasesToSkip;
+
+ pixCount = pixelShift;
+ }
+ }
+ }
+ else if (depth == 5) // 24 BPP
+ {
+//I'm not sure that you can scale a 24 BPP bitmap properly--the JTRM seem to indicate as much.
+WriteLog("OP: Writing 24 BPP scaled bitmap!\n");
+if (firstPix != 0)
+ WriteLog("OP: Scaled bitmap @ 24 BPP requesting FIRSTPIX!\n");
+ // Not sure, but I think RMW only works with 16 BPP and below, and only in CRY mode...
+ // The LSB is OPFLAG_REFLECT, so sign extend it and or 4 into it.
+ int32 lbufDelta = ((int8)((flags << 7) & 0xFF) >> 4) | 0x04;
+
+ while (iwidth--)
+ {
+ // Fetch phrase...
+ uint64 pixels = ((uint64)JaguarReadLong(data, OP) << 32) | JaguarReadLong(data + 4, OP);
+ data += pitch << 3; // Multiply pitch * 8 (optimize: precompute this value)
+
+ for(int i=0; i<2; i++)
+ {
+ uint8 bits3 = pixels >> 56, bits2 = pixels >> 48,
+ bits1 = pixels >> 40, bits0 = pixels >> 32;
+
+ if (flagTRANS && (bits3 | bits2 | bits1 | bits0) == 0)
+ ; // Do nothing...
+ else
+ *currentLineBuffer = bits3,
+ *(currentLineBuffer + 1) = bits2,
+ *(currentLineBuffer + 2) = bits1,
+ *(currentLineBuffer + 3) = bits0;
+
+ currentLineBuffer += lbufDelta;
+ pixels <<= 32;
+ }
+ }
+ }
+}
diff --git a/src/jaguar/objectp.h b/src/jaguar/objectp.h
new file mode 100644
index 00000000..20e71902
--- /dev/null
+++ b/src/jaguar/objectp.h
@@ -0,0 +1,29 @@
+//
+// OBJECTP.H: Object Processor header file
+//
+
+#ifndef __OBJECTP_H__
+#define __OBJECTP_H__
+
+#include "types.h"
+
+void OPInit(void);
+void OPReset(void);
+void OPDone(void);
+
+void OPProcessList(int scanline, bool render);
+uint32 OPGetListPointer(void);
+void OPSetStatusRegister(uint32 data);
+uint32 OPGetStatusRegister(void);
+void OPSetCurrentObject(uint64 object);
+
+//uint8 OPReadByte(uint32, uint32 who = UNKNOWN);
+//uint16 OPReadWord(uint32, uint32 who = UNKNOWN);
+//void OPWriteByte(uint32, uint8, uint32 who = UNKNOWN);
+//void OPWriteWord(uint32, uint16, uint32 who = UNKNOWN);
+
+// Exported variables
+
+extern uint8 objectp_running;
+
+#endif // __OBJECTP_H__
diff --git a/src/jaguar/settings.c b/src/jaguar/settings.c
new file mode 100644
index 00000000..0ddf0700
--- /dev/null
+++ b/src/jaguar/settings.c
@@ -0,0 +1,125 @@
+//
+// SETTINGS.CPP: Virtual Jaguar configuration loading/saving support
+//
+// by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log
+//
+
+#include "settings.h"
+
+#include <stdlib.h>
+#include <string>
+#include "SDL.h"
+#include "sdlemu_config.h"
+#include "log.h"
+
+using namespace std;
+
+// Global variables
+
+VJSettings vjs;
+
+// Private function prototypes
+
+void CheckForTrailingSlash(char * path);
+
+//
+// Load Virtual Jaguar's settings
+//
+void LoadVJSettings(void)
+{
+ if (sdlemu_init_config("./vj.cfg") == 0 // CWD
+ && sdlemu_init_config("~/vj.cfg") == 0 // Home
+ && sdlemu_init_config("~/.vj/vj.cfg") == 0 // Home under .vj directory
+ && sdlemu_init_config("vj.cfg") == 0) // Somewhere in the path
+ WriteLog("Settings: Couldn't find VJ configuration file. Using defaults....\n");
+
+ vjs.useJoystick = sdlemu_getval_bool("useJoystick", false);
+ vjs.joyport = sdlemu_getval_int("joyport", 0);
+ vjs.hardwareTypeNTSC = sdlemu_getval_bool("hardwareTypeNTSC", true);
+ vjs.frameSkip = sdlemu_getval_int("frameSkip", 0);
+ vjs.useJaguarBIOS = sdlemu_getval_bool("useJaguarBIOS", false);
+ vjs.DSPEnabled = sdlemu_getval_bool("DSPEnabled", false);
+ vjs.usePipelinedDSP = sdlemu_getval_bool("usePipelinedDSP", false);
+ vjs.fullscreen = sdlemu_getval_bool("fullscreen", false);
+ vjs.useOpenGL = sdlemu_getval_bool("useOpenGL", true);
+ vjs.glFilter = sdlemu_getval_int("glFilterType", 0);
+ vjs.renderType = sdlemu_getval_int("renderType", 0);
+
+ // Keybindings in order of U, D, L, R, C, B, A, Op, Pa, 0-9, #, *
+ vjs.p1KeyBindings[0] = sdlemu_getval_int("p1k_up", SDLK_UP);
+ vjs.p1KeyBindings[1] = sdlemu_getval_int("p1k_down", SDLK_DOWN);
+ vjs.p1KeyBindings[2] = sdlemu_getval_int("p1k_left", SDLK_LEFT);
+ vjs.p1KeyBindings[3] = sdlemu_getval_int("p1k_right", SDLK_RIGHT);
+ vjs.p1KeyBindings[4] = sdlemu_getval_int("p1k_c", SDLK_z);
+ vjs.p1KeyBindings[5] = sdlemu_getval_int("p1k_b", SDLK_x);
+ vjs.p1KeyBindings[6] = sdlemu_getval_int("p1k_a", SDLK_c);
+ vjs.p1KeyBindings[7] = sdlemu_getval_int("p1k_option", SDLK_QUOTE);
+ vjs.p1KeyBindings[8] = sdlemu_getval_int("p1k_pause", SDLK_RETURN);
+ vjs.p1KeyBindings[9] = sdlemu_getval_int("p1k_0", SDLK_KP0);
+ vjs.p1KeyBindings[10] = sdlemu_getval_int("p1k_1", SDLK_KP1);
+ vjs.p1KeyBindings[11] = sdlemu_getval_int("p1k_2", SDLK_KP2);
+ vjs.p1KeyBindings[12] = sdlemu_getval_int("p1k_3", SDLK_KP3);
+ vjs.p1KeyBindings[13] = sdlemu_getval_int("p1k_4", SDLK_KP4);
+ vjs.p1KeyBindings[14] = sdlemu_getval_int("p1k_5", SDLK_KP5);
+ vjs.p1KeyBindings[15] = sdlemu_getval_int("p1k_6", SDLK_KP6);
+ vjs.p1KeyBindings[16] = sdlemu_getval_int("p1k_7", SDLK_KP7);
+ vjs.p1KeyBindings[17] = sdlemu_getval_int("p1k_8", SDLK_KP8);
+ vjs.p1KeyBindings[18] = sdlemu_getval_int("p1k_9", SDLK_KP9);
+ vjs.p1KeyBindings[19] = sdlemu_getval_int("p1k_pound", SDLK_KP_DIVIDE);
+ vjs.p1KeyBindings[20] = sdlemu_getval_int("p1k_star", SDLK_KP_MULTIPLY);
+
+ vjs.p2KeyBindings[0] = sdlemu_getval_int("p2k_up", SDLK_UP);
+ vjs.p2KeyBindings[1] = sdlemu_getval_int("p2k_down", SDLK_DOWN);
+ vjs.p2KeyBindings[2] = sdlemu_getval_int("p2k_left", SDLK_LEFT);
+ vjs.p2KeyBindings[3] = sdlemu_getval_int("p2k_right", SDLK_RIGHT);
+ vjs.p2KeyBindings[4] = sdlemu_getval_int("p2k_c", SDLK_z);
+ vjs.p2KeyBindings[5] = sdlemu_getval_int("p2k_b", SDLK_x);
+ vjs.p2KeyBindings[6] = sdlemu_getval_int("p2k_a", SDLK_c);
+ vjs.p2KeyBindings[7] = sdlemu_getval_int("p2k_option", SDLK_QUOTE);
+ vjs.p2KeyBindings[8] = sdlemu_getval_int("p2k_pause", SDLK_RETURN);
+ vjs.p2KeyBindings[9] = sdlemu_getval_int("p2k_0", SDLK_KP0);
+ vjs.p2KeyBindings[10] = sdlemu_getval_int("p2k_1", SDLK_KP1);
+ vjs.p2KeyBindings[11] = sdlemu_getval_int("p2k_2", SDLK_KP2);
+ vjs.p2KeyBindings[12] = sdlemu_getval_int("p2k_3", SDLK_KP3);
+ vjs.p2KeyBindings[13] = sdlemu_getval_int("p2k_4", SDLK_KP4);
+ vjs.p2KeyBindings[14] = sdlemu_getval_int("p2k_5", SDLK_KP5);
+ vjs.p2KeyBindings[15] = sdlemu_getval_int("p2k_6", SDLK_KP6);
+ vjs.p2KeyBindings[16] = sdlemu_getval_int("p2k_7", SDLK_KP7);
+ vjs.p2KeyBindings[17] = sdlemu_getval_int("p2k_8", SDLK_KP8);
+ vjs.p2KeyBindings[18] = sdlemu_getval_int("p2k_9", SDLK_KP9);
+ vjs.p2KeyBindings[19] = sdlemu_getval_int("p2k_pound", SDLK_KP_DIVIDE);
+ vjs.p2KeyBindings[20] = sdlemu_getval_int("p2k_star", SDLK_KP_MULTIPLY);
+
+ strcpy(vjs.jagBootPath, sdlemu_getval_string("JagBootROM", "./BIOS/jagboot.rom"));
+ strcpy(vjs.CDBootPath, sdlemu_getval_string("CDBootROM", "./BIOS/jagcd.rom"));
+ strcpy(vjs.EEPROMPath, sdlemu_getval_string("EEPROMs", "./EEPROMs"));
+ strcpy(vjs.ROMPath, sdlemu_getval_string("ROMs", "./ROMs"));
+ CheckForTrailingSlash(vjs.EEPROMPath);
+ CheckForTrailingSlash(vjs.ROMPath);
+
+ vjs.hardwareTypeAlpine = false; // No external setting for this yet...
+}
+
+//
+// Save Virtual Jaguar's settings
+//
+void SaveVJSettings(void)
+{
+}
+
+//
+// Check path for a trailing slash, and append if not present
+//
+void CheckForTrailingSlash(char * path)
+{
+ if (strlen(path) > 0)
+ if (path[strlen(path) - 1] != '/')
+ strcat(path, "/"); // NOTE: Possible buffer overflow
+}
diff --git a/src/jaguar/settings.h b/src/jaguar/settings.h
new file mode 100644
index 00000000..a7ca244e
--- /dev/null
+++ b/src/jaguar/settings.h
@@ -0,0 +1,60 @@
+//
+// SETTINGS.H: Header file
+//
+
+#ifndef __SETTINGS_H__
+#define __SETTINGS_H__
+
+// MAX_PATH isn't defined in stdlib.h on *nix, so we do it here...
+#ifdef __GCCUNIX__
+#include <limits.h>
+#define MAX_PATH _POSIX_PATH_MAX
+#else
+#include <stdlib.h> // for MAX_PATH on MinGW/Darwin
+#endif
+#include "types.h"
+
+// Settings struct
+
+struct VJSettings
+{
+ bool useJoystick;
+ int32 joyport; // Joystick port
+ bool hardwareTypeNTSC; // Set to false for PAL
+ bool useJaguarBIOS;
+ bool DSPEnabled;
+ bool usePipelinedDSP;
+ bool fullscreen;
+ bool useOpenGL;
+ uint32 glFilter;
+ bool hardwareTypeAlpine;
+ uint32 frameSkip;
+ uint32 renderType;
+
+ // Keybindings in order of U, D, L, R, C, B, A, Op, Pa, 0-9, #, *
+
+ uint32 p1KeyBindings[21];
+ uint32 p2KeyBindings[21];
+
+ // Paths
+
+ char ROMPath[MAX_PATH];
+ char jagBootPath[MAX_PATH];
+ char CDBootPath[MAX_PATH];
+ char EEPROMPath[MAX_PATH];
+};
+
+// Render types
+
+enum { RT_NORMAL = 0, RT_TV = 1 };
+
+// Exported functions
+
+void LoadVJSettings(void);
+void SaveVJSettings(void);
+
+// Exported variables
+
+extern VJSettings vjs;
+
+#endif // __SETTINGS_H__
diff --git a/src/jaguar/tom.c b/src/jaguar/tom.c
new file mode 100644
index 00000000..4b109b46
--- /dev/null
+++ b/src/jaguar/tom.c
@@ -0,0 +1,1432 @@
+//
+// TOM Processing
+//
+// Originally by David Raingeard (cal2)
+// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
+// Cleanups and endian wrongness amelioration by James L. Hammons
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+// JLH 01/20/2011 Change rendering to RGBA, removed unnecessary code
+//
+// Note: Endian wrongness probably stems from the MAME origins of this emu and
+// the braindead way in which MAME used to handle memory. :-}
+//
+// Note: TOM has only a 16K memory space
+//
+// ------------------------------------------------------------
+// TOM REGISTERS (Mapped by Aaron Giles)
+// ------------------------------------------------------------
+// F00000-F0FFFF R/W xxxxxxxx xxxxxxxx Internal Registers
+// F00000 R/W -x-xx--- xxxxxxxx MEMCON1 - memory config reg 1
+// -x------ -------- (CPU32 - is the CPU 32bits?)
+// ---xx--- -------- (IOSPEED - external I/O clock cycles)
+// -------- x------- (FASTROM - reduces ROM clock cycles)
+// -------- -xx----- (DRAMSPEED - sets RAM clock cycles)
+// -------- ---xx--- (ROMSPEED - sets ROM clock cycles)
+// -------- -----xx- (ROMWIDTH - sets width of ROM: 8,16,32,64 bits)
+// -------- -------x (ROMHI - controls ROM mapping)
+// F00002 R/W --xxxxxx xxxxxxxx MEMCON2 - memory config reg 2
+// --x----- -------- (HILO - image display bit order)
+// ---x---- -------- (BIGEND - big endian addressing?)
+// ----xxxx -------- (REFRATE - DRAM refresh rate)
+// -------- xx------ (DWIDTH1 - DRAM1 width: 8,16,32,64 bits)
+// -------- --xx---- (COLS1 - DRAM1 columns: 256,512,1024,2048)
+// -------- ----xx-- (DWIDTH0 - DRAM0 width: 8,16,32,64 bits)
+// -------- ------xx (COLS0 - DRAM0 columns: 256,512,1024,2048)
+// F00004 R/W -----xxx xxxxxxxx HC - horizontal count
+// -----x-- -------- (which half of the display)
+// ------xx xxxxxxxx (10-bit counter)
+// F00006 R/W ----xxxx xxxxxxxx VC - vertical count
+// ----x--- -------- (which field is being generated)
+// -----xxx xxxxxxxx (11-bit counter)
+// F00008 R -----xxx xxxxxxxx LPH - light pen horizontal position
+// F0000A R -----xxx xxxxxxxx LPV - light pen vertical position
+// F00010-F00017 R xxxxxxxx xxxxxxxx OB - current object code from the graphics processor
+// F00020-F00023 W xxxxxxxx xxxxxxxx OLP - start of the object list
+// F00026 W -------- -------x OBF - object processor flag
+// F00028 W ----xxxx xxxxxxxx VMODE - video mode
+// W ----xxx- -------- (PWIDTH1-8 - width of pixel in video clock cycles)
+// W -------x -------- (VARMOD - enable variable color resolution)
+// W -------- x------- (BGEN - clear line buffer to BG color)
+// W -------- -x------ (CSYNC - enable composite sync on VSYNC)
+// W -------- --x----- (BINC - local border color if INCEN)
+// W -------- ---x---- (INCEN - encrustation enable)
+// W -------- ----x--- (GENLOCK - enable genlock)
+// W -------- -----xx- (MODE - CRY16,RGB24,DIRECT16,RGB16)
+// W -------- -------x (VIDEN - enables video)
+// F0002A W xxxxxxxx xxxxxxxx BORD1 - border color (red/green)
+// F0002C W -------- xxxxxxxx BORD2 - border color (blue)
+// F0002E W ------xx xxxxxxxx HP - horizontal period
+// F00030 W -----xxx xxxxxxxx HBB - horizontal blanking begin
+// F00032 W -----xxx xxxxxxxx HBE - horizontal blanking end
+// F00034 W -----xxx xxxxxxxx HSYNC - horizontal sync
+// F00036 W ------xx xxxxxxxx HVS - horizontal vertical sync
+// F00038 W -----xxx xxxxxxxx HDB1 - horizontal display begin 1
+// F0003A W -----xxx xxxxxxxx HDB2 - horizontal display begin 2
+// F0003C W -----xxx xxxxxxxx HDE - horizontal display end
+// F0003E W -----xxx xxxxxxxx VP - vertical period
+// F00040 W -----xxx xxxxxxxx VBB - vertical blanking begin
+// F00042 W -----xxx xxxxxxxx VBE - vertical blanking end
+// F00044 W -----xxx xxxxxxxx VS - vertical sync
+// F00046 W -----xxx xxxxxxxx VDB - vertical display begin
+// F00048 W -----xxx xxxxxxxx VDE - vertical display end
+// F0004A W -----xxx xxxxxxxx VEB - vertical equalization begin
+// F0004C W -----xxx xxxxxxxx VEE - vertical equalization end
+// F0004E W -----xxx xxxxxxxx VI - vertical interrupt
+// F00050 W xxxxxxxx xxxxxxxx PIT0 - programmable interrupt timer 0
+// F00052 W xxxxxxxx xxxxxxxx PIT1 - programmable interrupt timer 1
+// F00054 W ------xx xxxxxxxx HEQ - horizontal equalization end
+// F00058 W xxxxxxxx xxxxxxxx BG - background color
+// F000E0 R/W ---xxxxx ---xxxxx INT1 - CPU interrupt control register
+// ---x---- -------- (C_JERCLR - clear pending Jerry ints)
+// ----x--- -------- (C_PITCLR - clear pending PIT ints)
+// -----x-- -------- (C_OPCLR - clear pending object processor ints)
+// ------x- -------- (C_GPUCLR - clear pending graphics processor ints)
+// -------x -------- (C_VIDCLR - clear pending video timebase ints)
+// -------- ---x---- (C_JERENA - enable Jerry ints)
+// -------- ----x--- (C_PITENA - enable PIT ints)
+// -------- -----x-- (C_OPENA - enable object processor ints)
+// -------- ------x- (C_GPUENA - enable graphics processor ints)
+// -------- -------x (C_VIDENA - enable video timebase ints)
+// F000E2 W -------- -------- INT2 - CPU interrupt resume register
+// F00400-F005FF R/W xxxxxxxx xxxxxxxx CLUT - color lookup table A
+// F00600-F007FF R/W xxxxxxxx xxxxxxxx CLUT - color lookup table B
+// F00800-F00D9F R/W xxxxxxxx xxxxxxxx LBUF - line buffer A
+// F01000-F0159F R/W xxxxxxxx xxxxxxxx LBUF - line buffer B
+// F01800-F01D9F R/W xxxxxxxx xxxxxxxx LBUF - line buffer currently selected
+// ------------------------------------------------------------
+// F02000-F021FF R/W xxxxxxxx xxxxxxxx GPU control registers
+// F02100 R/W xxxxxxxx xxxxxxxx G_FLAGS - GPU flags register
+// R/W x------- -------- (DMAEN - DMA enable)
+// R/W -x------ -------- (REGPAGE - register page)
+// W --x----- -------- (G_BLITCLR - clear blitter interrupt)
+// W ---x---- -------- (G_OPCLR - clear object processor int)
+// W ----x--- -------- (G_PITCLR - clear PIT interrupt)
+// W -----x-- -------- (G_JERCLR - clear Jerry interrupt)
+// W ------x- -------- (G_CPUCLR - clear CPU interrupt)
+// R/W -------x -------- (G_BLITENA - enable blitter interrupt)
+// R/W -------- x------- (G_OPENA - enable object processor int)
+// R/W -------- -x------ (G_PITENA - enable PIT interrupt)
+// R/W -------- --x----- (G_JERENA - enable Jerry interrupt)
+// R/W -------- ---x---- (G_CPUENA - enable CPU interrupt)
+// R/W -------- ----x--- (IMASK - interrupt mask)
+// R/W -------- -----x-- (NEGA_FLAG - ALU negative)
+// R/W -------- ------x- (CARRY_FLAG - ALU carry)
+// R/W -------- -------x (ZERO_FLAG - ALU zero)
+// F02104 W -------- ----xxxx G_MTXC - matrix control register
+// W -------- ----x--- (MATCOL - column/row major)
+// W -------- -----xxx (MATRIX3-15 - matrix width)
+// F02108 W ----xxxx xxxxxx-- G_MTXA - matrix address register
+// F0210C W -------- -----xxx G_END - data organization register
+// W -------- -----x-- (BIG_INST - big endian instruction fetch)
+// W -------- ------x- (BIG_PIX - big endian pixels)
+// W -------- -------x (BIG_IO - big endian I/O)
+// F02110 R/W xxxxxxxx xxxxxxxx G_PC - GPU program counter
+// F02114 R/W xxxxxxxx xx-xxxxx G_CTRL - GPU control/status register
+// R xxxx---- -------- (VERSION - GPU version code)
+// R/W ----x--- -------- (BUS_HOG - hog the bus!)
+// R/W -----x-- -------- (G_BLITLAT - blitter interrupt latch)
+// R/W ------x- -------- (G_OPLAT - object processor int latch)
+// R/W -------x -------- (G_PITLAT - PIT interrupt latch)
+// R/W -------- x------- (G_JERLAT - Jerry interrupt latch)
+// R/W -------- -x------ (G_CPULAT - CPU interrupt latch)
+// R/W -------- ---x---- (SINGLE_GO - single step one instruction)
+// R/W -------- ----x--- (SINGLE_STEP - single step mode)
+// R/W -------- -----x-- (FORCEINT0 - cause interrupt 0 on GPU)
+// R/W -------- ------x- (CPUINT - send GPU interrupt to CPU)
+// R/W -------- -------x (GPUGO - enable GPU execution)
+// F02118-F0211B R/W xxxxxxxx xxxxxxxx G_HIDATA - high data register
+// F0211C-F0211F R xxxxxxxx xxxxxxxx G_REMAIN - divide unit remainder
+// F0211C W -------- -------x G_DIVCTRL - divide unit control
+// W -------- -------x (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
+// ------------------------------------------------------------
+// BLITTER REGISTERS
+// ------------------------------------------------------------
+// F02200-F022FF R/W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx Blitter registers
+// F02200 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_BASE - A1 base register
+// F02204 W -------- ---xxxxx -xxxxxxx xxxxx-xx A1_FLAGS - A1 flags register
+// W -------- ---x---- -------- -------- (YSIGNSUB - invert sign of Y delta)
+// W -------- ----x--- -------- -------- (XSIGNSUB - invert sign of X delta)
+// W -------- -----x-- -------- -------- (Y add control)
+// W -------- ------xx -------- -------- (X add control)
+// W -------- -------- -xxxxxx- -------- (width in 6-bit floating point)
+// W -------- -------- -------x xx------ (ZOFFS1-6 - Z data offset)
+// W -------- -------- -------- --xxx--- (PIXEL - pixel size)
+// W -------- -------- -------- ------xx (PITCH1-4 - data phrase pitch)
+// F02208 W -xxxxxxx xxxxxxxx -xxxxxxx xxxxxxxx A1_CLIP - A1 clipping size
+// W -xxxxxxx xxxxxxxx -------- -------- (height)
+// W -------- -------- -xxxxxxx xxxxxxxx (width)
+// F0220C R/W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_PIXEL - A1 pixel pointer
+// R/W xxxxxxxx xxxxxxxx -------- -------- (Y pixel value)
+// R/W -------- -------- xxxxxxxx xxxxxxxx (X pixel value)
+// F02210 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_STEP - A1 step value
+// W xxxxxxxx xxxxxxxx -------- -------- (Y step value)
+// W -------- -------- xxxxxxxx xxxxxxxx (X step value)
+// F02214 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_FSTEP - A1 step fraction value
+// W xxxxxxxx xxxxxxxx -------- -------- (Y step fraction value)
+// W -------- -------- xxxxxxxx xxxxxxxx (X step fraction value)
+// F02218 R/W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_FPIXEL - A1 pixel pointer fraction
+// R/W xxxxxxxx xxxxxxxx -------- -------- (Y pixel fraction value)
+// R/W -------- -------- xxxxxxxx xxxxxxxx (X pixel fraction value)
+// F0221C W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_INC - A1 increment
+// W xxxxxxxx xxxxxxxx -------- -------- (Y increment)
+// W -------- -------- xxxxxxxx xxxxxxxx (X increment)
+// F02220 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_FINC - A1 increment fraction
+// W xxxxxxxx xxxxxxxx -------- -------- (Y increment fraction)
+// W -------- -------- xxxxxxxx xxxxxxxx (X increment fraction)
+// F02224 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A2_BASE - A2 base register
+// F02228 W -------- ---xxxxx -xxxxxxx xxxxx-xx A2_FLAGS - A2 flags register
+// W -------- ---x---- -------- -------- (YSIGNSUB - invert sign of Y delta)
+// W -------- ----x--- -------- -------- (XSIGNSUB - invert sign of X delta)
+// W -------- -----x-- -------- -------- (Y add control)
+// W -------- ------xx -------- -------- (X add control)
+// W -------- -------- -xxxxxx- -------- (width in 6-bit floating point)
+// W -------- -------- -------x xx------ (ZOFFS1-6 - Z data offset)
+// W -------- -------- -------- --xxx--- (PIXEL - pixel size)
+// W -------- -------- -------- ------xx (PITCH1-4 - data phrase pitch)
+// F0222C W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A2_MASK - A2 window mask
+// F02230 R/W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A2_PIXEL - A2 pixel pointer
+// R/W xxxxxxxx xxxxxxxx -------- -------- (Y pixel value)
+// R/W -------- -------- xxxxxxxx xxxxxxxx (X pixel value)
+// F02234 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A2_STEP - A2 step value
+// W xxxxxxxx xxxxxxxx -------- -------- (Y step value)
+// W -------- -------- xxxxxxxx xxxxxxxx (X step value)
+// F02238 W -xxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_CMD - command register
+// W -x------ -------- -------- -------- (SRCSHADE - modify source intensity)
+// W --x----- -------- -------- -------- (BUSHI - hi priority bus)
+// W ---x---- -------- -------- -------- (BKGWREN - writeback destination)
+// W ----x--- -------- -------- -------- (DCOMPEN - write inhibit from data comparator)
+// W -----x-- -------- -------- -------- (BCOMPEN - write inhibit from bit coparator)
+// W ------x- -------- -------- -------- (CMPDST - compare dest instead of src)
+// W -------x xxx----- -------- -------- (logical operation)
+// W -------- ---xxx-- -------- -------- (ZMODE - Z comparator mode)
+// W -------- ------x- -------- -------- (ADDDSEL - select sum of src & dst)
+// W -------- -------x -------- -------- (PATDSEL - select pattern data)
+// W -------- -------- x------- -------- (TOPNEN - enable carry into top intensity nibble)
+// W -------- -------- -x------ -------- (TOPBEN - enable carry into top intensity byte)
+// W -------- -------- --x----- -------- (ZBUFF - enable Z updates in inner loop)
+// W -------- -------- ---x---- -------- (GOURD - enable gouraud shading in inner loop)
+// W -------- -------- ----x--- -------- (DSTA2 - reverses A2/A1 roles)
+// W -------- -------- -----x-- -------- (UPDA2 - add A2 step to A2 in outer loop)
+// W -------- -------- ------x- -------- (UPDA1 - add A1 step to A1 in outer loop)
+// W -------- -------- -------x -------- (UPDA1F - add A1 fraction step to A1 in outer loop)
+// W -------- -------- -------- x------- (diagnostic use)
+// W -------- -------- -------- -x------ (CLIP_A1 - clip A1 to window)
+// W -------- -------- -------- --x----- (DSTWRZ - enable dest Z write in inner loop)
+// W -------- -------- -------- ---x---- (DSTENZ - enable dest Z read in inner loop)
+// W -------- -------- -------- ----x--- (DSTEN - enables dest data read in inner loop)
+// W -------- -------- -------- -----x-- (SRCENX - enable extra src read at start of inner)
+// W -------- -------- -------- ------x- (SRCENZ - enables source Z read in inner loop)
+// W -------- -------- -------- -------x (SRCEN - enables source data read in inner loop)
+// F02238 R xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_CMD - status register
+// R xxxxxxxx xxxxxxxx -------- -------- (inner count)
+// R -------- -------- xxxxxxxx xxxxxx-- (diagnostics)
+// R -------- -------- -------- ------x- (STOPPED - when stopped in collision detect)
+// R -------- -------- -------- -------x (IDLE - when idle)
+// F0223C W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_COUNT - counters register
+// W xxxxxxxx xxxxxxxx -------- -------- (outer loop count)
+// W -------- -------- xxxxxxxx xxxxxxxx (inner loop count)
+// F02240-F02247 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_SRCD - source data register
+// F02248-F0224F W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_DSTD - destination data register
+// F02250-F02257 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_DSTZ - destination Z register
+// F02258-F0225F W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_SRCZ1 - source Z register 1
+// F02260-F02267 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_SRCZ2 - source Z register 2
+// F02268-F0226F W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_PATD - pattern data register
+// F02270 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_IINC - intensity increment
+// F02274 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_ZINC - Z increment
+// F02278 W -------- -------- -------- -----xxx B_STOP - collision control
+// W -------- -------- -------- -----x-- (STOPEN - enable blitter collision stops)
+// W -------- -------- -------- ------x- (ABORT - abort after stop)
+// W -------- -------- -------- -------x (RESUME - resume after stop)
+// F0227C W -------- xxxxxxxx xxxxxxxx xxxxxxxx B_I3 - intensity 3
+// F02280 W -------- xxxxxxxx xxxxxxxx xxxxxxxx B_I2 - intensity 2
+// F02284 W -------- xxxxxxxx xxxxxxxx xxxxxxxx B_I1 - intensity 1
+// F02288 W -------- xxxxxxxx xxxxxxxx xxxxxxxx B_I0 - intensity 0
+// F0228C W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_Z3 - Z3
+// F02290 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_Z2 - Z2
+// F02294 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_Z1 - Z1
+// F02298 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_Z0 - Z0
+// ------------------------------------------------------------
+
+#include "tom.h"
+
+#include <string.h> // For memset()
+#include <stdlib.h> // For rand()
+#include "blitter.h"
+#include "cry2rgb.h"
+#include "event.h"
+#include "gpu.h"
+#include "jaguar.h"
+#include "log.h"
+#include "m68k.h"
+//#include "memory.h"
+#include "objectp.h"
+#include "settings.h"
+#include "video.h"
+
+#define NEW_TIMER_SYSTEM
+
+// TOM registers (offset from $F00000)
+
+#define MEMCON1 0x00
+#define MEMCON2 0x02
+#define HC 0x04
+#define VC 0x06
+#define VMODE 0x28
+#define MODE 0x0006 // Line buffer to video generator mode
+#define BGEN 0x0080 // Background enable (CRY & RGB16 only)
+#define VARMOD 0x0100 // Mixed CRY/RGB16 mode (only works in MODE 0!)
+#define PWIDTH 0x0E00 // Pixel width in video clock cycles (value written + 1)
+#define BORD1 0x2A // Border green/red values (8 BPP)
+#define BORD2 0x2C // Border blue value (8 BPP)
+#define HP 0x2E // Values range from 1 - 1024 (value written + 1)
+#define HBB 0x30
+#define HBE 0x32
+#define HDB1 0x38 // Horizontal display begin 1
+#define HDB2 0x3A
+#define HDE 0x3C
+#define VP 0x3E // Value ranges from 1 - 2048 (value written + 1)
+#define VBB 0x40
+#define VBE 0x42
+#define VS 0x44
+#define VDB 0x46
+#define VDE 0x48
+#define VI 0x4E
+#define BG 0x58
+#define INT1 0xE0
+
+//NOTE: These arbitrary cutoffs are NOT taken into account for PAL jaguar screens. !!! FIX !!!
+
+// Arbitrary video cutoff values (i.e., first/last visible spots on a TV, in HC ticks)
+/*#define LEFT_VISIBLE_HC 208
+#define RIGHT_VISIBLE_HC 1528//*/
+#define LEFT_VISIBLE_HC 208
+#define RIGHT_VISIBLE_HC 1488
+//#define TOP_VISIBLE_VC 25
+//#define BOTTOM_VISIBLE_VC 503
+#define TOP_VISIBLE_VC 31
+#define BOTTOM_VISIBLE_VC 511
+
+//Are these PAL horizontals correct?
+//They seem to be for the most part, but there are some games that seem to be
+//shifted over to the right from this "window".
+#define LEFT_VISIBLE_HC_PAL 208
+#define RIGHT_VISIBLE_HC_PAL 1488
+#define TOP_VISIBLE_VC_PAL 67
+#define BOTTOM_VISIBLE_VC_PAL 579
+
+//This can be defined in the makefile as well...
+//(It's easier to do it here, though...)
+//#define TOM_DEBUG
+
+uint8 tomRam8[0x4000];
+uint32 tomWidth, tomHeight;
+uint32 tomTimerPrescaler;
+uint32 tomTimerDivider;
+int32 tomTimerCounter;
+uint16 tom_jerry_int_pending, tom_timer_int_pending, tom_object_int_pending,
+ tom_gpu_int_pending, tom_video_int_pending;
+uint32 * TOMBackbuffer;
+
+static const char * videoMode_to_str[8] =
+ { "16 BPP CRY", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB",
+ "Mixed mode", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB" };
+
+typedef void (render_xxx_scanline_fn)(uint32 *);
+
+// Private function prototypes
+
+void tom_render_16bpp_cry_scanline(uint32 * backbuffer);
+void tom_render_24bpp_scanline(uint32 * backbuffer);
+void tom_render_16bpp_direct_scanline(uint32 * backbuffer);
+void tom_render_16bpp_rgb_scanline(uint32 * backbuffer);
+void tom_render_16bpp_cry_rgb_mix_scanline(uint32 * backbuffer);
+
+//render_xxx_scanline_fn * scanline_render_normal[] =
+render_xxx_scanline_fn * scanline_render[] =
+{
+ tom_render_16bpp_cry_scanline,
+ tom_render_24bpp_scanline,
+ tom_render_16bpp_direct_scanline,
+ tom_render_16bpp_rgb_scanline,
+ tom_render_16bpp_cry_rgb_mix_scanline,
+ tom_render_24bpp_scanline,
+ tom_render_16bpp_direct_scanline,
+ tom_render_16bpp_rgb_scanline
+};
+
+// Screen info for various games [PAL]...
+/*
+BIOS
+TOM: Horizontal Period written by M68K: 850 (+1*2 = 1702)
+TOM: Horizontal Blank Begin written by M68K: 1711
+TOM: Horizontal Blank End written by M68K: 158
+TOM: Horizontal Display End written by M68K: 1696
+TOM: Horizontal Display Begin 1 written by M68K: 166
+TOM: Vertical Period written by M68K: 623 (non-interlaced)
+TOM: Vertical Blank End written by M68K: 34
+TOM: Vertical Display Begin written by M68K: 46
+TOM: Vertical Display End written by M68K: 526
+TOM: Vertical Blank Begin written by M68K: 600
+TOM: Vertical Sync written by M68K: 618
+TOM: Horizontal Display End written by M68K: 1665
+TOM: Horizontal Display Begin 1 written by M68K: 203
+TOM: Vertical Display Begin written by M68K: 38
+TOM: Vertical Display End written by M68K: 518
+TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 151)
+TOM: Horizontal Display End written by M68K: 1713
+TOM: Horizontal Display Begin 1 written by M68K: 157
+TOM: Vertical Display Begin written by M68K: 35
+TOM: Vertical Display End written by M68K: 2047
+Horizontal range: 157 - 1713 (width: 1557 / 4 = 389.25, / 5 = 315.4)
+
+Asteroid
+TOM: Horizontal Period written by M68K: 845 (+1*2 = 1692)
+TOM: Horizontal Blank Begin written by M68K: 1700
+TOM: Horizontal Blank End written by M68K: 122
+TOM: Horizontal Display End written by M68K: 1600
+TOM: Horizontal Display Begin 1 written by M68K: 268
+TOM: Vertical Period written by M68K: 523 (non-interlaced)
+TOM: Vertical Blank End written by M68K: 40
+TOM: Vertical Display Begin written by M68K: 44
+TOM: Vertical Display End written by M68K: 492
+TOM: Vertical Blank Begin written by M68K: 532
+TOM: Vertical Sync written by M68K: 513
+TOM: Video Mode written by M68K: 04C7. PWIDTH = 3, MODE = 16 BPP RGB, flags: BGEN (VC = 461)
+
+Rayman
+TOM: Horizontal Display End written by M68K: 1713
+TOM: Horizontal Display Begin 1 written by M68K: 157
+TOM: Vertical Display Begin written by M68K: 35
+TOM: Vertical Display End written by M68K: 2047
+TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 89)
+TOM: Horizontal Display Begin 1 written by M68K: 208
+TOM: Horizontal Display End written by M68K: 1662
+TOM: Vertical Display Begin written by M68K: 100
+TOM: Vertical Display End written by M68K: 2047
+TOM: Video Mode written by M68K: 07C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN VARMOD (VC = 205)
+Horizontal range: 208 - 1662 (width: 1455 / 4 = 363.5)
+
+Alien vs Predator
+TOM: Vertical Display Begin written by M68K: 96
+TOM: Vertical Display End written by M68K: 2047
+TOM: Horizontal Display Begin 1 written by M68K: 239
+TOM: Horizontal Display End written by M68K: 1692
+TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 378)
+TOM: Vertical Display Begin written by M68K: 44
+TOM: Vertical Display End written by M68K: 2047
+TOM: Horizontal Display Begin 1 written by M68K: 239
+TOM: Horizontal Display End written by M68K: 1692
+TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 559)
+TOM: Vertical Display Begin written by M68K: 84
+TOM: Vertical Display End written by M68K: 2047
+TOM: Horizontal Display Begin 1 written by M68K: 239
+TOM: Horizontal Display End written by M68K: 1692
+TOM: Vertical Display Begin written by M68K: 44
+TOM: Vertical Display End written by M68K: 2047
+TOM: Horizontal Display Begin 1 written by M68K: 239
+TOM: Horizontal Display End written by M68K: 1692
+Horizontal range: 239 - 1692 (width: 1454 / 4 = 363.5)
+
+*/
+
+// Screen info for various games [NTSC]...
+/*
+Doom
+TOM: Horizontal Display End written by M68K: 1727
+TOM: Horizontal Display Begin 1 written by M68K: 123
+TOM: Vertical Display Begin written by M68K: 25
+TOM: Vertical Display End written by M68K: 2047
+TOM: Video Mode written by M68K: 0EC1. PWIDTH = 8, MODE = 16 BPP CRY, flags: BGEN (VC = 5)
+Also does PWIDTH = 4...
+Vertical resolution: 238 lines
+
+Rayman
+TOM: Horizontal Display End written by M68K: 1727
+TOM: Horizontal Display Begin 1 written by M68K: 123
+TOM: Vertical Display Begin written by M68K: 25
+TOM: Vertical Display End written by M68K: 2047
+TOM: Vertical Interrupt written by M68K: 507
+TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 92)
+TOM: Horizontal Display Begin 1 written by M68K: 208
+TOM: Horizontal Display End written by M68K: 1670
+Display starts at 31, then 52!
+Vertical resolution: 238 lines
+
+Atari Karts
+TOM: Horizontal Display End written by M68K: 1727
+TOM: Horizontal Display Begin 1 written by M68K: 123
+TOM: Vertical Display Begin written by M68K: 25
+TOM: Vertical Display End written by M68K: 2047
+TOM: Video Mode written by GPU: 08C7. PWIDTH = 5, MODE = 16 BPP RGB, flags: BGEN (VC = 4)
+TOM: Video Mode written by GPU: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 508)
+Display starts at 31 (PWIDTH = 4), 24 (PWIDTH = 5)
+
+Iron Soldier
+TOM: Vertical Interrupt written by M68K: 2047
+TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 0)
+TOM: Horizontal Display End written by M68K: 1727
+TOM: Horizontal Display Begin 1 written by M68K: 123
+TOM: Vertical Display Begin written by M68K: 25
+TOM: Vertical Display End written by M68K: 2047
+TOM: Vertical Interrupt written by M68K: 507
+TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 369)
+TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 510)
+TOM: Video Mode written by M68K: 06C3. PWIDTH = 4, MODE = 24 BPP RGB, flags: BGEN (VC = 510)
+Display starts at 31
+Vertical resolution: 238 lines
+[Seems to be a problem between the horizontal positioning of the 16-bit CRY & 24-bit RGB]
+
+JagMania
+TOM: Horizontal Period written by M68K: 844 (+1*2 = 1690)
+TOM: Horizontal Blank Begin written by M68K: 1713
+TOM: Horizontal Blank End written by M68K: 125
+TOM: Horizontal Display End written by M68K: 1696
+TOM: Horizontal Display Begin 1 written by M68K: 166
+TOM: Vertical Period written by M68K: 523 (non-interlaced)
+TOM: Vertical Blank End written by M68K: 24
+TOM: Vertical Display Begin written by M68K: 46
+TOM: Vertical Display End written by M68K: 496
+TOM: Vertical Blank Begin written by M68K: 500
+TOM: Vertical Sync written by M68K: 517
+TOM: Vertical Interrupt written by M68K: 497
+TOM: Video Mode written by M68K: 04C1. PWIDTH = 3, MODE = 16 BPP CRY, flags: BGEN (VC = 270)
+Display starts at 55
+
+Double Dragon V
+TOM: Horizontal Display End written by M68K: 1727
+TOM: Horizontal Display Begin 1 written by M68K: 123
+TOM: Vertical Display Begin written by M68K: 25
+TOM: Vertical Display End written by M68K: 2047
+TOM: Vertical Interrupt written by M68K: 507
+TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 9)
+
+Dino Dudes
+TOM: Horizontal Display End written by M68K: 1823
+TOM: Horizontal Display Begin 1 written by M68K: 45
+TOM: Vertical Display Begin written by M68K: 40
+TOM: Vertical Display End written by M68K: 2047
+TOM: Vertical Interrupt written by M68K: 491
+TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 398)
+Display starts at 11 (123 - 45 = 78, 78 / 4 = 19 pixels to skip)
+Width is 417, so maybe width of 379 would be good (starting at 123, ending at 1639)
+Vertical resolution: 238 lines
+
+Flashback
+TOM: Horizontal Display End written by M68K: 1727
+TOM: Horizontal Display Begin 1 written by M68K: 188
+TOM: Vertical Display Begin written by M68K: 1
+TOM: Vertical Display End written by M68K: 2047
+TOM: Vertical Interrupt written by M68K: 483
+TOM: Video Mode written by M68K: 08C7. PWIDTH = 5, MODE = 16 BPP RGB, flags: BGEN (VC = 99)
+Width would be 303 with above scheme, but border width would be 13 pixels
+
+Trevor McFur
+Vertical resolution: 238 lines
+*/
+
+uint32 RGB16ToRGB32[0x10000];
+uint32 CRY16ToRGB32[0x10000];
+uint32 MIX16ToRGB32[0x10000];
+
+#warning "This is not endian-safe. !!! FIX !!!"
+void TOMFillLookupTables(void)
+{
+ // NOTE: Jaguar 16-bit (non-CRY) color is RBG 556 like so:
+ // RRRR RBBB BBGG GGGG
+ for(uint32 i=0; i<0x10000; i++)
+//hm. RGB16ToRGB32[i] = 0xFF000000
+// | ((i & 0xF100) >> 8) | ((i & 0xE000) >> 13)
+// | ((i & 0x07C0) << 13) | ((i & 0x0700) << 8)
+// | ((i & 0x003F) << 10) | ((i & 0x0030) << 4);
+ RGB16ToRGB32[i] = 0x000000FF
+ | ((i & 0xF100) << 16) // Red
+ | ((i & 0x003F) << 18) // Green
+ | ((i & 0x07C0) << 5); // Blue
+
+ for(uint32 i=0; i<0x10000; i++)
+ {
+ uint32 cyan = (i & 0xF000) >> 12,
+ red = (i & 0x0F00) >> 8,
+ intensity = (i & 0x00FF);
+
+ uint32 r = (((uint32)redcv[cyan][red]) * intensity) >> 8,
+ g = (((uint32)greencv[cyan][red]) * intensity) >> 8,
+ b = (((uint32)bluecv[cyan][red]) * intensity) >> 8;
+
+//hm. CRY16ToRGB32[i] = 0xFF000000 | (b << 16) | (g << 8) | r;
+ CRY16ToRGB32[i] = 0x000000FF | (r << 24) | (g << 16) | (b << 8);
+ MIX16ToRGB32[i] = (i & 0x01 ? RGB16ToRGB32[i] : CRY16ToRGB32[i]);
+ }
+}
+
+void TOMSetPendingJERRYInt(void)
+{
+ tom_jerry_int_pending = 1;
+}
+
+void TOMSetPendingTimerInt(void)
+{
+ tom_timer_int_pending = 1;
+}
+
+void TOMSetPendingObjectInt(void)
+{
+ tom_object_int_pending = 1;
+}
+
+void TOMSetPendingGPUInt(void)
+{
+ tom_gpu_int_pending = 1;
+}
+
+void TOMSetPendingVideoInt(void)
+{
+ tom_video_int_pending = 1;
+}
+
+uint8 * TOMGetRamPointer(void)
+{
+ return tomRam8;
+}
+
+uint8 TOMGetVideoMode(void)
+{
+ uint16 vmode = GET16(tomRam8, VMODE);
+ return ((vmode & VARMOD) >> 6) | ((vmode & MODE) >> 1);
+}
+
+//Used in only one place (and for debug purposes): OBJECTP.CPP
+#warning "Used in only one place (and for debug purposes): OBJECTP.CPP !!! FIX !!!"
+uint16 TOMGetVDB(void)
+{
+ return GET16(tomRam8, VDB);
+}
+
+//
+// 16 BPP CRY/RGB mixed mode rendering
+//
+void tom_render_16bpp_cry_rgb_mix_scanline(uint32 * backbuffer)
+{
+//CHANGED TO 32BPP RENDERING
+ uint16 width = tomWidth;
+ uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
+
+ //New stuff--restrict our drawing...
+ uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
+ //NOTE: May have to check HDB2 as well!
+ // Get start position in HC ticks
+ int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL);
+ startPos /= pwidth;
+ if (startPos < 0)
+ current_line_buffer += 2 * -startPos;
+ else
+//This case doesn't properly handle the "start on the right side of virtual screen" case
+//Dunno why--looks Ok...
+//What *is* for sure wrong is that it doesn't copy the linebuffer's BG pixels...
+//This should likely be 4 instead of 2 (?--not sure)
+ backbuffer += 2 * startPos, width -= startPos;
+
+ while (width)
+ {
+ uint16 color = (*current_line_buffer++) << 8;
+ color |= *current_line_buffer++;
+ *backbuffer++ = MIX16ToRGB32[color];
+ width--;
+ }
+}
+
+//
+// 16 BPP CRY mode rendering
+//
+void tom_render_16bpp_cry_scanline(uint32 * backbuffer)
+{
+//CHANGED TO 32BPP RENDERING
+ uint16 width = tomWidth;
+ uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
+
+ //New stuff--restrict our drawing...
+ uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
+ //NOTE: May have to check HDB2 as well!
+ int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL);// Get start position in HC ticks
+ startPos /= pwidth;
+ if (startPos < 0)
+ current_line_buffer += 2 * -startPos;
+ else
+//This should likely be 4 instead of 2 (?--not sure)
+ backbuffer += 2 * startPos, width -= startPos;
+
+ while (width)
+ {
+ uint16 color = (*current_line_buffer++) << 8;
+ color |= *current_line_buffer++;
+ *backbuffer++ = CRY16ToRGB32[color];
+ width--;
+ }
+}
+
+//
+// 24 BPP mode rendering
+//
+void tom_render_24bpp_scanline(uint32 * backbuffer)
+{
+//CHANGED TO 32BPP RENDERING
+ uint16 width = tomWidth;
+ uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
+
+ //New stuff--restrict our drawing...
+ uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
+ //NOTE: May have to check HDB2 as well!
+ int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL); // Get start position in HC ticks
+ startPos /= pwidth;
+ if (startPos < 0)
+ current_line_buffer += 4 * -startPos;
+ else
+//This should likely be 4 instead of 2 (?--not sure)
+ backbuffer += 2 * startPos, width -= startPos;
+
+ while (width)
+ {
+ uint32 g = *current_line_buffer++;
+ uint32 r = *current_line_buffer++;
+ current_line_buffer++;
+ uint32 b = *current_line_buffer++;
+//hm. *backbuffer++ = 0xFF000000 | (b << 16) | (g << 8) | r;
+ *backbuffer++ = 0x000000FF | (r << 24) | (g << 16) | (r << 8);
+ width--;
+ }
+}
+
+//Seems to me that this is NOT a valid mode--the JTRM seems to imply that you would need
+//extra hardware outside of the Jaguar console to support this!
+//
+// 16 BPP direct mode rendering
+//
+void tom_render_16bpp_direct_scanline(uint32 * backbuffer)
+{
+ uint16 width = tomWidth;
+ uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
+
+ while (width)
+ {
+ uint16 color = (*current_line_buffer++) << 8;
+ color |= *current_line_buffer++;
+ *backbuffer++ = color >> 1;
+ width--;
+ }
+}
+
+//
+// 16 BPP RGB mode rendering
+//
+void tom_render_16bpp_rgb_scanline(uint32 * backbuffer)
+{
+//CHANGED TO 32BPP RENDERING
+ // 16 BPP RGB: 0-5 green, 6-10 blue, 11-15 red
+
+ uint16 width = tomWidth;
+ uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
+
+ //New stuff--restrict our drawing...
+ uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
+ //NOTE: May have to check HDB2 as well!
+ int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL); // Get start position in HC ticks
+ startPos /= pwidth;
+
+ if (startPos < 0)
+ current_line_buffer += 2 * -startPos;
+ else
+//This should likely be 4 instead of 2 (?--not sure)
+ backbuffer += 2 * startPos, width -= startPos;
+
+ while (width)
+ {
+ uint32 color = (*current_line_buffer++) << 8;
+ color |= *current_line_buffer++;
+ *backbuffer++ = RGB16ToRGB32[color];
+ width--;
+ }
+}
+
+
+void TOMResetBackbuffer(uint32 * backbuffer)
+{
+ TOMBackbuffer = backbuffer;
+}
+
+//
+// Process a single scanline
+//
+uint32 tomDeviceWidth;//kludge
+void TOMExecScanline(uint16 scanline, bool render)
+{
+ bool inActiveDisplayArea = true;
+
+//Interlacing is still not handled correctly here... !!! FIX !!!
+ if (scanline & 0x01) // Execute OP only on even lines (non-interlaced only!)
+ return;
+
+ if (scanline >= (uint16)GET16(tomRam8, VDB) && scanline < (uint16)GET16(tomRam8, VDE))
+ {
+ if (render)
+ {
+ uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
+ uint8 bgHI = tomRam8[BG], bgLO = tomRam8[BG + 1];
+
+ // Clear line buffer with BG
+ if (GET16(tomRam8, VMODE) & BGEN) // && (CRY or RGB16)...
+ for(uint32 i=0; i<720; i++)
+ *current_line_buffer++ = bgHI, *current_line_buffer++ = bgLO;
+
+ OPProcessList(scanline, render);
+ }
+ }
+ else
+ inActiveDisplayArea = false;
+
+ // Try to take PAL into account...
+
+ uint16 topVisible = (vjs.hardwareTypeNTSC ? TOP_VISIBLE_VC : TOP_VISIBLE_VC_PAL),
+ bottomVisible = (vjs.hardwareTypeNTSC ? BOTTOM_VISIBLE_VC : BOTTOM_VISIBLE_VC_PAL);
+
+ // Here's our virtualized scanline code...
+
+ if (scanline >= topVisible && scanline < bottomVisible)
+ {
+ if (inActiveDisplayArea)
+ {
+//NOTE: The following doesn't put BORDER color on the sides... !!! FIX !!!
+#warning "The following doesn't put BORDER color on the sides... !!! FIX !!!"
+ if (vjs.renderType == RT_NORMAL)
+ scanline_render[TOMGetVideoMode()](TOMBackbuffer);
+ else//TV type render
+ {
+/*
+ tom_render_16bpp_cry_scanline,
+ tom_render_24bpp_scanline,
+ tom_render_16bpp_direct_scanline,
+ tom_render_16bpp_rgb_scanline,
+ tom_render_16bpp_cry_rgb_mix_scanline,
+ tom_render_24bpp_scanline,
+ tom_render_16bpp_direct_scanline,
+ tom_render_16bpp_rgb_scanline
+#define VMODE 0x28
+#define MODE 0x0006 // Line buffer to video generator mode
+#define VARMOD 0x0100 // Mixed CRY/RGB16 mode (only works in MODE 0!)
+*/
+ uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
+ uint8 mode = ((GET16(tomRam8, VMODE) & MODE) >> 1);
+ bool varmod = GET16(tomRam8, VMODE) & VARMOD;
+//The video texture line buffer ranges from 0 to 1279, with its left edge starting at
+//LEFT_VISIBLE_HC. So, we need to start writing into the backbuffer at HDB1, using pwidth
+//as our scaling factor. The way it generates its image on a real TV!
+
+//So, for example, if HDB1 is less than LEFT_VISIBLE_HC, then we have to figure out where
+//in the VTLB that we start writing pixels from the Jaguar line buffer (VTLB start=0,
+//JLB=something).
+#if 0
+//
+// 24 BPP mode rendering
+//
+void tom_render_24bpp_scanline(uint32 * backbuffer)
+{
+//CHANGED TO 32BPP RENDERING
+ uint16 width = tomWidth;
+ uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
+
+ //New stuff--restrict our drawing...
+ uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
+ //NOTE: May have to check HDB2 as well!
+ int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL); // Get start position in HC ticks
+ startPos /= pwidth;
+ if (startPos < 0)
+ current_line_buffer += 4 * -startPos;
+ else
+//This should likely be 4 instead of 2 (?--not sure)
+ backbuffer += 2 * startPos, width -= startPos;
+
+ while (width)
+ {
+ uint32 g = *current_line_buffer++;
+ uint32 r = *current_line_buffer++;
+ current_line_buffer++;
+ uint32 b = *current_line_buffer++;
+ *backbuffer++ = 0xFF000000 | (b << 16) | (g << 8) | r;
+ width--;
+ }
+}
+#endif
+
+ }
+ }
+ else
+ {
+ // If outside of VDB & VDE, then display the border color
+ uint32 * currentLineBuffer = TOMBackbuffer;
+ uint8 g = tomRam8[BORD1], r = tomRam8[BORD1 + 1], b = tomRam8[BORD2 + 1];
+//Hm. uint32 pixel = 0xFF000000 | (b << 16) | (g << 8) | r;
+ uint32 pixel = 0x000000FF | (r << 24) | (g << 16) | (b << 8);
+
+ for(uint32 i=0; i<tomWidth; i++)
+ *currentLineBuffer++ = pixel;
+ }
+
+#warning "!!! Need to move this to an interface file !!! FIX !!!"
+// TOMBackbuffer += GetSDLScreenWidthInPixels();
+ TOMBackbuffer += tomDeviceWidth;
+ }
+}
+
+//
+// TOM initialization
+//
+void TOMInit(void)
+{
+ TOMFillLookupTables();
+ OPInit();
+ BlitterInit();
+ TOMReset();
+}
+
+void TOMDone(void)
+{
+ OPDone();
+ BlitterDone();
+ WriteLog("TOM: Resolution %i x %i %s\n", TOMGetVideoModeWidth(), TOMGetVideoModeHeight(),
+ videoMode_to_str[TOMGetVideoMode()]);
+// WriteLog("\ntom: object processor:\n");
+// WriteLog("tom: pointer to object list: 0x%.8x\n",op_get_list_pointer());
+// WriteLog("tom: INT1=0x%.2x%.2x\n",TOMReadByte(0xf000e0),TOMReadByte(0xf000e1));
+// gpu_done();
+// dsp_done();
+// memory_free(tomRam8);
+// memory_free(tom_cry_rgb_mix_lut);
+}
+
+uint32 TOMGetVideoModeWidth(void)
+{
+ //These widths are pretty bogus. Should use HDB1/2 & HDE/HBB & PWIDTH to calc the width...
+// uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 166 };
+//Temporary, for testing Doom...
+// uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 332 };
+
+ // Note that the following PWIDTH values have the following pixel aspect ratios:
+ // PWIDTH = 1 -> 0.25:1 (1:4) pixels (X:Y ratio)
+ // PWIDTH = 2 -> 0.50:1 (1:2) pixels
+ // PWIDTH = 3 -> 0.75:1 (3:4) pixels
+ // PWIDTH = 4 -> 1.00:1 (1:1) pixels
+ // PWIDTH = 5 -> 1.25:1 (5:4) pixels
+ // PWIDTH = 6 -> 1.50:1 (3:2) pixels
+ // PWIDTH = 7 -> 1.75:1 (7:4) pixels
+ // PWIDTH = 8 -> 2.00:1 (2:1) pixels
+
+ // Also note that the JTRM says that PWIDTH of 4 gives pixels that are "about" square--
+ // this implies that the other modes have pixels that are *not* square!
+ // Also, I seriously doubt that you will see any games that use PWIDTH = 1!
+
+ // NOTE: Even though the PWIDTH value is + 1, here we're using a zero-based index and
+ // so we don't bother to add one...
+// return width[(GET16(tomRam8, VMODE) & PWIDTH) >> 9];
+
+ // Now, we just calculate it...
+/* uint16 hdb1 = GET16(tomRam8, HDB1), hde = GET16(tomRam8, HDE),
+ hbb = GET16(tomRam8, HBB), pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
+// return ((hbb < hde ? hbb : hde) - hdb1) / pwidth;
+//Temporary, for testing Doom...
+ return ((hbb < hde ? hbb : hde) - hdb1) / (pwidth == 8 ? 4 : pwidth);*/
+
+ // To make it easier to make a quasi-fixed display size, we restrict the viewing
+ // area to an arbitrary range of the Horizontal Count.
+ uint16 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
+ return (vjs.hardwareTypeNTSC ? RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC : RIGHT_VISIBLE_HC_PAL - LEFT_VISIBLE_HC_PAL) / pwidth;
+//Temporary, for testing Doom...
+// return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / (pwidth == 8 ? 4 : pwidth);
+//// return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / (pwidth == 4 ? 8 : pwidth);
+
+// More speculating...
+// According to the JTRM, the number of potential pixels across is given by the
+// Horizontal Period (HP - in NTSC this is 845). The Horizontal Count counts from
+// zero to this value twice per scanline (the high bit is set on the second count).
+// HBE and HBB define the absolute "black" limits of the screen, while HDB1/2 and
+// HDE determine the extent of the OP "on" time. I.e., when the OP is turned on by
+// HDB1, it starts fetching the line from position 0 in LBUF.
+
+// The trick, it would seem, is to figure out how long the typical visible scanline
+// of a TV is in HP ticks and limit the visible area to that (divided by PWIDTH, of
+// course). Using that length, we can establish an "absolute left display limit" with
+// which to measure HBB & HDB1/2 against when rendering LBUF (i.e., if HDB1 is 20 ticks
+// to the right of the ALDL and PWIDTH is 4, then start writing the LBUF starting at
+// backbuffer + 5 pixels).
+
+// That's basically what we're doing now...!
+}
+
+// *** SPECULATION ***
+// It might work better to virtualize the height settings, i.e., set the vertical
+// height at 240 lines and clip using the VDB and VDE/VP registers...
+// Same with the width... [Width is pretty much virtualized now.]
+
+// Now that that the width is virtualized, let's virtualize the height. :-)
+uint32 TOMGetVideoModeHeight(void)
+{
+// uint16 vmode = GET16(tomRam8, VMODE);
+// uint16 vbe = GET16(tomRam8, VBE);
+// uint16 vbb = GET16(tomRam8, VBB);
+// uint16 vdb = GET16(tomRam8, VDB);
+// uint16 vde = GET16(tomRam8, VDE);
+// uint16 vp = GET16(tomRam8, VP);
+
+/* if (vde == 0xFFFF)
+ vde = vbb;//*/
+
+// return 227;//WAS:(vde/*-vdb*/) >> 1;
+ // The video mode height probably works this way:
+ // VC counts from 0 to VP. VDB starts the OP. Either when
+ // VDE is reached or VP, the OP is stopped. Let's try it...
+ // Also note that we're conveniently ignoring interlaced display modes...!
+// return ((vde > vp ? vp : vde) - vdb) >> 1;
+// return ((vde > vbb ? vbb : vde) - vdb) >> 1;
+//Let's try from the Vertical Blank interval...
+//Seems to work OK!
+// return (vbb - vbe) >> 1; // Again, doesn't take interlacing into account...
+// This of course doesn't take interlacing into account. But I haven't seen any
+// Jaguar software that takes advantage of it either...
+//Also, doesn't reflect PAL Jaguar either... !!! FIX !!! [DONE]
+// return 240; // Set virtual screen height to 240 lines...
+ return (vjs.hardwareTypeNTSC ? 240 : 256);
+}
+
+//
+// TOM reset code
+// Now PAL friendly!
+//
+void TOMReset(void)
+{
+ OPReset();
+ BlitterReset();
+ memset(tomRam8, 0x00, 0x4000);
+
+ if (vjs.hardwareTypeNTSC)
+ {
+ SET16(tomRam8, MEMCON1, 0x1861);
+ SET16(tomRam8, MEMCON2, 0x35CC);
+ SET16(tomRam8, HP, 844); // Horizontal Period (1-based; HP=845)
+ SET16(tomRam8, HBB, 1713); // Horizontal Blank Begin
+ SET16(tomRam8, HBE, 125); // Horizontal Blank End
+ SET16(tomRam8, HDE, 1665); // Horizontal Display End
+ SET16(tomRam8, HDB1, 203); // Horizontal Display Begin 1
+ SET16(tomRam8, VP, 523); // Vertical Period (1-based; in this case VP = 524)
+ SET16(tomRam8, VBE, 24); // Vertical Blank End
+ SET16(tomRam8, VDB, 38); // Vertical Display Begin
+ SET16(tomRam8, VDE, 518); // Vertical Display End
+ SET16(tomRam8, VBB, 500); // Vertical Blank Begin
+ SET16(tomRam8, VS, 517); // Vertical Sync
+ SET16(tomRam8, VMODE, 0x06C1);
+ }
+ else // PAL Jaguar
+ {
+ SET16(tomRam8, MEMCON1, 0x1861);
+ SET16(tomRam8, MEMCON2, 0x35CC);
+ SET16(tomRam8, HP, 850); // Horizontal Period
+ SET16(tomRam8, HBB, 1711); // Horizontal Blank Begin
+ SET16(tomRam8, HBE, 158); // Horizontal Blank End
+ SET16(tomRam8, HDE, 1665); // Horizontal Display End
+ SET16(tomRam8, HDB1, 203); // Horizontal Display Begin 1
+ SET16(tomRam8, VP, 623); // Vertical Period (1-based; in this case VP = 624)
+ SET16(tomRam8, VBE, 34); // Vertical Blank End
+ SET16(tomRam8, VDB, 38); // Vertical Display Begin
+ SET16(tomRam8, VDE, 518); // Vertical Display End
+ SET16(tomRam8, VBB, 600); // Vertical Blank Begin
+ SET16(tomRam8, VS, 618); // Vertical Sync
+ SET16(tomRam8, VMODE, 0x06C1);
+ }
+
+ tomWidth = 0;
+ tomHeight = 0;
+
+ tom_jerry_int_pending = 0;
+ tom_timer_int_pending = 0;
+ tom_object_int_pending = 0;
+ tom_gpu_int_pending = 0;
+ tom_video_int_pending = 0;
+
+ tomTimerPrescaler = 0; // TOM PIT is disabled
+ tomTimerDivider = 0;
+ tomTimerCounter = 0;
+}
+
+//
+// TOM byte access (read)
+//
+uint8 TOMReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+//???Is this needed???
+// It seems so. Perhaps it's the +$8000 offset being written to (32-bit interface)?
+// However, the 32-bit interface is WRITE ONLY, so that can't be it...
+// Also, the 68K CANNOT make use of the 32-bit interface, since its bus width is only 16-bits...
+// offset &= 0xFF3FFF;
+
+#ifdef TOM_DEBUG
+ WriteLog("TOM: Reading byte at %06X\n", offset);
+#endif
+
+ if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
+ return GPUReadByte(offset, who);
+ else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
+ return GPUReadByte(offset, who);
+/* else if ((offset >= 0xF00010) && (offset < 0xF00028))
+ return OPReadByte(offset, who);*/
+ else if ((offset >= 0xF02200) && (offset < 0xF022A0))
+ return BlitterReadByte(offset, who);
+ else if (offset == 0xF00050)
+ return tomTimerPrescaler >> 8;
+ else if (offset == 0xF00051)
+ return tomTimerPrescaler & 0xFF;
+ else if (offset == 0xF00052)
+ return tomTimerDivider >> 8;
+ else if (offset == 0xF00053)
+ return tomTimerDivider & 0xFF;
+
+ return tomRam8[offset & 0x3FFF];
+}
+
+//
+// TOM word access (read)
+//
+uint16 TOMReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
+{
+//???Is this needed???
+// offset &= 0xFF3FFF;
+#ifdef TOM_DEBUG
+ WriteLog("TOM: Reading word at %06X\n", offset);
+#endif
+if (offset >= 0xF02000 && offset <= 0xF020FF)
+ WriteLog("TOM: Read attempted from GPU register file by %s (unimplemented)!\n", whoName[who]);
+
+ if (offset == 0xF000E0)
+ {
+ uint16 data = (tom_jerry_int_pending << 4) | (tom_timer_int_pending << 3)
+ | (tom_object_int_pending << 2) | (tom_gpu_int_pending << 1)
+ | (tom_video_int_pending << 0);
+ //WriteLog("tom: interrupt status is 0x%.4x \n",data);
+ return data;
+ }
+//Shoud be handled by the jaguar main loop now... And it is! ;-)
+/* else if (offset == 0xF00006) // VC
+ // What if we're in interlaced mode?
+ // According to docs, in non-interlace mode VC is ALWAYS even...
+// return (tom_scanline << 1);// + 1;
+//But it's causing Rayman to be fucked up... Why???
+//Because VC is even in NI mode when calling the OP! That's why!
+ return (tom_scanline << 1) + 1;//*/
+/*
+// F00004 R/W -----xxx xxxxxxxx HC - horizontal count
+// -----x-- -------- (which half of the display)
+// ------xx xxxxxxxx (10-bit counter)
+*/
+// This is a kludge to get the HC working somewhat... What we really should do here
+// is check what the global time is at the time of the read and calculate the correct HC...
+// !!! FIX !!!
+ else if (offset == 0xF00004)
+ return rand() & 0x03FF;
+ else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE + 0x20))
+ return GPUReadWord(offset, who);
+ else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE + 0x1000))
+ return GPUReadWord(offset, who);
+/* else if ((offset >= 0xF00010) && (offset < 0xF00028))
+ return OPReadWord(offset, who);*/
+ else if ((offset >= 0xF02200) && (offset < 0xF022A0))
+ return BlitterReadWord(offset, who);
+ else if (offset == 0xF00050)
+ return tomTimerPrescaler;
+ else if (offset == 0xF00052)
+ return tomTimerDivider;
+
+ offset &= 0x3FFF;
+ return (TOMReadByte(offset, who) << 8) | TOMReadByte(offset + 1, who);
+}
+
+//
+// TOM byte access (write)
+//
+void TOMWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
+{
+//???Is this needed???
+// Perhaps on the writes--32-bit writes that is! And masked with FF7FFF...
+ offset &= 0xFF3FFF;
+
+#ifdef TOM_DEBUG
+ WriteLog("TOM: Writing byte %02X at %06X\n", data, offset);
+#endif
+
+ if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
+ {
+ GPUWriteByte(offset, data, who);
+ return;
+ }
+ else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
+ {
+ GPUWriteByte(offset, data, who);
+ return;
+ }
+/* else if ((offset >= 0xF00010) && (offset < 0xF00028))
+ {
+ OPWriteByte(offset, data, who);
+ return;
+ }*/
+ else if ((offset >= 0xF02200) && (offset < 0xF022A0))
+ {
+ BlitterWriteByte(offset, data, who);
+ return;
+ }
+ else if (offset == 0xF00050)
+ {
+ tomTimerPrescaler = (tomTimerPrescaler & 0x00FF) | (data << 8);
+ TOMResetPIT();
+ return;
+ }
+ else if (offset == 0xF00051)
+ {
+ tomTimerPrescaler = (tomTimerPrescaler & 0xFF00) | data;
+ TOMResetPIT();
+ return;
+ }
+ else if (offset == 0xF00052)
+ {
+ tomTimerDivider = (tomTimerDivider & 0x00FF) | (data << 8);
+ TOMResetPIT();
+ return;
+ }
+ else if (offset == 0xF00053)
+ {
+ tomTimerDivider = (tomTimerDivider & 0xFF00) | data;
+ TOMResetPIT();
+ return;
+ }
+ else if (offset >= 0xF00400 && offset <= 0xF007FF) // CLUT (A & B)
+ {
+ // Writing to one CLUT writes to the other
+ offset &= 0x5FF; // Mask out $F00600 (restrict to $F00400-5FF)
+ tomRam8[offset] = data, tomRam8[offset + 0x200] = data;
+ }
+
+ tomRam8[offset & 0x3FFF] = data;
+}
+
+//
+// TOM word access (write)
+//
+void TOMWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
+{
+//???Is this needed???
+ offset &= 0xFF3FFF;
+
+#ifdef TOM_DEBUG
+ WriteLog("TOM: Writing word %04X at %06X\n", data, offset);
+#endif
+if (offset == 0xF00000 + MEMCON1)
+ WriteLog("TOM: Memory Configuration 1 written by %s: %04X\n", whoName[who], data);
+if (offset == 0xF00000 + MEMCON2)
+ WriteLog("TOM: Memory Configuration 2 written by %s: %04X\n", whoName[who], data);
+if (offset >= 0xF02000 && offset <= 0xF020FF)
+ WriteLog("TOM: Write attempted to GPU register file by %s (unimplemented)!\n", whoName[who]);
+
+ if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
+ {
+ GPUWriteWord(offset, data, who);
+ return;
+ }
+ else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
+ {
+ GPUWriteWord(offset, data, who);
+ return;
+ }
+//What's so special about this?
+/* else if ((offset >= 0xF00000) && (offset < 0xF00002))
+ {
+ TOMWriteByte(offset, data >> 8);
+ TOMWriteByte(offset+1, data & 0xFF);
+ }*/
+/* else if ((offset >= 0xF00010) && (offset < 0xF00028))
+ {
+ OPWriteWord(offset, data, who);
+ return;
+ }*/
+ else if (offset == 0xF00050)
+ {
+ tomTimerPrescaler = data;
+ TOMResetPIT();
+ return;
+ }
+ else if (offset == 0xF00052)
+ {
+ tomTimerDivider = data;
+ TOMResetPIT();
+ return;
+ }
+ else if (offset == 0xF000E0)
+ {
+//Check this out...
+ if (data & 0x0100)
+ tom_video_int_pending = 0;
+ if (data & 0x0200)
+ tom_gpu_int_pending = 0;
+ if (data & 0x0400)
+ tom_object_int_pending = 0;
+ if (data & 0x0800)
+ tom_timer_int_pending = 0;
+ if (data & 0x1000)
+ tom_jerry_int_pending = 0;
+ }
+ else if ((offset >= 0xF02200) && (offset <= 0xF0229F))
+ {
+ BlitterWriteWord(offset, data, who);
+ return;
+ }
+ else if (offset >= 0xF00400 && offset <= 0xF007FE) // CLUT (A & B)
+ {
+ // Writing to one CLUT writes to the other
+ offset &= 0x5FF; // Mask out $F00600 (restrict to $F00400-5FF)
+// Watch out for unaligned writes here! (Not fixed yet)
+ SET16(tomRam8, offset, data);
+ SET16(tomRam8, offset + 0x200, data);
+ }
+
+ offset &= 0x3FFF;
+ if (offset == 0x28) // VMODE (Why? Why not OBF?)
+//Actually, we should check to see if the Enable bit of VMODE is set before doing this... !!! FIX !!!
+#warning "Actually, we should check to see if the Enable bit of VMODE is set before doing this... !!! FIX !!!"
+ objectp_running = 1;
+
+ if (offset >= 0x30 && offset <= 0x4E)
+ data &= 0x07FF; // These are (mostly) 11-bit registers
+ if (offset == 0x2E || offset == 0x36 || offset == 0x54)
+ data &= 0x03FF; // These are all 10-bit registers
+
+ TOMWriteByte(offset, data >> 8, who);
+ TOMWriteByte(offset+1, data & 0xFF, who);
+
+if (offset == VDB)
+ WriteLog("TOM: Vertical Display Begin written by %s: %u\n", whoName[who], data);
+if (offset == VDE)
+ WriteLog("TOM: Vertical Display End written by %s: %u\n", whoName[who], data);
+if (offset == VP)
+ WriteLog("TOM: Vertical Period written by %s: %u (%sinterlaced)\n", whoName[who], data, (data & 0x01 ? "non-" : ""));
+if (offset == HDB1)
+ WriteLog("TOM: Horizontal Display Begin 1 written by %s: %u\n", whoName[who], data);
+if (offset == HDE)
+ WriteLog("TOM: Horizontal Display End written by %s: %u\n", whoName[who], data);
+if (offset == HP)
+ WriteLog("TOM: Horizontal Period written by %s: %u (+1*2 = %u)\n", whoName[who], data, (data + 1) * 2);
+if (offset == VBB)
+ WriteLog("TOM: Vertical Blank Begin written by %s: %u\n", whoName[who], data);
+if (offset == VBE)
+ WriteLog("TOM: Vertical Blank End written by %s: %u\n", whoName[who], data);
+if (offset == VS)
+ WriteLog("TOM: Vertical Sync written by %s: %u\n", whoName[who], data);
+if (offset == VI)
+ WriteLog("TOM: Vertical Interrupt written by %s: %u\n", whoName[who], data);
+if (offset == HBB)
+ WriteLog("TOM: Horizontal Blank Begin written by %s: %u\n", whoName[who], data);
+if (offset == HBE)
+ WriteLog("TOM: Horizontal Blank End written by %s: %u\n", whoName[who], data);
+if (offset == VMODE)
+ WriteLog("TOM: Video Mode written by %s: %04X. PWIDTH = %u, MODE = %s, flags:%s%s (VC = %u)\n", whoName[who], data, ((data >> 9) & 0x07) + 1, videoMode_to_str[(data & MODE) >> 1], (data & BGEN ? " BGEN" : ""), (data & VARMOD ? " VARMOD" : ""), GET16(tomRam8, VC));
+
+ // detect screen resolution changes
+//This may go away in the future, if we do the virtualized screen thing...
+//This may go away soon!
+ if ((offset >= 0x28) && (offset <= 0x4F))
+ {
+ uint32 width = TOMGetVideoModeWidth(), height = TOMGetVideoModeHeight();
+
+ if ((width != tomWidth) || (height != tomHeight))
+ {
+ tomWidth = width, tomHeight = height;
+
+#warning "!!! TOM: ResizeScreen commented out !!!"
+// No need to resize anything, since we're prepared for this...
+// if (vjs.renderType == RT_NORMAL)
+// ResizeScreen(tomWidth, tomHeight);
+ }
+ }
+}
+
+int TOMIRQEnabled(int irq)
+{
+ // This is the correct byte in big endian... D'oh!
+// return jaguar_byte_read(0xF000E1) & (1 << irq);
+ return tomRam8[INT1 + 1/*0xE1*/] & (1 << irq);
+}
+
+// NEW:
+// TOM Programmable Interrupt Timer handler
+// NOTE: TOM's PIT is only enabled if the prescaler is != 0
+// The PIT only generates an interrupt when it counts down to zero, not when loaded!
+
+void TOMPITCallback(void);
+
+void TOMResetPIT(void)
+{
+#ifndef NEW_TIMER_SYSTEM
+//Probably should *add* this amount to the counter to retain cycle accuracy! !!! FIX !!! [DONE]
+//Also, why +1??? 'Cause that's what it says in the JTRM...!
+//There is a small problem with this approach: If both the prescaler and the divider are equal
+//to $FFFF then the counter won't be large enough to handle it. !!! FIX !!!
+ if (tom_timer_prescaler)
+ tom_timer_counter += (1 + tom_timer_prescaler) * (1 + tom_timer_divider);
+// WriteLog("tom: reseting timer to 0x%.8x (%i)\n",tom_timer_counter,tom_timer_counter);
+#else
+ // Need to remove previous timer from the queue, if it exists...
+ RemoveCallback(TOMPITCallback);
+
+ if (tomTimerPrescaler)
+ {
+ double usecs = (float)(tomTimerPrescaler + 1) * (float)(tomTimerDivider + 1) * RISC_CYCLE_IN_USEC;
+ SetCallbackTime(TOMPITCallback, usecs);
+ }
+#endif
+}
+
+//
+// TOM Programmable Interrupt Timer handler
+// NOTE: TOM's PIT is only enabled if the prescaler is != 0
+//
+//NOTE: This is only used by the old execution code... Safe to remove
+// once the timer system is stable.
+void TOMExecPIT(uint32 cycles)
+{
+ if (tomTimerPrescaler)
+ {
+ tomTimerCounter -= cycles;
+
+ if (tomTimerCounter <= 0)
+ {
+ TOMSetPendingTimerInt();
+ GPUSetIRQLine(GPUIRQ_TIMER, ASSERT_LINE); // GPUSetIRQLine does the 'IRQ enabled' checking
+
+ if (TOMIRQEnabled(IRQ_TIMER))
+ m68k_set_irq(7); // Cause a 68000 NMI...
+
+ TOMResetPIT();
+ }
+ }
+}
+
+void TOMPITCallback(void)
+{
+// INT1_RREG |= 0x08; // Set TOM PIT interrupt pending
+ TOMSetPendingTimerInt();
+ GPUSetIRQLine(GPUIRQ_TIMER, ASSERT_LINE); // It does the 'IRQ enabled' checking
+
+// if (INT1_WREG & 0x08)
+ if (TOMIRQEnabled(IRQ_TIMER))
+ m68k_set_irq(7); // Generate 68K NMI
+
+ TOMResetPIT();
+}
diff --git a/src/jaguar/tom.h b/src/jaguar/tom.h
new file mode 100644
index 00000000..a484d787
--- /dev/null
+++ b/src/jaguar/tom.h
@@ -0,0 +1,66 @@
+//
+// TOM Header file
+//
+
+#ifndef __TOM_H__
+#define __TOM_H__
+
+//#include "jaguar.h"
+//#include "types.h"
+#include "memory.h"
+
+#define VIDEO_MODE_16BPP_CRY 0
+#define VIDEO_MODE_24BPP_RGB 1
+#define VIDEO_MODE_16BPP_DIRECT 2
+#define VIDEO_MODE_16BPP_RGB 3
+
+// 68000 Interrupt bit positions (enabled at $F000E0)
+
+enum { IRQ_VBLANK = 0, IRQ_GPU, IRQ_OPFLAG, IRQ_TIMER, IRQ_DSP };
+
+void TOMInit(void);
+void TOMReset(void);
+void TOMDone(void);
+
+uint8 TOMReadByte(uint32 offset, uint32 who = UNKNOWN);
+uint16 TOMReadWord(uint32 offset, uint32 who = UNKNOWN);
+void TOMWriteByte(uint32 offset, uint8 data, uint32 who = UNKNOWN);
+void TOMWriteWord(uint32 offset, uint16 data, uint32 who = UNKNOWN);
+
+//void TOMExecScanline(int16 * backbuffer, int32 scanline, bool render);
+void TOMExecScanline(uint16 scanline, bool render);
+uint32 TOMGetVideoModeWidth(void);
+uint32 TOMGetVideoModeHeight(void);
+uint8 TOMGetVideoMode(void);
+uint8 * TOMGetRamPointer(void);
+uint16 TOMGetHDB(void);
+uint16 TOMGetVDB(void);
+//uint16 tom_get_scanline(void);
+//uint32 tom_getHBlankWidthInPixels(void);
+
+int TOMIRQEnabled(int irq);
+uint16 TOMIRQControlReg(void);
+void TOMSetIRQLatch(int irq, int enabled);
+void TOMExecPIT(uint32 cycles);
+void TOMSetPendingJERRYInt(void);
+void TOMSetPendingTimerInt(void);
+void TOMSetPendingObjectInt(void);
+void TOMSetPendingGPUInt(void);
+void TOMSetPendingVideoInt(void);
+void TOMResetPIT(void);
+
+//uint32 TOMGetSDLScreenPitch(void);
+void TOMResetBackbuffer(uint32 * backbuffer);
+
+// Exported variables
+
+extern uint32 tomWidth;
+extern uint32 tomHeight;
+extern uint8 tomRam8[];
+extern uint32 tomTimerPrescaler;
+extern uint32 tomTimerDivider;
+extern int32 tomTimerCounter;
+
+extern uint32 tomDeviceWidth;
+
+#endif // __TOM_H__
diff --git a/src/jaguar/types.h b/src/jaguar/types.h
new file mode 100644
index 00000000..7b2a694d
--- /dev/null
+++ b/src/jaguar/types.h
@@ -0,0 +1,22 @@
+//
+// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
+// Removal of unsafe macros and addition of typdefs by James L. Hammons
+//
+
+#ifndef __TYPES_H__
+#define __TYPES_H__
+
+// This should be portable, since it's part of the C99 standard...!
+
+#include <stdint.h>
+
+typedef uint8_t uint8;
+typedef int8_t int8;
+typedef uint16_t uint16;
+typedef int16_t int16;
+typedef uint32_t uint32;
+typedef int32_t int32;
+typedef uint64_t uint64;
+typedef int64_t int64;
+
+#endif // __TYPES_H__
diff --git a/src/jaguar/wavetable.c b/src/jaguar/wavetable.c
new file mode 100644
index 00000000..c9998cdd
--- /dev/null
+++ b/src/jaguar/wavetable.c
@@ -0,0 +1,278 @@
+//
+// Jaguar Wavetable ROM
+//
+// (C) 2010 Underground Software
+//
+// JLH = James L. Hammons <jlhamm@xxxxxxx>
+//
+// Who When What
+// --- ---------- -------------------------------------------------------------
+// JLH 01/16/2010 Created this log ;-)
+//
+
+//
+// In a real Jaguar, these are 16-bit values that are sign-extended to 32 bits.
+// Each entry has 128 values (e.g., SINE goes from F1D200-F1D3FF)
+//
+// NOTE: This can probably be converted to 32-bit table, since I don't think
+// that unaligned access is allowed...
+
+/*const*/ unsigned char waveTableROM[4096] =
+{
+ 0xFF, 0xFF, 0xC2, 0x01, 0xFF, 0xFF, 0xC4, 0x01, 0xFF, 0xFF, 0xC6, 0x01, 0xFF, 0xFF, 0xC8, 0x01,
+ 0xFF, 0xFF, 0xCA, 0x01, 0xFF, 0xFF, 0xCC, 0x01, 0xFF, 0xFF, 0xCE, 0x01, 0xFF, 0xFF, 0xD0, 0x01,
+ 0xFF, 0xFF, 0xD2, 0x01, 0xFF, 0xFF, 0xD4, 0x01, 0xFF, 0xFF, 0xD6, 0x01, 0xFF, 0xFF, 0xD8, 0x01,
+ 0xFF, 0xFF, 0xDA, 0x01, 0xFF, 0xFF, 0xDC, 0x01, 0xFF, 0xFF, 0xDE, 0x01, 0xFF, 0xFF, 0xE0, 0x01,
+ 0xFF, 0xFF, 0xE2, 0x01, 0xFF, 0xFF, 0xE4, 0x01, 0xFF, 0xFF, 0xE6, 0x01, 0xFF, 0xFF, 0xE8, 0x01,
+ 0xFF, 0xFF, 0xEA, 0x01, 0xFF, 0xFF, 0xEC, 0x01, 0xFF, 0xFF, 0xEE, 0x01, 0xFF, 0xFF, 0xF0, 0x01,
+ 0xFF, 0xFF, 0xF2, 0x01, 0xFF, 0xFF, 0xF4, 0x01, 0xFF, 0xFF, 0xF6, 0x01, 0xFF, 0xFF, 0xF8, 0x01,
+ 0xFF, 0xFF, 0xFA, 0x01, 0xFF, 0xFF, 0xFC, 0x01, 0xFF, 0xFF, 0xFE, 0x01, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x01, 0xFF, 0x00, 0x00, 0x03, 0xFF, 0x00, 0x00, 0x05, 0xFF, 0x00, 0x00, 0x07, 0xFF,
+ 0x00, 0x00, 0x09, 0xFF, 0x00, 0x00, 0x0B, 0xFF, 0x00, 0x00, 0x0D, 0xFF, 0x00, 0x00, 0x0F, 0xFF,
+ 0x00, 0x00, 0x11, 0xFF, 0x00, 0x00, 0x13, 0xFF, 0x00, 0x00, 0x15, 0xFF, 0x00, 0x00, 0x17, 0xFF,
+ 0x00, 0x00, 0x19, 0xFF, 0x00, 0x00, 0x1B, 0xFF, 0x00, 0x00, 0x1D, 0xFF, 0x00, 0x00, 0x1F, 0xFF,
+ 0x00, 0x00, 0x21, 0xFF, 0x00, 0x00, 0x23, 0xFF, 0x00, 0x00, 0x25, 0xFF, 0x00, 0x00, 0x27, 0xFF,
+ 0x00, 0x00, 0x29, 0xFF, 0x00, 0x00, 0x2B, 0xFF, 0x00, 0x00, 0x2D, 0xFF, 0x00, 0x00, 0x2F, 0xFF,
+ 0x00, 0x00, 0x31, 0xFF, 0x00, 0x00, 0x33, 0xFF, 0x00, 0x00, 0x35, 0xFF, 0x00, 0x00, 0x37, 0xFF,
+ 0x00, 0x00, 0x39, 0xFF, 0x00, 0x00, 0x3B, 0xFF, 0x00, 0x00, 0x3D, 0xFF, 0x00, 0x00, 0x3F, 0xFF,
+ 0x00, 0x00, 0x3D, 0xFF, 0x00, 0x00, 0x3B, 0xFF, 0x00, 0x00, 0x39, 0xFF, 0x00, 0x00, 0x37, 0xFF,
+ 0x00, 0x00, 0x35, 0xFF, 0x00, 0x00, 0x33, 0xFF, 0x00, 0x00, 0x31, 0xFF, 0x00, 0x00, 0x2F, 0xFF,
+ 0x00, 0x00, 0x2D, 0xFF, 0x00, 0x00, 0x2B, 0xFF, 0x00, 0x00, 0x29, 0xFF, 0x00, 0x00, 0x27, 0xFF,
+ 0x00, 0x00, 0x25, 0xFF, 0x00, 0x00, 0x23, 0xFF, 0x00, 0x00, 0x21, 0xFF, 0x00, 0x00, 0x1F, 0xFF,
+ 0x00, 0x00, 0x1D, 0xFF, 0x00, 0x00, 0x1B, 0xFF, 0x00, 0x00, 0x19, 0xFF, 0x00, 0x00, 0x17, 0xFF,
+ 0x00, 0x00, 0x15, 0xFF, 0x00, 0x00, 0x13, 0xFF, 0x00, 0x00, 0x11, 0xFF, 0x00, 0x00, 0x0F, 0xFF,
+ 0x00, 0x00, 0x0D, 0xFF, 0x00, 0x00, 0x0B, 0xFF, 0x00, 0x00, 0x09, 0xFF, 0x00, 0x00, 0x07, 0xFF,
+ 0x00, 0x00, 0x05, 0xFF, 0x00, 0x00, 0x03, 0xFF, 0x00, 0x00, 0x01, 0xFF, 0x00, 0x00, 0x00, 0x00,
+ 0xFF, 0xFF, 0xFE, 0x01, 0xFF, 0xFF, 0xFC, 0x01, 0xFF, 0xFF, 0xFA, 0x01, 0xFF, 0xFF, 0xF8, 0x01,
+ 0xFF, 0xFF, 0xF6, 0x01, 0xFF, 0xFF, 0xF4, 0x01, 0xFF, 0xFF, 0xF2, 0x01, 0xFF, 0xFF, 0xF0, 0x01,
+ 0xFF, 0xFF, 0xEE, 0x01, 0xFF, 0xFF, 0xEC, 0x01, 0xFF, 0xFF, 0xEA, 0x01, 0xFF, 0xFF, 0xE8, 0x01,
+ 0xFF, 0xFF, 0xE6, 0x01, 0xFF, 0xFF, 0xE4, 0x01, 0xFF, 0xFF, 0xE2, 0x01, 0xFF, 0xFF, 0xE0, 0x01,
+ 0xFF, 0xFF, 0xDE, 0x01, 0xFF, 0xFF, 0xDC, 0x01, 0xFF, 0xFF, 0xDA, 0x01, 0xFF, 0xFF, 0xD8, 0x01,
+ 0xFF, 0xFF, 0xD6, 0x01, 0xFF, 0xFF, 0xD4, 0x01, 0xFF, 0xFF, 0xD2, 0x01, 0xFF, 0xFF, 0xD0, 0x01,
+ 0xFF, 0xFF, 0xCE, 0x01, 0xFF, 0xFF, 0xCC, 0x01, 0xFF, 0xFF, 0xCA, 0x01, 0xFF, 0xFF, 0xC8, 0x01,
+ 0xFF, 0xFF, 0xC6, 0x01, 0xFF, 0xFF, 0xC4, 0x01, 0xFF, 0xFF, 0xC2, 0x01, 0xFF, 0xFF, 0xC0, 0x01,
+ 0x00, 0x00, 0x06, 0x47, 0x00, 0x00, 0x0C, 0x8B, 0x00, 0x00, 0x12, 0xC7, 0x00, 0x00, 0x18, 0xF8,
+ 0x00, 0x00, 0x1F, 0x19, 0x00, 0x00, 0x25, 0x27, 0x00, 0x00, 0x2B, 0x1E, 0x00, 0x00, 0x30, 0xFB,
+ 0x00, 0x00, 0x36, 0xB9, 0x00, 0x00, 0x3C, 0x56, 0x00, 0x00, 0x41, 0xCD, 0x00, 0x00, 0x47, 0x1C,
+ 0x00, 0x00, 0x4C, 0x3F, 0x00, 0x00, 0x51, 0x33, 0x00, 0x00, 0x55, 0xF4, 0x00, 0x00, 0x5A, 0x81,
+ 0x00, 0x00, 0x5E, 0xD6, 0x00, 0x00, 0x62, 0xF1, 0x00, 0x00, 0x66, 0xCE, 0x00, 0x00, 0x6A, 0x6C,
+ 0x00, 0x00, 0x6D, 0xC9, 0x00, 0x00, 0x70, 0xE1, 0x00, 0x00, 0x73, 0xB5, 0x00, 0x00, 0x76, 0x40,
+ 0x00, 0x00, 0x78, 0x83, 0x00, 0x00, 0x7A, 0x7C, 0x00, 0x00, 0x7C, 0x29, 0x00, 0x00, 0x7D, 0x89,
+ 0x00, 0x00, 0x7E, 0x9C, 0x00, 0x00, 0x7F, 0x61, 0x00, 0x00, 0x7F, 0xD7, 0x00, 0x00, 0x7F, 0xFF,
+ 0x00, 0x00, 0x7F, 0xD7, 0x00, 0x00, 0x7F, 0x61, 0x00, 0x00, 0x7E, 0x9C, 0x00, 0x00, 0x7D, 0x89,
+ 0x00, 0x00, 0x7C, 0x29, 0x00, 0x00, 0x7A, 0x7C, 0x00, 0x00, 0x78, 0x83, 0x00, 0x00, 0x76, 0x40,
+ 0x00, 0x00, 0x73, 0xB5, 0x00, 0x00, 0x70, 0xE1, 0x00, 0x00, 0x6D, 0xC9, 0x00, 0x00, 0x6A, 0x6C,
+ 0x00, 0x00, 0x66, 0xCE, 0x00, 0x00, 0x62, 0xF1, 0x00, 0x00, 0x5E, 0xD6, 0x00, 0x00, 0x5A, 0x81,
+ 0x00, 0x00, 0x55, 0xF4, 0x00, 0x00, 0x51, 0x33, 0x00, 0x00, 0x4C, 0x3F, 0x00, 0x00, 0x47, 0x1C,
+ 0x00, 0x00, 0x41, 0xCD, 0x00, 0x00, 0x3C, 0x56, 0x00, 0x00, 0x36, 0xB9, 0x00, 0x00, 0x30, 0xFB,
+ 0x00, 0x00, 0x2B, 0x1E, 0x00, 0x00, 0x25, 0x27, 0x00, 0x00, 0x1F, 0x19, 0x00, 0x00, 0x18, 0xF8,
+ 0x00, 0x00, 0x12, 0xC7, 0x00, 0x00, 0x0C, 0x8B, 0x00, 0x00, 0x06, 0x47, 0x00, 0x00, 0x00, 0x00,
+ 0xFF, 0xFF, 0xF9, 0xB9, 0xFF, 0xFF, 0xF3, 0x75, 0xFF, 0xFF, 0xED, 0x39, 0xFF, 0xFF, 0xE7, 0x08,
+ 0xFF, 0xFF, 0xE0, 0xE7, 0xFF, 0xFF, 0xDA, 0xD9, 0xFF, 0xFF, 0xD4, 0xE2, 0xFF, 0xFF, 0xCF, 0x05,
+ 0xFF, 0xFF, 0xC9, 0x47, 0xFF, 0xFF, 0xC3, 0xAA, 0xFF, 0xFF, 0xBE, 0x33, 0xFF, 0xFF, 0xB8, 0xE4,
+ 0xFF, 0xFF, 0xB3, 0xC1, 0xFF, 0xFF, 0xAE, 0xCD, 0xFF, 0xFF, 0xAA, 0x0C, 0xFF, 0xFF, 0xA5, 0x7F,
+ 0xFF, 0xFF, 0xA1, 0x2A, 0xFF, 0xFF, 0x9D, 0x0F, 0xFF, 0xFF, 0x99, 0x32, 0xFF, 0xFF, 0x95, 0x94,
+ 0xFF, 0xFF, 0x92, 0x37, 0xFF, 0xFF, 0x8F, 0x1F, 0xFF, 0xFF, 0x8C, 0x4B, 0xFF, 0xFF, 0x89, 0xC0,
+ 0xFF, 0xFF, 0x87, 0x7D, 0xFF, 0xFF, 0x85, 0x84, 0xFF, 0xFF, 0x83, 0xD7, 0xFF, 0xFF, 0x82, 0x77,
+ 0xFF, 0xFF, 0x81, 0x64, 0xFF, 0xFF, 0x80, 0x9F, 0xFF, 0xFF, 0x80, 0x29, 0xFF, 0xFF, 0x80, 0x01,
+ 0xFF, 0xFF, 0x80, 0x29, 0xFF, 0xFF, 0x80, 0x9F, 0xFF, 0xFF, 0x81, 0x64, 0xFF, 0xFF, 0x82, 0x77,
+ 0xFF, 0xFF, 0x83, 0xD7, 0xFF, 0xFF, 0x85, 0x84, 0xFF, 0xFF, 0x87, 0x7D, 0xFF, 0xFF, 0x89, 0xC0,
+ 0xFF, 0xFF, 0x8C, 0x4B, 0xFF, 0xFF, 0x8F, 0x1F, 0xFF, 0xFF, 0x92, 0x37, 0xFF, 0xFF, 0x95, 0x94,
+ 0xFF, 0xFF, 0x99, 0x32, 0xFF, 0xFF, 0x9D, 0x0F, 0xFF, 0xFF, 0xA1, 0x2A, 0xFF, 0xFF, 0xA5, 0x7F,
+ 0xFF, 0xFF, 0xAA, 0x0C, 0xFF, 0xFF, 0xAE, 0xCD, 0xFF, 0xFF, 0xB3, 0xC1, 0xFF, 0xFF, 0xB8, 0xE4,
+ 0xFF, 0xFF, 0xBE, 0x33, 0xFF, 0xFF, 0xC3, 0xAA, 0xFF, 0xFF, 0xC9, 0x47, 0xFF, 0xFF, 0xCF, 0x05,
+ 0xFF, 0xFF, 0xD4, 0xE2, 0xFF, 0xFF, 0xDA, 0xD9, 0xFF, 0xFF, 0xE0, 0xE7, 0xFF, 0xFF, 0xE7, 0x08,
+ 0xFF, 0xFF, 0xED, 0x39, 0xFF, 0xFF, 0xF3, 0x75, 0xFF, 0xFF, 0xF9, 0xB9, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0xFF,
+ 0x00, 0x00, 0x01, 0x8E, 0x00, 0x00, 0x02, 0x3A, 0x00, 0x00, 0x03, 0x04, 0x00, 0x00, 0x03, 0xEB,
+ 0x00, 0x00, 0x04, 0xEC, 0x00, 0x00, 0x06, 0x08, 0x00, 0x00, 0x07, 0x3D, 0x00, 0x00, 0x08, 0x88,
+ 0x00, 0x00, 0x09, 0xE9, 0x00, 0x00, 0x0B, 0x5E, 0x00, 0x00, 0x0C, 0xE4, 0x00, 0x00, 0x0E, 0x7B,
+ 0x00, 0x00, 0x10, 0x1F, 0x00, 0x00, 0x11, 0xCF, 0x00, 0x00, 0x13, 0x88, 0x00, 0x00, 0x15, 0x48,
+ 0x00, 0x00, 0x17, 0x0E, 0x00, 0x00, 0x18, 0xD5, 0x00, 0x00, 0x1A, 0x9C, 0x00, 0x00, 0x1C, 0x61,
+ 0x00, 0x00, 0x1E, 0x20, 0x00, 0x00, 0x1F, 0xD8, 0x00, 0x00, 0x21, 0x85, 0x00, 0x00, 0x23, 0x26,
+ 0x00, 0x00, 0x24, 0xB7, 0x00, 0x00, 0x26, 0x36, 0x00, 0x00, 0x27, 0xA1, 0x00, 0x00, 0x28, 0xF5,
+ 0x00, 0x00, 0x2A, 0x30, 0x00, 0x00, 0x2B, 0x4F, 0x00, 0x00, 0x2C, 0x50, 0x00, 0x00, 0x2D, 0x31,
+ 0x00, 0x00, 0x2D, 0xF0, 0x00, 0x00, 0x2E, 0x8B, 0x00, 0x00, 0x2F, 0x00, 0x00, 0x00, 0x2F, 0x4D,
+ 0x00, 0x00, 0x2F, 0x70, 0x00, 0x00, 0x2F, 0x69, 0x00, 0x00, 0x2F, 0x35, 0x00, 0x00, 0x2E, 0xD3,
+ 0x00, 0x00, 0x2E, 0x43, 0x00, 0x00, 0x2D, 0x83, 0x00, 0x00, 0x2C, 0x93, 0x00, 0x00, 0x2B, 0x71,
+ 0x00, 0x00, 0x2A, 0x1E, 0x00, 0x00, 0x28, 0x99, 0x00, 0x00, 0x26, 0xE2, 0x00, 0x00, 0x24, 0xFA,
+ 0x00, 0x00, 0x22, 0xE0, 0x00, 0x00, 0x20, 0x94, 0x00, 0x00, 0x1E, 0x19, 0x00, 0x00, 0x1B, 0x6E,
+ 0x00, 0x00, 0x18, 0x94, 0x00, 0x00, 0x15, 0x8C, 0x00, 0x00, 0x12, 0x59, 0x00, 0x00, 0x0E, 0xFB,
+ 0x00, 0x00, 0x0B, 0x74, 0x00, 0x00, 0x07, 0xC7, 0x00, 0x00, 0x03, 0xF4, 0x00, 0x00, 0x00, 0x00,
+ 0xFF, 0xFF, 0xFB, 0xEB, 0xFF, 0xFF, 0xF7, 0xB9, 0xFF, 0xFF, 0xF3, 0x6B, 0xFF, 0xFF, 0xEF, 0x06,
+ 0xFF, 0xFF, 0xEA, 0x8B, 0xFF, 0xFF, 0xE5, 0xFE, 0xFF, 0xFF, 0xE1, 0x63, 0xFF, 0xFF, 0xDC, 0xBC,
+ 0xFF, 0xFF, 0xD8, 0x0D, 0xFF, 0xFF, 0xD3, 0x5A, 0xFF, 0xFF, 0xCE, 0xA6, 0xFF, 0xFF, 0xC9, 0xF5,
+ 0xFF, 0xFF, 0xC5, 0x4B, 0xFF, 0xFF, 0xC0, 0xAB, 0xFF, 0xFF, 0xBC, 0x19, 0xFF, 0xFF, 0xB7, 0x99,
+ 0xFF, 0xFF, 0xB3, 0x2F, 0xFF, 0xFF, 0xAE, 0xDF, 0xFF, 0xFF, 0xAA, 0xAC, 0xFF, 0xFF, 0xA6, 0x9B,
+ 0xFF, 0xFF, 0xA2, 0xAF, 0xFF, 0xFF, 0x9E, 0xEC, 0xFF, 0xFF, 0x9B, 0x56, 0xFF, 0xFF, 0x97, 0xF0,
+ 0xFF, 0xFF, 0x94, 0xBF, 0xFF, 0xFF, 0x91, 0xC4, 0xFF, 0xFF, 0x8F, 0x04, 0xFF, 0xFF, 0x8C, 0x82,
+ 0xFF, 0xFF, 0x8A, 0x41, 0xFF, 0xFF, 0x88, 0x44, 0xFF, 0xFF, 0x86, 0x8D, 0xFF, 0xFF, 0x85, 0x20,
+ 0xFF, 0xFF, 0x83, 0xFF, 0xFF, 0xFF, 0x83, 0x2B, 0xFF, 0xFF, 0x82, 0xA8, 0xFF, 0xFF, 0x82, 0x77,
+ 0xFF, 0xFF, 0x82, 0x9A, 0xFF, 0xFF, 0x83, 0x11, 0xFF, 0xFF, 0x83, 0xDF, 0xFF, 0xFF, 0x85, 0x05,
+ 0xFF, 0xFF, 0x86, 0x82, 0xFF, 0xFF, 0x88, 0x59, 0xFF, 0xFF, 0x8A, 0x88, 0xFF, 0xFF, 0x8D, 0x10,
+ 0xFF, 0xFF, 0x8F, 0xF1, 0xFF, 0xFF, 0x93, 0x2A, 0xFF, 0xFF, 0x96, 0xBB, 0xFF, 0xFF, 0x9A, 0xA2,
+ 0xFF, 0xFF, 0x9E, 0xDF, 0xFF, 0xFF, 0xA3, 0x6F, 0xFF, 0xFF, 0xA8, 0x51, 0xFF, 0xFF, 0xAD, 0x83,
+ 0xFF, 0xFF, 0xB3, 0x03, 0xFF, 0xFF, 0xB8, 0xCE, 0xFF, 0xFF, 0xBE, 0xE1, 0xFF, 0xFF, 0xC5, 0x39,
+ 0xFF, 0xFF, 0xCB, 0xD3, 0xFF, 0xFF, 0xD2, 0xAC, 0xFF, 0xFF, 0xD9, 0xC0, 0xFF, 0xFF, 0xE1, 0x0A,
+ 0xFF, 0xFF, 0xE8, 0x87, 0xFF, 0xFF, 0xF0, 0x32, 0xFF, 0xFF, 0xF8, 0x07, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x09, 0x69, 0x00, 0x00, 0x12, 0xC2, 0x00, 0x00, 0x1B, 0xF7, 0x00, 0x00, 0x24, 0xF9,
+ 0x00, 0x00, 0x2D, 0xB7, 0x00, 0x00, 0x36, 0x22, 0x00, 0x00, 0x3E, 0x29, 0x00, 0x00, 0x45, 0xBE,
+ 0x00, 0x00, 0x4C, 0xD5, 0x00, 0x00, 0x53, 0x61, 0x00, 0x00, 0x59, 0x57, 0x00, 0x00, 0x5E, 0xAE,
+ 0x00, 0x00, 0x63, 0x5D, 0x00, 0x00, 0x67, 0x5E, 0x00, 0x00, 0x6A, 0xAB, 0x00, 0x00, 0x6D, 0x40,
+ 0x00, 0x00, 0x6F, 0x1B, 0x00, 0x00, 0x70, 0x3D, 0x00, 0x00, 0x70, 0xA5, 0x00, 0x00, 0x70, 0x56,
+ 0x00, 0x00, 0x6F, 0x55, 0x00, 0x00, 0x6D, 0xA7, 0x00, 0x00, 0x6B, 0x53, 0x00, 0x00, 0x68, 0x61,
+ 0x00, 0x00, 0x64, 0xDB, 0x00, 0x00, 0x60, 0xCC, 0x00, 0x00, 0x5C, 0x3F, 0x00, 0x00, 0x57, 0x42,
+ 0x00, 0x00, 0x51, 0xE2, 0x00, 0x00, 0x4C, 0x2C, 0x00, 0x00, 0x46, 0x31, 0x00, 0x00, 0x3F, 0xFF,
+ 0x00, 0x00, 0x39, 0xA5, 0x00, 0x00, 0x33, 0x34, 0x00, 0x00, 0x2C, 0xBA, 0x00, 0x00, 0x26, 0x47,
+ 0x00, 0x00, 0x1F, 0xE9, 0x00, 0x00, 0x19, 0xAF, 0x00, 0x00, 0x13, 0xA8, 0x00, 0x00, 0x0D, 0xDF,
+ 0x00, 0x00, 0x08, 0x61, 0x00, 0x00, 0x03, 0x3A, 0xFF, 0xFF, 0xFE, 0x74, 0xFF, 0xFF, 0xFA, 0x17,
+ 0xFF, 0xFF, 0xF6, 0x2A, 0xFF, 0xFF, 0xF2, 0xB4, 0xFF, 0xFF, 0xEF, 0xBB, 0xFF, 0xFF, 0xED, 0x42,
+ 0xFF, 0xFF, 0xEB, 0x4A, 0xFF, 0xFF, 0xE9, 0xD5, 0xFF, 0xFF, 0xE8, 0xE2, 0xFF, 0xFF, 0xE8, 0x6E,
+ 0xFF, 0xFF, 0xE8, 0x76, 0xFF, 0xFF, 0xE8, 0xF5, 0xFF, 0xFF, 0xE9, 0xE5, 0xFF, 0xFF, 0xEB, 0x3D,
+ 0xFF, 0xFF, 0xEC, 0xF6, 0xFF, 0xFF, 0xEF, 0x06, 0xFF, 0xFF, 0xF1, 0x62, 0xFF, 0xFF, 0xF3, 0xFF,
+ 0xFF, 0xFF, 0xF6, 0xD1, 0xFF, 0xFF, 0xF9, 0xCA, 0xFF, 0xFF, 0xFC, 0xDF, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x03, 0x21, 0x00, 0x00, 0x06, 0x36, 0x00, 0x00, 0x09, 0x2F, 0x00, 0x00, 0x0C, 0x01,
+ 0x00, 0x00, 0x0E, 0x9E, 0x00, 0x00, 0x10, 0xFA, 0x00, 0x00, 0x13, 0x0A, 0x00, 0x00, 0x14, 0xC3,
+ 0x00, 0x00, 0x16, 0x1B, 0x00, 0x00, 0x17, 0x0B, 0x00, 0x00, 0x17, 0x8A, 0x00, 0x00, 0x17, 0x92,
+ 0x00, 0x00, 0x17, 0x1E, 0x00, 0x00, 0x16, 0x2B, 0x00, 0x00, 0x14, 0xB6, 0x00, 0x00, 0x12, 0xBE,
+ 0x00, 0x00, 0x10, 0x45, 0x00, 0x00, 0x0D, 0x4C, 0x00, 0x00, 0x09, 0xD6, 0x00, 0x00, 0x05, 0xE9,
+ 0x00, 0x00, 0x01, 0x8C, 0xFF, 0xFF, 0xFC, 0xC6, 0xFF, 0xFF, 0xF7, 0x9F, 0xFF, 0xFF, 0xF2, 0x21,
+ 0xFF, 0xFF, 0xEC, 0x58, 0xFF, 0xFF, 0xE6, 0x51, 0xFF, 0xFF, 0xE0, 0x17, 0xFF, 0xFF, 0xD9, 0xB9,
+ 0xFF, 0xFF, 0xD3, 0x46, 0xFF, 0xFF, 0xCC, 0xCC, 0xFF, 0xFF, 0xC6, 0x5B, 0xFF, 0xFF, 0xC0, 0x01,
+ 0xFF, 0xFF, 0xB9, 0xCF, 0xFF, 0xFF, 0xB3, 0xD4, 0xFF, 0xFF, 0xAE, 0x1E, 0xFF, 0xFF, 0xA8, 0xBE,
+ 0xFF, 0xFF, 0xA3, 0xC1, 0xFF, 0xFF, 0x9F, 0x34, 0xFF, 0xFF, 0x9B, 0x25, 0xFF, 0xFF, 0x97, 0x9F,
+ 0xFF, 0xFF, 0x94, 0xAD, 0xFF, 0xFF, 0x92, 0x59, 0xFF, 0xFF, 0x90, 0xAB, 0xFF, 0xFF, 0x8F, 0xAA,
+ 0xFF, 0xFF, 0x8F, 0x5B, 0xFF, 0xFF, 0x8F, 0xC3, 0xFF, 0xFF, 0x90, 0xE5, 0xFF, 0xFF, 0x92, 0xC0,
+ 0xFF, 0xFF, 0x95, 0x55, 0xFF, 0xFF, 0x98, 0xA2, 0xFF, 0xFF, 0x9C, 0xA3, 0xFF, 0xFF, 0xA1, 0x52,
+ 0xFF, 0xFF, 0xA6, 0xA9, 0xFF, 0xFF, 0xAC, 0x9F, 0xFF, 0xFF, 0xB3, 0x2B, 0xFF, 0xFF, 0xBA, 0x42,
+ 0xFF, 0xFF, 0xC1, 0xD7, 0xFF, 0xFF, 0xC9, 0xDE, 0xFF, 0xFF, 0xD2, 0x49, 0xFF, 0xFF, 0xDB, 0x07,
+ 0xFF, 0xFF, 0xE4, 0x09, 0xFF, 0xFF, 0xED, 0x3E, 0xFF, 0xFF, 0xF6, 0x97, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x07, 0x04, 0x00, 0x00, 0x0F, 0x79, 0x00, 0x00, 0x19, 0x4E, 0x00, 0x00, 0x24, 0x67,
+ 0x00, 0x00, 0x30, 0x92, 0x00, 0x00, 0x3D, 0x8B, 0x00, 0x00, 0x4A, 0xF0, 0x00, 0x00, 0x58, 0x42,
+ 0x00, 0x00, 0x64, 0xE0, 0x00, 0x00, 0x70, 0x09, 0x00, 0x00, 0x78, 0xE3, 0x00, 0x00, 0x7E, 0x7E,
+ 0x00, 0x00, 0x7F, 0xE5, 0x00, 0x00, 0x7C, 0x35, 0x00, 0x00, 0x72, 0xB3, 0x00, 0x00, 0x62, 0xF1,
+ 0x00, 0x00, 0x4C, 0xEA, 0x00, 0x00, 0x31, 0x29, 0x00, 0x00, 0x10, 0xE2, 0xFF, 0xFF, 0xEE, 0x00,
+ 0xFF, 0xFF, 0xCB, 0x1A, 0xFF, 0xFF, 0xAB, 0x5D, 0xFF, 0xFF, 0x92, 0x3E, 0xFF, 0xFF, 0x83, 0x1E,
+ 0xFF, 0xFF, 0x80, 0xC8, 0xFF, 0xFF, 0x8C, 0xE4, 0xFF, 0xFF, 0xA7, 0x6D, 0xFF, 0xFF, 0xCE, 0x4C,
+ 0xFF, 0xFF, 0xFD, 0x34, 0x00, 0x00, 0x2D, 0xE1, 0x00, 0x00, 0x58, 0xCA, 0x00, 0x00, 0x76, 0x40,
+ 0x00, 0x00, 0x7F, 0xEF, 0x00, 0x00, 0x72, 0x6A, 0x00, 0x00, 0x4E, 0x79, 0x00, 0x00, 0x19, 0xBD,
+ 0xFF, 0xFF, 0xDE, 0x4A, 0xFF, 0xFF, 0xA9, 0x08, 0xFF, 0xFF, 0x86, 0xFC, 0xFF, 0xFF, 0x81, 0xE4,
+ 0xFF, 0xFF, 0x9D, 0x07, 0xFF, 0xFF, 0xD3, 0x39, 0x00, 0x00, 0x16, 0xFE, 0x00, 0x00, 0x55, 0x5F,
+ 0x00, 0x00, 0x7B, 0x06, 0x00, 0x00, 0x7A, 0x8A, 0x00, 0x00, 0x51, 0xD7, 0x00, 0x00, 0x0C, 0x8B,
+ 0xFF, 0xFF, 0xC1, 0xA4, 0xFF, 0xFF, 0x8C, 0x61, 0xFF, 0xFF, 0x82, 0x3B, 0xFF, 0xFF, 0xA9, 0x77,
+ 0xFF, 0xFF, 0xF4, 0x95, 0x00, 0x00, 0x45, 0xA2, 0x00, 0x00, 0x79, 0x85, 0x00, 0x00, 0x77, 0x6B,
+ 0x00, 0x00, 0x3D, 0xC2, 0xFF, 0xFF, 0xE5, 0xAF, 0xFF, 0xFF, 0x99, 0x75, 0xFF, 0xFF, 0x80, 0x8C,
+ 0xFF, 0xFF, 0xAA, 0x4D, 0x00, 0x00, 0x02, 0xF1, 0x00, 0x00, 0x5B, 0x06, 0x00, 0x00, 0x7F, 0xFF,
+ 0x00, 0x00, 0x59, 0xFC, 0xFF, 0xFF, 0xFD, 0x0F, 0xFF, 0xFF, 0xA0, 0xEF, 0xFF, 0xFF, 0x80, 0x8C,
+ 0xFF, 0xFF, 0xB3, 0x67, 0x00, 0x00, 0x1A, 0x51, 0x00, 0x00, 0x70, 0x1C, 0x00, 0x00, 0x77, 0x6B,
+ 0x00, 0x00, 0x28, 0x32, 0xFF, 0xFF, 0xBA, 0x5E, 0xFF, 0xFF, 0x80, 0x84, 0xFF, 0xFF, 0xA9, 0x77,
+ 0x00, 0x00, 0x17, 0xC4, 0x00, 0x00, 0x73, 0x9F, 0x00, 0x00, 0x6F, 0xC6, 0x00, 0x00, 0x0C, 0x8B,
+ 0xFF, 0xFF, 0x9D, 0x97, 0xFF, 0xFF, 0x85, 0x76, 0xFF, 0xFF, 0xDC, 0xAF, 0x00, 0x00, 0x55, 0x5F,
+ 0x00, 0x00, 0x7D, 0xE9, 0x00, 0x00, 0x2C, 0xC7, 0xFF, 0xFF, 0xAE, 0xD7, 0xFF, 0xFF, 0x81, 0xE4,
+ 0xFF, 0xFF, 0xD6, 0x51, 0x00, 0x00, 0x56, 0xF8, 0x00, 0x00, 0x7B, 0x7A, 0x00, 0x00, 0x19, 0xBD,
+ 0xFF, 0xFF, 0x9A, 0xE3, 0xFF, 0xFF, 0x8D, 0x96, 0x00, 0x00, 0x03, 0xE0, 0x00, 0x00, 0x76, 0x40,
+ 0x00, 0x00, 0x5C, 0x31, 0xFF, 0xFF, 0xD2, 0x1F, 0xFF, 0xFF, 0x80, 0x09, 0xFF, 0xFF, 0xCE, 0x4C,
+ 0x00, 0x00, 0x5C, 0x65, 0x00, 0x00, 0x73, 0x1C, 0xFF, 0xFF, 0xF1, 0xF1, 0xFF, 0xFF, 0x83, 0x1E,
+ 0xFF, 0xFF, 0xBE, 0x28, 0x00, 0x00, 0x54, 0xA3, 0x00, 0x00, 0x74, 0x8D, 0xFF, 0xFF, 0xEE, 0x00,
+ 0xFF, 0xFF, 0x81, 0x20, 0xFF, 0xFF, 0xCE, 0xD7, 0x00, 0x00, 0x66, 0x4E, 0x00, 0x00, 0x62, 0xF1,
+ 0xFF, 0xFF, 0xC7, 0x33, 0xFF, 0xFF, 0x83, 0xCB, 0x00, 0x00, 0x05, 0x0D, 0x00, 0x00, 0x7E, 0x7E,
+ 0x00, 0x00, 0x2A, 0x0E, 0xFF, 0xFF, 0x8F, 0xF7, 0xFF, 0xFF, 0xB1, 0x37, 0x00, 0x00, 0x58, 0x42,
+ 0x00, 0x00, 0x67, 0xC3, 0xFF, 0xFF, 0xC2, 0x75, 0xFF, 0xFF, 0x89, 0x95, 0x00, 0x00, 0x24, 0x67,
+ 0x00, 0x00, 0x7D, 0x78, 0xFF, 0xFF, 0xF0, 0x87, 0xFF, 0xFF, 0x80, 0x33, 0x00, 0x00, 0x00, 0x00,
+ 0xFF, 0xFF, 0xC6, 0x95, 0xFF, 0xFF, 0xCB, 0x25, 0xFF, 0xFF, 0xC9, 0xBC, 0xFF, 0xFF, 0xCD, 0x56,
+ 0xFF, 0xFF, 0xCD, 0x2E, 0xFF, 0xFF, 0xCE, 0x03, 0xFF, 0xFF, 0xCE, 0xC0, 0xFF, 0xFF, 0xD1, 0xAC,
+ 0xFF, 0xFF, 0xD6, 0x81, 0xFF, 0xFF, 0xD7, 0xD8, 0xFF, 0xFF, 0xD6, 0x23, 0xFF, 0xFF, 0xD9, 0xA3,
+ 0xFF, 0xFF, 0xD9, 0x6F, 0xFF, 0xFF, 0xDE, 0x63, 0xFF, 0xFF, 0xE1, 0x8B, 0xFF, 0xFF, 0xE0, 0x2F,
+ 0xFF, 0xFF, 0xDE, 0x31, 0xFF, 0xFF, 0xE6, 0xBA, 0xFF, 0xFF, 0xED, 0x65, 0xFF, 0xFF, 0xEA, 0x39,
+ 0xFF, 0xFF, 0xEB, 0xAB, 0xFF, 0xFF, 0xED, 0x8B, 0xFF, 0xFF, 0xF0, 0xBA, 0xFF, 0xFF, 0xF4, 0xC5,
+ 0xFF, 0xFF, 0xF5, 0x99, 0xFF, 0xFF, 0xF4, 0x3B, 0xFF, 0xFF, 0xF6, 0x89, 0xFF, 0xFF, 0xF8, 0xDF,
+ 0xFF, 0xFF, 0xF8, 0xAE, 0xFF, 0xFF, 0xFE, 0x67, 0xFF, 0xFF, 0xFE, 0x69, 0x00, 0x00, 0x02, 0xF5,
+ 0x00, 0x00, 0x01, 0x88, 0x00, 0x00, 0x06, 0xEF, 0x00, 0x00, 0x02, 0x17, 0x00, 0x00, 0x0B, 0x0F,
+ 0x00, 0x00, 0x06, 0x9D, 0x00, 0x00, 0x09, 0x67, 0x00, 0x00, 0x0D, 0x64, 0x00, 0x00, 0x0C, 0x6F,
+ 0x00, 0x00, 0x11, 0xFC, 0x00, 0x00, 0x14, 0x09, 0x00, 0x00, 0x17, 0x68, 0x00, 0x00, 0x16, 0x07,
+ 0x00, 0x00, 0x19, 0x7E, 0x00, 0x00, 0x1B, 0x11, 0x00, 0x00, 0x1D, 0xD6, 0x00, 0x00, 0x1F, 0x99,
+ 0x00, 0x00, 0x1E, 0x69, 0x00, 0x00, 0x25, 0x8E, 0x00, 0x00, 0x23, 0x5F, 0x00, 0x00, 0x24, 0x44,
+ 0x00, 0x00, 0x26, 0x01, 0x00, 0x00, 0x2C, 0x11, 0x00, 0x00, 0x2B, 0x65, 0x00, 0x00, 0x32, 0xBC,
+ 0x00, 0x00, 0x2F, 0x1F, 0x00, 0x00, 0x31, 0x21, 0x00, 0x00, 0x34, 0x14, 0x00, 0x00, 0x32, 0xF5,
+ 0x00, 0x00, 0x36, 0x92, 0x00, 0x00, 0x35, 0xFE, 0x00, 0x00, 0x3C, 0xE4, 0x00, 0x00, 0x3D, 0x5F,
+ 0x00, 0x00, 0x38, 0x91, 0x00, 0x00, 0x39, 0x21, 0x00, 0x00, 0x36, 0x58, 0x00, 0x00, 0x37, 0xD6,
+ 0x00, 0x00, 0x35, 0xE4, 0x00, 0x00, 0x32, 0xA6, 0x00, 0x00, 0x30, 0x6E, 0x00, 0x00, 0x2F, 0x1E,
+ 0x00, 0x00, 0x2A, 0x3D, 0x00, 0x00, 0x2A, 0x7D, 0x00, 0x00, 0x27, 0x24, 0x00, 0x00, 0x27, 0xA4,
+ 0x00, 0x00, 0x23, 0xC2, 0x00, 0x00, 0x25, 0xC2, 0x00, 0x00, 0x20, 0xA0, 0x00, 0x00, 0x20, 0xD0,
+ 0x00, 0x00, 0x1C, 0x6E, 0x00, 0x00, 0x17, 0xBF, 0x00, 0x00, 0x19, 0x64, 0x00, 0x00, 0x16, 0x6B,
+ 0x00, 0x00, 0x12, 0x42, 0x00, 0x00, 0x13, 0x6F, 0x00, 0x00, 0x11, 0x9D, 0x00, 0x00, 0x0E, 0x80,
+ 0x00, 0x00, 0x0F, 0xEA, 0x00, 0x00, 0x09, 0xE2, 0x00, 0x00, 0x07, 0xB8, 0x00, 0x00, 0x07, 0x98,
+ 0x00, 0x00, 0x06, 0x73, 0x00, 0x00, 0x02, 0xD5, 0x00, 0x00, 0x01, 0x63, 0xFF, 0xFF, 0xFD, 0xF2,
+ 0x00, 0x00, 0x01, 0xED, 0xFF, 0xFF, 0xFF, 0xE5, 0xFF, 0xFF, 0xF7, 0x69, 0xFF, 0xFF, 0xFC, 0x16,
+ 0xFF, 0xFF, 0xF4, 0xCD, 0xFF, 0xFF, 0xF4, 0x06, 0xFF, 0xFF, 0xF3, 0xC2, 0xFF, 0xFF, 0xF0, 0x30,
+ 0xFF, 0xFF, 0xF1, 0x72, 0xFF, 0xFF, 0xEF, 0x53, 0xFF, 0xFF, 0xE8, 0x12, 0xFF, 0xFF, 0xE7, 0x2D,
+ 0xFF, 0xFF, 0xE5, 0xDC, 0xFF, 0xFF, 0xE6, 0x34, 0xFF, 0xFF, 0xE2, 0xAE, 0xFF, 0xFF, 0xE2, 0xF2,
+ 0xFF, 0xFF, 0xE0, 0x23, 0xFF, 0xFF, 0xDB, 0xDF, 0xFF, 0xFF, 0xDC, 0x2B, 0xFF, 0xFF, 0xD8, 0x95,
+ 0xFF, 0xFF, 0xD6, 0xE8, 0xFF, 0xFF, 0xD8, 0xDA, 0xFF, 0xFF, 0xD1, 0x2C, 0xFF, 0xFF, 0xCE, 0x93,
+ 0xFF, 0xFF, 0xD1, 0x70, 0xFF, 0xFF, 0xCB, 0xA6, 0xFF, 0xFF, 0xCC, 0x70, 0xFF, 0xFF, 0xCB, 0x45,
+ 0xFF, 0xFF, 0xC8, 0x65, 0xFF, 0xFF, 0xC5, 0xEC, 0xFF, 0xFF, 0xC4, 0xBF, 0xFF, 0xFF, 0xC5, 0x80,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x1F, 0xFF, 0x00, 0x00, 0x3F, 0xFF, 0x00, 0x00, 0x5F, 0xFF, 0x00, 0x00, 0x7F, 0xFF,
+ 0x00, 0x00, 0x5F, 0xFF, 0x00, 0x00, 0x3F, 0xFF, 0x00, 0x00, 0x1F, 0xFF, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0xFF, 0xFF, 0xEF, 0xA6, 0x00, 0x00, 0x0F, 0x80, 0xFF, 0xFF, 0xF0, 0x04, 0x00, 0x00, 0x0E, 0xA6,
+ 0xFF, 0xFF, 0xED, 0x75, 0x00, 0x00, 0x1E, 0x84, 0x00, 0x00, 0x04, 0xC7, 0x00, 0x00, 0x28, 0xD4,
+ 0x00, 0x00, 0x08, 0x39, 0x00, 0x00, 0x16, 0x30, 0x00, 0x00, 0x21, 0x11, 0x00, 0x00, 0x0B, 0x1E,
+ 0xFF, 0xFF, 0xF6, 0x1E, 0xFF, 0xFF, 0xFD, 0x1F, 0xFF, 0xFF, 0xE7, 0x51, 0xFF, 0xFF, 0xCB, 0x57,
+ 0x00, 0x00, 0x03, 0xD6, 0x00, 0x00, 0x0D, 0xE0, 0x00, 0x00, 0x06, 0x83, 0xFF, 0xFF, 0xF8, 0x23,
+ 0xFF, 0xFF, 0xF5, 0x53, 0x00, 0x00, 0x1D, 0x19, 0x00, 0x00, 0x0A, 0x04, 0x00, 0x00, 0x29, 0x17,
+ 0x00, 0x00, 0x15, 0x24, 0x00, 0x00, 0x25, 0xA4, 0xFF, 0xFF, 0xDC, 0xB4, 0xFF, 0xFF, 0xF9, 0x57,
+ 0x00, 0x00, 0x19, 0x77, 0x00, 0x00, 0x2E, 0xF3, 0xFF, 0xFF, 0xD4, 0x13, 0x00, 0x00, 0x02, 0x39,
+ 0x00, 0x00, 0x32, 0x10, 0x00, 0x00, 0x04, 0x22, 0xFF, 0xFF, 0xEF, 0xE8, 0xFF, 0xFF, 0xDB, 0x2B,
+ 0xFF, 0xFF, 0xFE, 0x4C, 0x00, 0x00, 0x09, 0x8E, 0x00, 0x00, 0x05, 0x90, 0xFF, 0xFF, 0xFB, 0x68,
+ 0x00, 0x00, 0x00, 0xA8, 0x00, 0x00, 0x10, 0x6F, 0x00, 0x00, 0x17, 0xA1, 0xFF, 0xFF, 0xD8, 0x31,
+ 0x00, 0x00, 0x10, 0xFC, 0xFF, 0xFF, 0xF0, 0x66, 0x00, 0x00, 0x0E, 0x78, 0xFF, 0xFF, 0xF0, 0x5E,
+ 0x00, 0x00, 0x1F, 0x83, 0x00, 0x00, 0x19, 0x74, 0xFF, 0xFF, 0xEB, 0x6F, 0xFF, 0xFF, 0xF0, 0xDE,
+ 0x00, 0x00, 0x2B, 0x4D, 0x00, 0x00, 0x18, 0x67, 0xFF, 0xFF, 0xCE, 0x98, 0x00, 0x00, 0x0D, 0x20,
+ 0x00, 0x00, 0x0A, 0x13, 0xFF, 0xFF, 0xE8, 0xD3, 0xFF, 0xFF, 0xDF, 0x60, 0x00, 0x00, 0x08, 0xDF,
+ 0xFF, 0xFF, 0xE1, 0x68, 0x00, 0x00, 0x11, 0x14, 0xFF, 0xFF, 0xFE, 0x44, 0xFF, 0xFF, 0xD3, 0x92,
+ 0x00, 0x00, 0x14, 0xA4, 0xFF, 0xFF, 0xE8, 0x95, 0xFF, 0xFF, 0xF2, 0xD8, 0x00, 0x00, 0x30, 0x8A,
+ 0xFF, 0xFF, 0xF9, 0x85, 0xFF, 0xFF, 0xFB, 0x89, 0x00, 0x00, 0x19, 0x0E, 0x00, 0x00, 0x21, 0x02,
+ 0xFF, 0xFF, 0xF2, 0x6B, 0xFF, 0xFF, 0xEE, 0x43, 0xFF, 0xFF, 0xE9, 0xFE, 0x00, 0x00, 0x0D, 0x8A,
+ 0xFF, 0xFF, 0xFA, 0x2B, 0x00, 0x00, 0x09, 0xA5, 0x00, 0x00, 0x1F, 0x45, 0x00, 0x00, 0x1C, 0x1D,
+ 0xFF, 0xFF, 0xEA, 0x2A, 0xFF, 0xFF, 0xE8, 0xDB, 0x00, 0x00, 0x11, 0xE2, 0x00, 0x00, 0x0C, 0x5A,
+ 0x00, 0x00, 0x14, 0xC7, 0x00, 0x00, 0x08, 0x64, 0xFF, 0xFF, 0xD7, 0x61, 0xFF, 0xFF, 0xE8, 0x6E,
+ 0xFF, 0xFF, 0xF0, 0x47, 0xFF, 0xFF, 0xF7, 0x6F, 0x00, 0x00, 0x02, 0x0E, 0xFF, 0xFF, 0xFE, 0xC9,
+ 0xFF, 0xFF, 0xF0, 0x44, 0x00, 0x00, 0x06, 0x27, 0x00, 0x00, 0x03, 0x33, 0xFF, 0xFF, 0xFA, 0x47,
+ 0xFF, 0xFF, 0xF5, 0xFE, 0xFF, 0xFF, 0xDC, 0x9F, 0x00, 0x00, 0x1B, 0x8D, 0x00, 0x00, 0x20, 0x7F,
+ 0x00, 0x00, 0x0C, 0x79, 0xFF, 0xFF, 0xE7, 0x85, 0x00, 0x00, 0x0B, 0x90, 0xFF, 0xFF, 0xDF, 0xE8,
+ 0x00, 0x00, 0x06, 0x90, 0x00, 0x00, 0x0A, 0xC8, 0x00, 0x00, 0x1A, 0xAF, 0x00, 0x00, 0x1E, 0xF3,
+ 0x00, 0x00, 0x13, 0xFD, 0xFF, 0xFF, 0xE1, 0xCC, 0x00, 0x00, 0x19, 0xA2, 0xFF, 0xFF, 0xE5, 0xC4,
+ 0xFF, 0xFF, 0xE4, 0xF3, 0x00, 0x00, 0x49, 0xEC, 0xFF, 0xFF, 0xF9, 0x26, 0xFF, 0xFF, 0xF3, 0x7F,
+ 0x00, 0x00, 0x0A, 0xBC, 0xFF, 0xFF, 0xEC, 0xFD, 0x00, 0x00, 0x0E, 0xAA, 0xFF, 0xFF, 0xFC, 0x53,
+ 0xFF, 0xFF, 0xFB, 0xFD, 0xFF, 0xFF, 0xF0, 0x58, 0x00, 0x00, 0x02, 0x91, 0xFF, 0xFF, 0xE3, 0x83,
+ 0x00, 0x00, 0x18, 0x80, 0xFF, 0xFF, 0xF1, 0x35, 0xFF, 0xFF, 0xF3, 0x0C, 0xFF, 0xFF, 0xE6, 0xD6,
+};
diff --git a/src/jaguar/wavetable.h b/src/jaguar/wavetable.h
new file mode 100644
index 00000000..cfd905c1
--- /dev/null
+++ b/src/jaguar/wavetable.h
@@ -0,0 +1,17 @@
+//
+// Jaguar Wavetable ROM
+//
+// In a real Jaguar, these are 16-bit values that are sign-extended to 32 bits.
+// Each entry has 128 values (e.g., SINE goes from F1D200-F1D3FF)
+//
+
+// NOTE: This can probably be converted to 32-bit table, since I don't think
+// that unaligned access is allowed...
+
+#ifndef __WAVETABLE_H__
+#define __WAVETABLE_H__
+
+// How to preserve const-ness of this stuff without introducing tons of hairiness?
+extern /*const*/ unsigned char waveTableROM[];
+
+#endif // __WAVETABLE_H__
--
2.48.1